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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /common/cyclon2.c | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'common/cyclon2.c')
| -rw-r--r-- | common/cyclon2.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/common/cyclon2.c b/common/cyclon2.c index 479bebb..3ed64b2 100644 --- a/common/cyclon2.c +++ b/common/cyclon2.c @@ -43,8 +43,8 @@ #define CONFIG_FPGA_DELAY() #endif -#ifndef CFG_FPGA_WAIT -#define CFG_FPGA_WAIT CFG_HZ/10 /* 100 ms */ +#ifndef CONFIG_SYS_FPGA_WAIT +#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/10 /* 100 ms */ #endif static int CYC2_ps_load( Altera_desc *desc, void *buf, size_t bsize ); @@ -147,7 +147,7 @@ static int CYC2_ps_load (Altera_desc * desc, void *buf, size_t bsize) "done:\t0x%p\n\n", __FUNCTION__, &fn, fn, fn->config, fn->status, fn->write, fn->done); -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK printf ("Loading FPGA Device %d...", cookie); #endif @@ -167,7 +167,7 @@ static int CYC2_ps_load (Altera_desc * desc, void *buf, size_t bsize) ts = get_timer (0); /* get current time */ do { CONFIG_FPGA_DELAY (); - if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */ + if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for STATUS to go high.\n"); (*fn->abort) (cookie); return FPGA_FAIL; @@ -183,13 +183,13 @@ static int CYC2_ps_load (Altera_desc * desc, void *buf, size_t bsize) (*fn->abort) (cookie); return FPGA_FAIL; } -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK puts(" OK? ..."); #endif CONFIG_FPGA_DELAY (); -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK putc (' '); /* terminate the dotted line */ #endif @@ -202,13 +202,13 @@ static int CYC2_ps_load (Altera_desc * desc, void *buf, size_t bsize) (*fn->abort) (cookie); return (FPGA_FAIL); } -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK puts(" OK\n"); #endif ret_val = FPGA_SUCCESS; -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK if (ret_val == FPGA_SUCCESS) { puts ("Done.\n"); } |