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authorRoy Zang <tie-fei.zang@freescale.com>2011-01-07 00:06:47 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-01-14 01:32:22 -0600
commit3b4456ec391877a950dd5e98ee20df6560f0e1af (patch)
tree1690d31ee59b2bbc8e6d5db326aac3c06bc43a6b /common/cmd_display.c
parentd621da0066dff92a76ca3c6fb031a7f823a811f3 (diff)
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fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080)
The default value of the SRS, VS18 and VS30 and ADMAS fields in the host controller capabilities register (HOSTCAPBLT) are incorrect. The default of these bits should be zero instead of one. Clear these bits out when we read HOSTCAPBLT. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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