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| author | Ye Li <ye.li@nxp.com> | 2016-11-24 10:36:51 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2016-11-24 10:36:51 +0800 |
| commit | 8e0351e7d524a1d53b596710972e074487d9d1fe (patch) | |
| tree | 38b30017a1762b31b00944e6b2eaa490341dceeb /cmd/time.c | |
| parent | 8adb838b9d9b7109cd50965c624f279aa6a74673 (diff) | |
| download | u-boot-imx-8e0351e7d524a1d53b596710972e074487d9d1fe.zip u-boot-imx-8e0351e7d524a1d53b596710972e074487d9d1fe.tar.gz u-boot-imx-8e0351e7d524a1d53b596710972e074487d9d1fe.tar.bz2 | |
MLK-13508-2 mx6sllarm2: Update DDR script to v2.3
DDR scripts are updated to fix DQS gating issue commonly for LPDDR2 and
LPDDR3. That DQS sampling may have problem after enabling the
SDE_0/SDE_1 in MDCTL.
Changes:
-Based on V2.2, move the "Read DQS Gating Disable" to the step after
"MR setting", to avoid potential DDR initializaiton failures
(especially in Plugin Mode).
File:
http://compass.freescale.net/livelink/livelink?func=ll&objid=235701297&objAction=browse&sort=name&viewType=1
Test:
Passed stress test on 1 LPDDR2 ARM2 board and 1 LPDDR3 ARM2 board.
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'cmd/time.c')
0 files changed, 0 insertions, 0 deletions