diff options
| author | Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> | 2011-03-28 18:33:57 +0200 |
|---|---|---|
| committer | Shinya Kuribayashi <skuribay@pobox.com> | 2011-04-02 22:07:12 +0900 |
| commit | 6235df946ed391dc2ca5e5a9e8f05c02d7c2d3be (patch) | |
| tree | 9c521c128ebce95867f97bd4d0e97bd3f5aa9f8c /boards.cfg | |
| parent | 04efda7afca03692dd7335d1205211c302d502a4 (diff) | |
| download | u-boot-imx-6235df946ed391dc2ca5e5a9e8f05c02d7c2d3be.zip u-boot-imx-6235df946ed391dc2ca5e5a9e8f05c02d7c2d3be.tar.gz u-boot-imx-6235df946ed391dc2ca5e5a9e8f05c02d7c2d3be.tar.bz2 | |
MIPS: IncaIP: Move all IncaIP specific code to separate subdirectory
IncaIP is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Diffstat (limited to 'boards.cfg')
| -rw-r--r-- | boards.cfg | 8 |
1 files changed, 4 insertions, 4 deletions
@@ -223,10 +223,10 @@ dbau1500 mips mips32 dbau1x00 - dbau1550 mips mips32 dbau1x00 - - dbau1x00:DBAU1550 dbau1550_el mips mips32 dbau1x00 - - dbau1x00:DBAU1550 gth2 mips mips32 -incaip mips mips32 -incaip_100MHz mips mips32 incaip - - incaip:CPU_CLOCK_RATE=100000000 -incaip_133MHz mips mips32 incaip - - incaip:CPU_CLOCK_RATE=133000000 -incaip_150MHz mips mips32 incaip - - incaip:CPU_CLOCK_RATE=150000000 +incaip mips mips32 incaip - incaip +incaip_100MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=100000000 +incaip_133MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=133000000 +incaip_150MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=150000000 pb1000 mips mips32 pb1x00 - - pb1x00:PB1000 qemu_mips mips mips32 qemu-mips - - qemu-mips tb0229 mips mips32 |