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authorYe.Li <B37916@freescale.com>2014-06-09 11:31:34 +0800
committerYe.Li <B37916@freescale.com>2014-06-17 11:13:49 +0800
commit0b67ab303873c6e3be0e8cc83175efd740c94c5c (patch)
tree084448d0359fccb1a3f6de0b61c3accc6325d58e /boards.cfg
parentc7a021781b4913349d13964d628d4f6e79039714 (diff)
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ENGR00315894-40 i.mx6dl: arm2: add the i.MX6DL arm2 board support
This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT mode.But due to the board design, it's 64bit DDR buswidth physically, so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it. The patch has been tested on the i.MX6Q and i.MX6DL arm2 board. Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'boards.cfg')
-rw-r--r--boards.cfg3
1 files changed, 2 insertions, 1 deletions
diff --git a/boards.cfg b/boards.cfg
index 8f1e085..e12913a 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -317,7 +317,8 @@ Active arm armv7 mx6 boundary nitrogen6x
Active arm armv7 mx6 boundary nitrogen6x nitrogen6s nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512 Eric Nelson <eric.nelson@boundarydevices.com>
Active arm armv7 mx6 boundary nitrogen6x nitrogen6s1g nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024 Eric Nelson <eric.nelson@boundarydevices.com>
Active arm armv7 mx6 congatec cgtqmx6eval cgtqmx6qeval cgtqmx6eval:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Leo Sartre <lsartre@adeneo-embedded.com>
-Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg Jason Liu <r64343@freescale.com>
+Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q Jason Liu <r64343@freescale.com>
+Active arm armv7 mx6 freescale mx6qarm2 mx6dlarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL Jason Liu <r64343@freescale.com>
Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_USE_SPINOR Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 freescale mx6qsabreauto mx6dlsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048,SYS_USE_SPINOR Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 freescale mx6qsabreauto mx6solosabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_USE_SPINOR,SYS_NOSMP="nosmp" Fabio Estevam <fabio.estevam@freescale.com>