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author | Simon Glass <sjg@chromium.org> | 2012-10-17 13:24:53 +0000 |
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committer | Tom Warren <twarren@nvidia.com> | 2012-11-19 08:15:38 -0700 |
commit | 0dde7f53797098cf7021f6a7ca6c15bfee405db1 (patch) | |
tree | 1ed1c0fe7ed431690845e2a81ab0f309a0d3fe71 /boards.cfg | |
parent | 1b24a50b44d9577c65759d252571f94e8f702777 (diff) | |
download | u-boot-imx-0dde7f53797098cf7021f6a7ca6c15bfee405db1.zip u-boot-imx-0dde7f53797098cf7021f6a7ca6c15bfee405db1.tar.gz u-boot-imx-0dde7f53797098cf7021f6a7ca6c15bfee405db1.tar.bz2 |
arm: Add control over cachability of memory regions
Add support for adjusting the L1 cache behavior by updating the MMU
configuration. The mmu_set_region_dcache_behaviour() function allows
drivers to make these changes after the MMU is set up.
It is implemented only for ARMv7 at present.
This is needed for LCD support, where we want to make the LCD frame buffer
write-through (or off) rather than write-back.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'boards.cfg')
0 files changed, 0 insertions, 0 deletions