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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2012-09-27 10:23:23 +0000
committerTom Rini <trini@ti.com>2012-10-15 11:54:11 -0700
commit08028b113ed1e1d04953d6656926318b42dd86b7 (patch)
tree0df33a43d71a092f0960ba88ebd3ebafce7f1c19 /boards.cfg
parentf124e718f43297d60066974d3ccbbb721fb30c0c (diff)
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mx5 clocks: Fix get_uart_clk()
This function returned 66500000 instead of the correct lp_apm clock frequency if the CCM.CSCMR1.uart_clk_sel mux is set to 3. This patch fixes this issue by introducing the get_standard_pll_sel_clk() function that will be used by future patches to handle identical muxes used by many other clocks. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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