* Cleanup lowboot code for MPC5200

* Minor code cleanup (coding style)

* Patch by Reinhard Meyer, 30 Dec 2003:
  - cpu/mpc5xxx/fec.c: added CONFIG_PHY_ADDR, added CONFIG_PHY_TYPE,
  - added CONFIG_PHY_ADDR to include/configs/IceCube.h,
  - turned debug print of PHY registers into a function (called in two places)
  - added support for EMK MPC5200 based modules

* Fix MPC8xx PLPRCR_MFD_SHIFT typo

* Add support for TQM866M modules

* Fixes for TQM855M with 4 MB flash (Am29DL163 = _no_ mirror bit flash)

* Fix a few compiler warnings

14 files changed, 331 insertions, 218 deletions

diff --git a/board/bubinga405ep/bubinga405ep.c b/board/bubinga405ep/bubinga405ep.c
index 8694ebe..f73b166 100644
--- a/board/bubinga405ep/bubinga405ep.c
+++ b/board/bubinga405ep/bubinga405ep.c
@@ -79,7 +79,6 @@ int board_pre_init (void)
 int checkboard (void)
 {
 	unsigned char *s = getenv ("serial#");
-	unsigned char *e;
 
 	puts ("Board: IBM 405EP Eval Board");
 
diff --git a/board/emk/top5200/config.mk b/board/emk/top5200/config.mk
index 14af97a..84131fe 100644
--- a/board/emk/top5200/config.mk
+++ b/board/emk/top5200/config.mk
@@ -2,6 +2,9 @@
 # (C) Copyright 2003
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
+# (C) Copyright 2003
+# Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
+#
 # See file CREDITS for list of people who contributed to this
 # project.
 #
@@ -24,8 +27,15 @@
 #
 # TOP5200 board, on optional MINI5200 and EVAL5200 boards
 #
+# allowed and functional TEXT_BASE values:
+#
+#   0xff000000		low boot at 0x00000100 (default board setting)
+#   0xfff00000		high boot at 0xfff00100 (board needs modification)
+#	0x00100000		RAM load and test
+#
 
-TEXT_BASE = 0xfff00000
+TEXT_BASE = 0xff000000
+#TEXT_BASE = 0xfff00000
 #TEXT_BASE = 0x00100000
 
 PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/emk/top5200/flash.c b/board/emk/top5200/flash.c
index b951b5f..216bce3 100644
--- a/board/emk/top5200/flash.c
+++ b/board/emk/top5200/flash.c
@@ -2,6 +2,9 @@
  * (C) Copyright 2003
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
+ * (C) Copyright 2003
+ * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -51,7 +54,7 @@ static flash_info_t *flash_get_info(ulong base);
 unsigned long flash_init (void)
 {
 	unsigned long size = 0;
-	int i;
+	int i = 0;
 	extern void flash_preinit(void);
 	extern void flash_afterinit(uint, ulong, ulong);
 	ulong flashbase = CFG_FLASH_BASE;
@@ -59,10 +62,10 @@ unsigned long flash_init (void)
 	flash_preinit();
 
 	/* There is only ONE FLASH device */
-	memset(&flash_info[0], 0, sizeof(flash_info_t));
-	flash_info[0].size =
-			flash_get_size((FPW *)flashbase, &flash_info[0]);
-	size += flash_info[0].size;
+	memset(&flash_info[i], 0, sizeof(flash_info_t));
+	flash_info[i].size =
+			flash_get_size((FPW *)flashbase, &flash_info[i]);
+	size += flash_info[i].size;
 
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
 	/* monitor protection ON by default */
@@ -81,7 +84,7 @@ unsigned long flash_init (void)
 #endif
 
 
-	flash_afterinit(0, flash_info[0].start[0], flash_info[0].size);
+	flash_afterinit(i, flash_info[i].start[0], flash_info[i].size);
 	return size ? size : 1;
 }
 
@@ -151,7 +154,8 @@ void flash_print_info (flash_info_t *info)
 	if (info->flash_id & FLASH_BTYPE) {
 		boottype = botboottype;
 		bootletter = botbootletter;
-	} else {
+	}
+	else {
 		boottype = topboottype;
 		bootletter = topbootletter;
 	}
@@ -238,12 +242,17 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
 		info->flash_id += FLASH_AM160B;
 		info->sector_count = 35;
 		info->size = 0x00200000;
+#ifdef CFG_LOWBOOT
+		offset = 0;
+#else
 		offset = 0x00e00000;
+#endif
 		info->start[0] = (ulong)addr + offset;
 		info->start[1] = (ulong)addr + offset + 0x4000;
 		info->start[2] = (ulong)addr + offset + 0x6000;
 		info->start[3] = (ulong)addr + offset + 0x8000;
-		for (i = 4; i < info->sector_count; i++) {
+		for (i = 4; i < info->sector_count; i++)
+		{
 			info->start[i] = (ulong)addr + offset + 0x10000 * (i-3);
 		}
 		break;
@@ -252,8 +261,12 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
 		info->flash_id += FLASH_AMDLV065D;
 		info->sector_count = 128;
 		info->size = 0x00800000;
+#ifdef CFG_LOWBOOT
+		offset = 0;
+#else
 		offset = 0x00800000;
-		for (i = 0; i < info->sector_count; i++)
+#endif
+		for( i = 0; i < info->sector_count; i++ )
 			info->start[i] = (ulong)addr + offset + (i * 0x10000);
 		break;				/* => 8 or 16 MB	*/
 
diff --git a/board/emk/top5200/top5200.c b/board/emk/top5200/top5200.c
index 536a515..3969e2a 100644
--- a/board/emk/top5200/top5200.c
+++ b/board/emk/top5200/top5200.c
@@ -36,8 +36,10 @@ long int initdram (int board_type)
 {
 	ulong dramsize = 0;
 #ifndef CFG_RAMBOOT
+#if 0
 	ulong	t;
 	ulong	tap_del;
+#endif
 
 	#define	MODE_EN		0x80000000
 	#define	SOFT_PRE	2
@@ -73,16 +75,19 @@ long int initdram (int board_type)
 	*(vu_long *)MPC5XXX_CDM_PORCFG = CFG_DRAM_TAP_DEL << 24;
 
 #if 0
-	for (tap_del = 0; tap_del < 32; tap_del++) {
+	for (tap_del = 0; tap_del < 32; tap_del++)
+	{
 		*(vu_long *)MPC5XXX_CDM_PORCFG = tap_del << 24;
 
 		printf ("\nTAP Delay:%x Filling DRAM...", *(vu_long *)MPC5XXX_CDM_PORCFG);
 		for (t = 0; t < 0x04000000; t+=4)
 			*(vu_long *) t = t;
 		printf ("Checking DRAM...\n");
-		for (t = 0; t < 0x04000000; t+=4) {
+		for (t = 0; t < 0x04000000; t+=4)
+		{
 			ulong	rval = *(vu_long *) t;
-			if (rval != t) {
+			if (rval != t)
+			{
 				printf ("mismatch at %x: ", t);
 				printf (" 1.read %x", rval);
 				printf (" 2.read %x", *(vu_long *) t);
diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c
index e0adec3..27b7bab 100644
--- a/board/icecube/icecube.c
+++ b/board/icecube/icecube.c
@@ -126,7 +126,7 @@ long int initdram (int board_type)
 	/* setup config registers */
 	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0x73722930;
 	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x47770000;
-	
+
 	/* set tap delay to 0x10 */
 	*(vu_long *)MPC5XXX_CDM_PORCFG = 0x10000000;
 #else
diff --git a/board/incaip/memsetup.S b/board/incaip/memsetup.S
index 70d2885..b438484 100644
--- a/board/incaip/memsetup.S
+++ b/board/incaip/memsetup.S
@@ -13,7 +13,7 @@
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
@@ -27,35 +27,35 @@
 #include <asm/regdef.h>
 
 
-#define EBU_MODUL_BASE          0xB8000200
-#define EBU_CLC(value)          0x0000(value)
-#define EBU_CON(value)          0x0010(value)
-#define EBU_ADDSEL0(value)      0x0020(value)
-#define EBU_ADDSEL1(value)      0x0024(value)
-#define EBU_ADDSEL2(value)      0x0028(value)
-#define EBU_BUSCON0(value)      0x0060(value)
-#define EBU_BUSCON1(value)      0x0064(value)
-#define EBU_BUSCON2(value)      0x0068(value)
-
-#define MC_MODUL_BASE           0xBF800000
-#define MC_ERRCAUSE(value)      0x0100(value)
-#define MC_ERRADDR(value)       0x0108(value)
-#define MC_IOGP(value)          0x0800(value)
-#define MC_SELFRFSH(value)      0x0A00(value)
-#define MC_CTRLENA(value)       0x1000(value)
-#define MC_MRSCODE(value)       0x1008(value)
-#define MC_CFGDW(value)         0x1010(value)
-#define MC_CFGPB0(value)        0x1018(value)
-#define MC_LATENCY(value)       0x1038(value)
-#define MC_TREFRESH(value)      0x1040(value)
-
-#define CGU_MODUL_BASE          0xBF107000
-#define CGU_PLL1CR(value)       0x0008(value)
-#define CGU_DIVCR(value)        0x0010(value)
-#define CGU_MUXCR(value)        0x0014(value)
-#define CGU_PLL1SR(value)       0x000C(value)
-
-	.set	noreorder		
+#define EBU_MODUL_BASE		0xB8000200
+#define EBU_CLC(value)		0x0000(value)
+#define EBU_CON(value)		0x0010(value)
+#define EBU_ADDSEL0(value)	0x0020(value)
+#define EBU_ADDSEL1(value)	0x0024(value)
+#define EBU_ADDSEL2(value)	0x0028(value)
+#define EBU_BUSCON0(value)	0x0060(value)
+#define EBU_BUSCON1(value)	0x0064(value)
+#define EBU_BUSCON2(value)	0x0068(value)
+
+#define MC_MODUL_BASE		0xBF800000
+#define MC_ERRCAUSE(value)	0x0100(value)
+#define MC_ERRADDR(value)	0x0108(value)
+#define MC_IOGP(value)		0x0800(value)
+#define MC_SELFRFSH(value)	0x0A00(value)
+#define MC_CTRLENA(value)	0x1000(value)
+#define MC_MRSCODE(value)	0x1008(value)
+#define MC_CFGDW(value)		0x1010(value)
+#define MC_CFGPB0(value)	0x1018(value)
+#define MC_LATENCY(value)	0x1038(value)
+#define MC_TREFRESH(value)	0x1040(value)
+
+#define CGU_MODUL_BASE		0xBF107000
+#define CGU_PLL1CR(value)	0x0008(value)
+#define CGU_DIVCR(value)	0x0010(value)
+#define CGU_MUXCR(value)	0x0014(value)
+#define CGU_PLL1SR(value)	0x000C(value)
+
+	.set	noreorder
 
 
 /*
@@ -234,4 +234,3 @@ memsetup:
 	j	ra
 	nop
 	.end	memsetup
-
diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c
index 17871d2..9c98c93 100644
--- a/board/mpl/common/common_util.c
+++ b/board/mpl/common/common_util.c
@@ -54,7 +54,7 @@ extern flash_info_t flash_info[];	/* info for FLASH chips */
 static image_header_t header;
 
 
-static int 
+static int
 mpl_prg(uchar *src, ulong size)
 {
 	ulong start;
@@ -105,7 +105,6 @@ mpl_prg(uchar *src, ulong size)
 		flash_perror(rc);
 		return (1);
 	}
-	
 
 #elif defined(CONFIG_VCMA9)
 	start = 0;
@@ -125,7 +124,8 @@ mpl_prg(uchar *src, ulong size)
 	}
 
 #endif
-	printf("flash erased, programming from 0x%lx 0x%lx Bytes\n",src,size);
+	printf("flash erased, programming from 0x%lx 0x%lx Bytes\n",
+		(ulong)src, size);
 	if ((rc = flash_write (src, start, size)) != 0) {
 		puts("ERROR ");
 		flash_perror(rc);
@@ -136,14 +136,14 @@ mpl_prg(uchar *src, ulong size)
 }
 
 
-static int 
+static int
 mpl_prg_image(uchar *ld_addr)
 {
 	unsigned long len, checksum;
 	uchar *data;
 	image_header_t *hdr = &header;
 	int rc;
-	
+
 	/* Copy header so we can blank CRC field for re-calculation */
 	memcpy (&header, (char *)ld_addr, sizeof(image_header_t));
 	if (ntohl(hdr->ih_magic)  != IH_MAGIC) {
@@ -183,7 +183,7 @@ mpl_prg_image(uchar *ld_addr)
 		    	puts("Insufficient space for decompression\n");
 			return 1;
 		}
-				 
+
 		switch (hdr->ih_comp) {
 		case IH_COMP_GZIP:
 			puts("Uncompressing (GZIP) ... ");
@@ -217,13 +217,13 @@ mpl_prg_image(uchar *ld_addr)
 			free(buf);
 			return 1;
 		}
-		
+
 		rc = mpl_prg(buf, len);
 		free(buf);
 	} else {
 		rc = mpl_prg(data, len);
 	}
-	
+
 	return(rc);
 }
 
@@ -445,7 +445,7 @@ int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 				ld_addr=CFG_LOAD_ADDR;
 				result=do_fdcboot(cmdtp, 0, 1, local_args);
 			}
-			result=mpl_prg_image(ld_addr);
+			result=mpl_prg_image((uchar *)ld_addr);
 			return result;
 		}
 #endif /* (CONFIG_COMMANDS & CFG_CMD_FDC) */
diff --git a/board/mvblue/mvblue.c b/board/mvblue/mvblue.c
index 6827a23..0cec63f 100644
--- a/board/mvblue/mvblue.c
+++ b/board/mvblue/mvblue.c
@@ -11,80 +11,86 @@
 #include <ns16550.h>
 
 #ifdef CONFIG_PCI
-	#include <pci.h>
+#include <pci.h>
 #endif
 
-u32 get_BoardType(void);
+u32 get_BoardType (void);
 
 #define PCI_CONFIG(b,d,f,r)    cpu_to_le32(0x80000000 | ((b&0xff)<<16) \
-                                                      | ((d&0x1f)<<11) \
-                                                      | ((f&0x7)<<7)   \
-                                                      | (r&0xfc) )
+						      | ((d&0x1f)<<11) \
+						      | ((f&0x7)<<7)   \
+						      | (r&0xfc) )
 
-int mv_pci_read( int bus, int dev, int func, int reg )
+int mv_pci_read (int bus, int dev, int func, int reg)
 {
-    *(u32*)(0xfec00cf8) = PCI_CONFIG(bus,dev,func,reg);
-    asm("sync");
-    return cpu_to_le32( *(u32*)(0xfee00cfc) );
+	*(u32 *) (0xfec00cf8) = PCI_CONFIG (bus, dev, func, reg);
+	asm ("sync");
+	return cpu_to_le32 (*(u32 *) (0xfee00cfc));
 }
-u32 get_BoardType() {
-	return ( mv_pci_read(0,0xe,0,0) == 0x06801095 ? 0 : 1 );
+
+u32 get_BoardType ()
+{
+	return (mv_pci_read (0, 0xe, 0, 0) == 0x06801095 ? 0 : 1);
 }
 
-void init_2nd_DUART(void)
+void init_2nd_DUART (void)
 {
-	NS16550_t console = (NS16550_t)CFG_NS16550_COM2;
+	NS16550_t console = (NS16550_t) CFG_NS16550_COM2;
 	int clock_divisor = CFG_NS16550_CLK / 16 / CONFIG_BAUDRATE;
-	*(u8*)(0xfc004511) = 0x1;
-	NS16550_init(console, clock_divisor);
+
+	*(u8 *) (0xfc004511) = 0x1;
+	NS16550_init (console, clock_divisor);
 }
-void hw_watchdog_reset(void)
+void hw_watchdog_reset (void)
 {
-	if (get_BoardType() == 0 ) {
-    	*(u32*)(0xff000005) = 0;
-    	asm("sync");
+	if (get_BoardType () == 0) {
+		*(u32 *) (0xff000005) = 0;
+		asm ("sync");
 	}
 }
 int checkboard (void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
-	ulong busfreq  = get_bus_freq(0);
-	char  buf[32];
-	u32   BoardType = get_BoardType();
+	ulong busfreq = get_bus_freq (0);
+	char buf[32];
+	u32 BoardType = get_BoardType ();
 	char *BoardName[2] = { "mvBlueBOX", "mvBlueLYNX" };
 	char *p;
 	bd_t *bd = gd->bd;
 
-	hw_watchdog_reset();
+	hw_watchdog_reset ();
+
+	printf ("U-Boot (%s) running on mvBLUE device.\n", MV_VERSION);
+	printf ("       Found %s running at %s MHz memory clock.\n",
+		BoardName[BoardType], strmhz (buf, busfreq));
 
-	printf("U-Boot (%s) running on mvBLUE device.\n", MV_VERSION);
-	printf("       Found %s running at %s MHz memory clock.\n", BoardName[BoardType], strmhz(buf, busfreq) );
+	init_2nd_DUART ();
 
-	init_2nd_DUART();
+	if ((p = getenv ("console_nr")) != NULL) {
+		unsigned long con_nr = simple_strtoul (p, NULL, 10) & 3;
 
-    if ( (p = getenv("console_nr")) != NULL ) {
-        unsigned long con_nr = simple_strtoul( p, NULL, 10) & 3;
-        bd->bi_baudrate &= ~3;
-        bd->bi_baudrate |= con_nr & 3;
+		bd->bi_baudrate &= ~3;
+		bd->bi_baudrate |= con_nr & 3;
 	}
 	return 0;
 }
 
 long int initdram (int board_type)
 {
-	int              i, cnt;
-	volatile uchar * base= CFG_SDRAM_BASE;
-	volatile ulong * addr;
-	ulong            save[32];
-	ulong            val, ret  = 0;
-
-	for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
-		addr = (volatile ulong *)base + cnt;
+	int i, cnt;
+	volatile uchar *base = CFG_SDRAM_BASE;
+	volatile ulong *addr;
+	ulong save[32];
+	ulong val, ret = 0;
+
+	for (i = 0, cnt = (CFG_MAX_RAM_SIZE / sizeof (long)) >> 1; cnt > 0;
+	     cnt >>= 1) {
+		addr = (volatile ulong *) base + cnt;
 		save[i++] = *addr;
 		*addr = ~cnt;
 	}
 
-	addr = (volatile ulong *)base;
+	addr = (volatile ulong *) base;
 	save[i] = *addr;
 	*addr = 0;
 
@@ -93,102 +99,113 @@ long int initdram (int board_type)
 		goto Done;
 	}
 
-	for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
-		addr = (volatile ulong *)base + cnt;
+	for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof (long); cnt <<= 1) {
+		addr = (volatile ulong *) base + cnt;
 		val = *addr;
 		*addr = save[--i];
 		if (val != ~cnt) {
-			ulong new_bank0_end = cnt * sizeof(long) - 1;
-			ulong mear1  = mpc824x_mpc107_getreg(MEAR1);
-			ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
-			mear1 =  (mear1  & 0xFFFFFF00) |
-			  ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
+			ulong new_bank0_end = cnt * sizeof (long) - 1;
+			ulong mear1 = mpc824x_mpc107_getreg (MEAR1);
+			ulong emear1 = mpc824x_mpc107_getreg (EMEAR1);
+
+			mear1 = (mear1 & 0xFFFFFF00) |
+				((new_bank0_end & MICR_ADDR_MASK) >>
+				 MICR_ADDR_SHIFT);
 			emear1 = (emear1 & 0xFFFFFF00) |
-			  ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
-			mpc824x_mpc107_setreg(MEAR1,  mear1);
-			mpc824x_mpc107_setreg(EMEAR1, emear1);
-			ret = cnt * sizeof(long);
+				((new_bank0_end & MICR_ADDR_MASK) >>
+				 MICR_EADDR_SHIFT);
+			mpc824x_mpc107_setreg (MEAR1, mear1);
+			mpc824x_mpc107_setreg (EMEAR1, emear1);
+			ret = cnt * sizeof (long);
 			goto Done;
 		}
 	}
 
 	ret = CFG_MAX_RAM_SIZE;
-Done:
+      Done:
 	return ret;
 }
 
 /* ------------------------------------------------------------------------- */
-u8 *dhcp_vendorex_prep(u8 *e)
+u8 *dhcp_vendorex_prep (u8 * e)
 {
-char *ptr;
+	char *ptr;
 
 	/* DHCP vendor-class-identifier = 60 */
-    if ((ptr = getenv("dhcp_vendor-class-identifier"))) {
-        *e++ = 60;
-        *e++ = strlen(ptr);
-        while (*ptr)
-            *e++ = *ptr++;
-    }
+	if ((ptr = getenv ("dhcp_vendor-class-identifier"))) {
+		*e++ = 60;
+		*e++ = strlen (ptr);
+		while (*ptr)
+			*e++ = *ptr++;
+	}
 	/* my DHCP_CLIENT_IDENTIFIER = 61 */
-    if ((ptr = getenv("dhcp_client_id"))) {
-        *e++ = 61;
-        *e++ = strlen(ptr);
-        while (*ptr)
-            *e++ = *ptr++;
-    }
-    return e;
+	if ((ptr = getenv ("dhcp_client_id"))) {
+		*e++ = 61;
+		*e++ = strlen (ptr);
+		while (*ptr)
+			*e++ = *ptr++;
+	}
+	return e;
 }
-u8 *dhcp_vendorex_proc(u8 *popt)
+
+u8 *dhcp_vendorex_proc (u8 * popt)
 {
-    return NULL;
+	return NULL;
 }
+
 /* ------------------------------------------------------------------------- */
 
 /*
  * Initialize PCI Devices
  */
 #ifdef CONFIG_PCI
-void pci_mvblue_clear_base( struct pci_controller *hose, pci_dev_t dev )
+void pci_mvblue_clear_base (struct pci_controller *hose, pci_dev_t dev)
 {
 	u32 cnt;
-	printf("clear base @ dev/func 0x%02x/0x%02x ... ", PCI_DEV(dev), PCI_FUNC(dev) );
-    for( cnt = 0; cnt < 6; cnt++ )
-    	pci_hose_write_config_dword( hose, dev, 0x10 + (4*cnt), 0x0 );
-	printf("done\n");
+
+	printf ("clear base @ dev/func 0x%02x/0x%02x ... ", PCI_DEV (dev),
+		PCI_FUNC (dev));
+	for (cnt = 0; cnt < 6; cnt++)
+		pci_hose_write_config_dword (hose, dev, 0x10 + (4 * cnt),
+					     0x0);
+	printf ("done\n");
 }
 
-void duart_setup( u32 base, u16 divisor )
+void duart_setup (u32 base, u16 divisor)
 {
-	printf("duart setup ...");
-	out_8( (u8*)( CFG_ISA_IO+base+3), 0x80);
-    out_8( (u8*)( CFG_ISA_IO+base+0), divisor & 0xff);
-    out_8( (u8*)( CFG_ISA_IO+base+1), divisor >> 8 );
-    out_8( (u8*)( CFG_ISA_IO+base+3), 0x03);
-    out_8( (u8*)( CFG_ISA_IO+base+4), 0x03);
-    out_8( (u8*)( CFG_ISA_IO+base+2), 0x07);
-	printf("done\n");
+	printf ("duart setup ...");
+	out_8 ((u8 *) (CFG_ISA_IO + base + 3), 0x80);
+	out_8 ((u8 *) (CFG_ISA_IO + base + 0), divisor & 0xff);
+	out_8 ((u8 *) (CFG_ISA_IO + base + 1), divisor >> 8);
+	out_8 ((u8 *) (CFG_ISA_IO + base + 3), 0x03);
+	out_8 ((u8 *) (CFG_ISA_IO + base + 4), 0x03);
+	out_8 ((u8 *) (CFG_ISA_IO + base + 2), 0x07);
+	printf ("done\n");
 }
 
-void pci_mvblue_fixup_irq_behind_bridge( struct pci_controller *hose, pci_dev_t bridge, unsigned char irq)
+void pci_mvblue_fixup_irq_behind_bridge (struct pci_controller *hose,
+					 pci_dev_t bridge, unsigned char irq)
 {
 	pci_dev_t d;
-	unsigned char 	bus;
-	unsigned short 	vendor,
-					class;
-
-	pci_hose_read_config_byte( hose, bridge, PCI_SECONDARY_BUS, &bus );
-	for (d =  PCI_BDF(bus,0,0);
-         d <  PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
-       	 d += PCI_BDF(0,0,1))
-	{
-        pci_hose_read_config_word(hose, d, PCI_VENDOR_ID, &vendor);
-        if (vendor != 0xffff && vendor != 0x0000)
-        {
-			pci_hose_read_config_word( hose, d, PCI_CLASS_DEVICE, &class );
-			if ( class == PCI_CLASS_BRIDGE_PCI )
-				pci_mvblue_fixup_irq_behind_bridge( hose, d, irq );
+	unsigned char bus;
+	unsigned short vendor, class;
+
+	pci_hose_read_config_byte (hose, bridge, PCI_SECONDARY_BUS, &bus);
+	for (d = PCI_BDF (bus, 0, 0);
+	     d < PCI_BDF (bus, PCI_MAX_PCI_DEVICES - 1,
+			  PCI_MAX_PCI_FUNCTIONS - 1);
+	     d += PCI_BDF (0, 0, 1)) {
+		pci_hose_read_config_word (hose, d, PCI_VENDOR_ID, &vendor);
+		if (vendor != 0xffff && vendor != 0x0000) {
+			pci_hose_read_config_word (hose, d, PCI_CLASS_DEVICE,
+						   &class);
+			if (class == PCI_CLASS_BRIDGE_PCI)
+				pci_mvblue_fixup_irq_behind_bridge (hose, d,
+								    irq);
 			else
-				pci_hose_write_config_byte( hose, d, PCI_INTERRUPT_LINE, irq );
+				pci_hose_write_config_byte (hose, d,
+							    PCI_INTERRUPT_LINE,
+							    irq);
 		}
 	}
 }
@@ -196,58 +213,64 @@ void pci_mvblue_fixup_irq_behind_bridge( struct pci_controller *hose, pci_dev_t
 #define MV_MAX_PCI_BUSSES	3
 #define SLOT0_IRQ	3
 #define SLOT1_IRQ	4
-void pci_mvblue_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
+void pci_mvblue_fixup_irq (struct pci_controller *hose, pci_dev_t dev)
 {
-    unsigned char 	line=0xff;
-	unsigned short 	class;
+	unsigned char line = 0xff;
+	unsigned short class;
 
-	if( PCI_BUS(dev) == 0 ) {
-	    switch(PCI_DEV(dev)) {
-	    case 0xd:
-			if ( get_BoardType() == 0 ) {
+	if (PCI_BUS (dev) == 0) {
+		switch (PCI_DEV (dev)) {
+		case 0xd:
+			if (get_BoardType () == 0) {
 				line = 1;
 			} else
 				/* mvBL */
-		        line = 2;
-	        break;
-	    case 0xe:
+				line = 2;
+			break;
+		case 0xe:
 			/* mvBB: IDE */
 			line = 2;
-    		pci_hose_write_config_byte(hose, dev, 0x8a, 0x20 );
+			pci_hose_write_config_byte (hose, dev, 0x8a, 0x20);
 			break;
 		case 0xf:
 			/* mvBB: Slot0 (Grabber) */
-			pci_hose_read_config_word( hose, dev, PCI_CLASS_DEVICE, &class );
-			if ( class == PCI_CLASS_BRIDGE_PCI ) {
-				pci_mvblue_fixup_irq_behind_bridge( hose, dev, SLOT0_IRQ );
+			pci_hose_read_config_word (hose, dev,
+						   PCI_CLASS_DEVICE, &class);
+			if (class == PCI_CLASS_BRIDGE_PCI) {
+				pci_mvblue_fixup_irq_behind_bridge (hose, dev,
+								    SLOT0_IRQ);
 				line = 0xff;
 			} else
 				line = SLOT0_IRQ;
 			break;
 		case 0x10:
 			/* mvBB: Slot1 */
-			pci_hose_read_config_word( hose, dev, PCI_CLASS_DEVICE, &class );
-			if ( class == PCI_CLASS_BRIDGE_PCI ) {
-				pci_mvblue_fixup_irq_behind_bridge( hose, dev, SLOT1_IRQ );
+			pci_hose_read_config_word (hose, dev,
+						   PCI_CLASS_DEVICE, &class);
+			if (class == PCI_CLASS_BRIDGE_PCI) {
+				pci_mvblue_fixup_irq_behind_bridge (hose, dev,
+								    SLOT1_IRQ);
 				line = 0xff;
 			} else
 				line = SLOT1_IRQ;
 			break;
-	    default:
-			printf("***pci_scan: illegal dev = 0x%08x\n", PCI_DEV(dev) );
+		default:
+			printf ("***pci_scan: illegal dev = 0x%08x\n",
+				PCI_DEV (dev));
 			line = 0xff;
 			break;
-	    }
-    	pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, line );
+		}
+		pci_hose_write_config_byte (hose, dev, PCI_INTERRUPT_LINE,
+					    line);
 	}
 }
 
 struct pci_controller hose = {
-	fixup_irq: pci_mvblue_fixup_irq
+	fixup_irq:pci_mvblue_fixup_irq
 };
 
-void pci_init_board(void)
+void pci_init_board (void)
 {
-	pci_mpc824x_init(&hose);
+	pci_mpc824x_init (&hose);
 }
 #endif
diff --git a/board/snmc/qs850/flash.c b/board/snmc/qs850/flash.c
index d4e2cbb..d2f169b 100644
--- a/board/snmc/qs850/flash.c
+++ b/board/snmc/qs850/flash.c
@@ -151,7 +151,6 @@ unsigned long flash_init (void)
 }
 
 
-
 /*-----------------------------------------------------------------------
  This code is specific to the AM29DL163/AM29DL232 for the QS850/QS823.
  */
diff --git a/board/snmc/qs860t/flash.c b/board/snmc/qs860t/flash.c
index ab7c8a1..c84d08d 100644
--- a/board/snmc/qs860t/flash.c
+++ b/board/snmc/qs860t/flash.c
@@ -170,7 +170,6 @@ unsigned long flash_init (void)
 }
 
 
-
 /*-----------------------------------------------------------------------
  */
 
diff --git a/board/tqm8260/tqm8260.c b/board/tqm8260/tqm8260.c
index a0a38ca..f716cf2 100644
--- a/board/tqm8260/tqm8260.c
+++ b/board/tqm8260/tqm8260.c
@@ -299,8 +299,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
 	*addr = 0;
 
 	if ((val = *addr) != 0) {
-		/* Restore the original data before leaving the function.
-		 */
+		/* Restore the original data before leaving the function.  */
 		*addr = save[i];
 		for (cnt = 1; cnt <= maxsize / sizeof(long); cnt <<= 1) {
 			addr  = (volatile ulong *) base + cnt;
@@ -315,8 +314,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
 		*addr = save[--i];
 		if (val != ~cnt) {
 			size = cnt * sizeof (long);
-			/* Restore the original data before leaving the function.
-			 */ 
+			/* Restore the original data before leaving the function.  */
 			for (cnt <<= 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
 				addr  = (volatile ulong *) base + cnt;
 				*addr = save[--i];
diff --git a/board/tqm8xx/flash.c b/board/tqm8xx/flash.c
index a974e23..b8a3595 100644
--- a/board/tqm8xx/flash.c
+++ b/board/tqm8xx/flash.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2000-2002
+ * (C) Copyright 2000-2004
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -21,7 +21,9 @@
  * MA 02111-1307 USA
  */
 
-/* #define DEBUG */
+#if 0
+#define DEBUG
+#endif
 
 #include <common.h>
 #include <mpc8xx.h>
@@ -214,6 +216,8 @@ void flash_print_info  (flash_info_t *info)
 				break;
 	case FLASH_AMLV640U:	printf ("AM29LV640ML (64Mbit, uniform sector size)\n");
 				break;
+	case FLASH_AMLV320B:	printf ("AM29LV320MB (32Mbit, bottom boot sect)\n");
+				break;
 # else	/* ! TQM8xxM */
 	case FLASH_AM400B:	printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
 				break;
@@ -232,6 +236,8 @@ void flash_print_info  (flash_info_t *info)
 				break;
 	case FLASH_AM160T:	printf ("AM29LV160T (16 Mbit, top boot sector)\n");
 				break;
+	case FLASH_AMDL163B:	printf ("AM29DL163B (16 Mbit, bottom boot sect)\n");
+				break;
 	default:		printf ("Unknown Chip Type\n");
 				break;
 	}
@@ -280,12 +286,15 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
 
 	switch (value) {
 	case AMD_MANUFACT:
+		debug ("Manufacturer: AMD\n");
 		info->flash_id = FLASH_MAN_AMD;
 		break;
 	case FUJ_MANUFACT:
+		debug ("Manufacturer: FUJITSU\n");
 		info->flash_id = FLASH_MAN_FUJ;
 		break;
 	default:
+		debug ("Manufacturer: *** unknown ***\n");
 		info->flash_id = FLASH_UNKNOWN;
 		info->sector_count = 0;
 		info->size = 0;
@@ -299,36 +308,53 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
 	switch (value) {
 #ifdef CONFIG_TQM8xxM	/* mirror bit flash */
 	case AMD_ID_MIRROR:
+		debug ("Mirror Bit flash: addr[14] = %08lX  addr[15] = %08lX\n",
+			addr[14], addr[15]);
 		/* Special case for AMLV320MH/L */
 		if ((addr[14] & 0x00ff00ff) == 0x001d001d &&
-			(addr[15] & 0x00ff00ff) == 0x00000000) {
+		    (addr[15] & 0x00ff00ff) == 0x00000000) {
+			debug ("Chip: AMLV320MH/L\n");
 			info->flash_id += FLASH_AMLV320U;
 			info->sector_count = 64;
-			info->size = 0x00800000; /* => 8 MB */
+			info->size = 0x00800000;	/* => 8 MB */
 			break;
 		}
 		switch(addr[14]) {
 		case AMD_ID_LV128U_2:
 			if (addr[15] != AMD_ID_LV128U_3) {
+				debug ("Chip: AMLV128U -> unknown\n");
 				info->flash_id = FLASH_UNKNOWN;
-			}
-			else {
+			} else {
+				debug ("Chip: AMLV128U\n");
 				info->flash_id += FLASH_AMLV128U;
 				info->sector_count = 256;
 				info->size = 0x02000000;
 			}
-			break;				/* => 32 MB		*/
+			break;				/* => 32 MB	*/
 		case AMD_ID_LV640U_2:
 			if (addr[15] != AMD_ID_LV640U_3) {
+				debug ("Chip: AMLV640U -> unknown\n");
 				info->flash_id = FLASH_UNKNOWN;
-			}
-			else {
+			} else {
+				debug ("Chip: AMLV640U\n");
 				info->flash_id += FLASH_AMLV640U;
 				info->sector_count = 128;
 				info->size = 0x01000000;
 			}
-			break;				/* => 16 MB		*/
+			break;				/* => 16 MB	*/
+		case AMD_ID_LV320B_2:
+			if (addr[15] != AMD_ID_LV320B_3) {
+				debug ("Chip: AMLV320B -> unknown\n");
+				info->flash_id = FLASH_UNKNOWN;
+			} else {
+				debug ("Chip: AMLV320B\n");
+				info->flash_id += FLASH_AMLV320B;
+				info->sector_count = 71;
+				info->size = 0x00800000;
+			}
+			break;				/* =>  8 MB	*/
 		default:
+			debug ("Chip: *** unknown ***\n");
 			info->flash_id = FLASH_UNKNOWN;
 			break;
 		}
@@ -338,50 +364,56 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
 		info->flash_id += FLASH_AM400T;
 		info->sector_count = 11;
 		info->size = 0x00100000;
-		break;				/* => 1 MB		*/
+		break;					/* => 1 MB		*/
 
 	case AMD_ID_LV400B:
 		info->flash_id += FLASH_AM400B;
 		info->sector_count = 11;
 		info->size = 0x00100000;
-		break;				/* => 1 MB		*/
+		break;					/* => 1 MB		*/
 
 	case AMD_ID_LV800T:
 		info->flash_id += FLASH_AM800T;
 		info->sector_count = 19;
 		info->size = 0x00200000;
-		break;				/* => 2 MB		*/
+		break;					/* => 2 MB	*/
 
 	case AMD_ID_LV800B:
 		info->flash_id += FLASH_AM800B;
 		info->sector_count = 19;
 		info->size = 0x00200000;
-		break;				/* => 2 MB		*/
+		break;					/* => 2 MB	*/
 
 	case AMD_ID_LV320T:
 		info->flash_id += FLASH_AM320T;
 		info->sector_count = 71;
 		info->size = 0x00800000;
-		break;				/* => 8 MB		*/
+		break;					/* => 8 MB	*/
 
 	case AMD_ID_LV320B:
 		info->flash_id += FLASH_AM320B;
 		info->sector_count = 71;
 		info->size = 0x00800000;
-		break;				/* => 8 MB		*/
+		break;					/* => 8 MB	*/
 #endif	/* TQM8xxM */
 
 	case AMD_ID_LV160T:
 		info->flash_id += FLASH_AM160T;
 		info->sector_count = 35;
 		info->size = 0x00400000;
-		break;				/* => 4 MB		*/
+		break;					/* => 4 MB	*/
 
 	case AMD_ID_LV160B:
 		info->flash_id += FLASH_AM160B;
 		info->sector_count = 35;
 		info->size = 0x00400000;
-		break;				/* => 4 MB		*/
+		break;					/* => 4 MB	*/
+
+	case AMD_ID_DL163B:
+		info->flash_id += FLASH_AMDL163B;
+		info->sector_count = 39;
+		info->size = 0x00400000;
+		break;					/* => 4 MB	*/
 
 	default:
 		info->flash_id = FLASH_UNKNOWN;
@@ -402,6 +434,18 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
 				base += 0x20000;
 			}
 			break;
+		case FLASH_AMLV320B:
+			for (i = 0; i < info->sector_count; i++) {
+				info->start[i] = base;
+				/*
+				 * The first 8 sectors are 8 kB,
+				 * all the other ones  are 64 kB
+				 */
+				base += (i < 8)
+					?  2 * ( 8 << 10)
+					:  2 * (64 << 10);
+			}
+			break;
 		}
 		break;
 # else	/* ! TQM8xxM */
@@ -472,11 +516,24 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
 			info->start[i] = base + i * 0x00020000;
 		}
 		break;
+	case AMD_ID_DL163B:
+		for (i = 0; i < info->sector_count; i++) {
+			info->start[i] = base;
+			/*
+			 * The first 8 sectors are 8 kB,
+			 * all the other ones  are 64 kB
+			 */
+			base += (i < 8)
+				?  2 * ( 8 << 10)
+				:  2 * (64 << 10);
+		}
+		break;
 	default:
 		return (0);
 		break;
 	}
 
+#if 0
 	/* check for protected sectors */
 	for (i = 0; i < info->sector_count; i++) {
 		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
@@ -484,6 +541,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
 		addr = (volatile unsigned long *)(info->start[i]);
 		info->protect[i] = addr[2] & 1;
 	}
+#endif
 
 	/*
 	 * Prevent writes to uninitialized FLASH.
diff --git a/board/tqm8xx/tqm8xx.c b/board/tqm8xx/tqm8xx.c
index 5f74650..c6b53ab 100644
--- a/board/tqm8xx/tqm8xx.c
+++ b/board/tqm8xx/tqm8xx.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2000, 2001, 2002
+ * (C) Copyright 2000-2004
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -21,6 +21,10 @@
  * MA 02111-1307 USA
  */
 
+#if 0
+#define DEBUG
+#endif
+
 #include <common.h>
 #include <mpc8xx.h>
 
@@ -92,7 +96,7 @@ const uint sdram_table[] =
  * If present, check for "L" type (no second DRAM bank),
  * otherwise "L" type is assumed as default.
  *
- * Set board_type to 'L' for "L" type, 0 else.
+ * Set board_type to 'L' for "L" type, 'M' for "M" type, 0 else.
  */
 
 int checkboard (void)
@@ -112,6 +116,10 @@ int checkboard (void)
 		gd->board_type = 'L';
 	}
 
+	if ((*(s + 6) == 'M')) {	/* a TQM8xxM type */
+		gd->board_type = 'M';
+	}
+
 	for (; *s; ++s) {
 		if (*s == ' ')
 			break;
@@ -167,7 +175,8 @@ long int initdram (int board_type)
 	memctl->memc_br2 = CFG_BR2_PRELIM;
 
 #ifndef	CONFIG_CAN_DRIVER
-	if (board_type != 'L') {	/* "L" type boards have only one bank SDRAM */
+	if ((board_type != 'L') &&
+	    (board_type != 'M') ) {	/* "L" and "M" type boards have only one bank SDRAM */
 		memctl->memc_or3 = CFG_OR3_PRELIM;
 		memctl->memc_br3 = CFG_BR3_PRELIM;
 	}
@@ -185,7 +194,8 @@ long int initdram (int board_type)
 	udelay (1);
 
 #ifndef	CONFIG_CAN_DRIVER
-	if (board_type != 'L') {	/* "L" type boards have only one bank SDRAM */
+	if ((board_type != 'L') &&
+	    (board_type != 'M') ) {	/* "L" and "M" type boards have only one bank SDRAM */
 		memctl->memc_mcr = 0x80006105;	/* SDRAM bank 1 */
 		udelay (1);
 		memctl->memc_mcr = 0x80006230;	/* SDRAM bank 1 - execute twice */
@@ -204,6 +214,7 @@ long int initdram (int board_type)
 	 */
 	size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE2_PRELIM,
 					   SDRAM_MAX_SIZE);
+	debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size8 >> 20);
 
 	udelay (1000);
 
@@ -212,33 +223,33 @@ long int initdram (int board_type)
 	 */
 	size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE2_PRELIM,
 					   SDRAM_MAX_SIZE);
+	debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size9 >> 20);
 
 	if (size8 < size9) {		/* leave configuration at 9 columns */
 		size_b0 = size9;
-/*	debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20);	*/
 	} else {					/* back to 8 columns            */
 		size_b0 = size8;
 		memctl->memc_mamr = CFG_MAMR_8COL;
 		udelay (500);
-/*	debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20);	*/
 	}
+	debug ("SDRAM Bank 0: %ld MB\n", size_b0 >> 20);
 
 #ifndef	CONFIG_CAN_DRIVER
-	if (board_type != 'L') {	/* "L" type boards have only one bank SDRAM */
+	if ((board_type != 'L') &&
+	    (board_type != 'M') ) {	/* "L" and "M" type boards have only one bank SDRAM */
 		/*
 		 * Check Bank 1 Memory Size
 		 * use current column settings
 		 * [9 column SDRAM may also be used in 8 column mode,
 		 *  but then only half the real size will be used.]
 		 */
-		size_b1 =
-				dram_size (memctl->memc_mamr, (ulong *) SDRAM_BASE3_PRELIM,
-						   SDRAM_MAX_SIZE);
-/*	debug ("SDRAM Bank 1: %ld MB\n", size8 >> 20);	*/
+		size_b1 = dram_size (memctl->memc_mamr, (ulong *) SDRAM_BASE3_PRELIM,
+				     SDRAM_MAX_SIZE);
+		debug ("SDRAM Bank 1: %ld MB\n", size_b1 >> 20);
 	} else {
 		size_b1 = 0;
 	}
-#endif							/* CONFIG_CAN_DRIVER */
+#endif	/* CONFIG_CAN_DRIVER */
 
 	udelay (1000);
 
@@ -383,8 +394,7 @@ long int initdram (int board_type)
  * - short between data lines
  */
 
-static long int dram_size (long int mamr_value, long int *base,
-						   long int maxsize)
+static long int dram_size (long int mamr_value, long int *base, long int maxsize)
 {
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
diff --git a/board/trab/auto_update.c b/board/trab/auto_update.c
index 36fdf18..393e094 100644
--- a/board/trab/auto_update.c
+++ b/board/trab/auto_update.c
@@ -279,8 +279,8 @@ au_check_header_valid(int idx, long nbytes)
 		printf ("Image %s wrong type\n", aufile[idx]);
 		return -1;
 	}
-	if ((idx == IDX_APP) && (hdr->ih_type != IH_TYPE_RAMDISK) 
-            && (hdr->ih_type != IH_TYPE_FILESYSTEM)) {
+	if ((idx == IDX_APP) && (hdr->ih_type != IH_TYPE_RAMDISK)
+	    && (hdr->ih_type != IH_TYPE_FILESYSTEM)) {
 		printf ("Image %s wrong type\n", aufile[idx]);
 		return -1;
 	}