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| author | Stephen Warren <swarren@nvidia.com> | 2016-07-29 13:15:06 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2016-08-15 10:26:13 -0700 |
| commit | a6bb0084c2797b1e16403e2e812737ca1fb37669 (patch) | |
| tree | e336113693bda3396f03baa8d99bea82315f621e /board | |
| parent | 45d85f0872ef92779ea5b51a424845a919a41462 (diff) | |
| download | u-boot-imx-a6bb0084c2797b1e16403e2e812737ca1fb37669.zip u-boot-imx-a6bb0084c2797b1e16403e2e812737ca1fb37669.tar.gz u-boot-imx-a6bb0084c2797b1e16403e2e812737ca1fb37669.tar.bz2 | |
ARM: tegra: enable PCIe controller on p2771-0000
p2771-0000 has a couple of PCIe ports; one physically x4 desktop PCI
connector (which may run at x2 electrically, depending on the board
version and configuration) and a x1 connection to the M.2 slot (which may
not be active, depending on the board version and configuration). This
change enables those.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/nvidia/p2771-0000/p2771-0000.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c index 0c828a2..529ed9d 100644 --- a/board/nvidia/p2771-0000/p2771-0000.c +++ b/board/nvidia/p2771-0000/p2771-0000.c @@ -31,3 +31,25 @@ int tegra_board_init(void) return 0; } + +int tegra_pcie_board_init(void) +{ + struct udevice *dev; + uchar val; + int ret; + + /* Turn on MAX77620 LDO7 to 1.05V for PEX power */ + debug("%s: Set LDO7 for PEX power to 1.05V\n", __func__); + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); + return -1; + } + /* 0xC5 for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ + val = 0xC5; + ret = dm_i2c_write(dev, MAX77620_CNFG1_L7_REG, &val, 1); + if (ret) + printf("i2c_write 0 0x3c 0x31 failed: %d\n", ret); + + return 0; +} |