ppx4xx: remove APC405 board

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>

6 files changed, 0 insertions, 5626 deletions

diff --git a/board/esd/apc405/Kconfig b/board/esd/apc405/Kconfig
deleted file mode 100644
index 6b03460..0000000
--- a/board/esd/apc405/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_APC405
-
-config SYS_BOARD
-	default "apc405"
-
-config SYS_VENDOR
-	default "esd"
-
-config SYS_CONFIG_NAME
-	default "APC405"
-
-endif
diff --git a/board/esd/apc405/MAINTAINERS b/board/esd/apc405/MAINTAINERS
deleted file mode 100644
index 7f2a33f..0000000
--- a/board/esd/apc405/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-APC405 BOARD
-M:	Matthias Fuchs <matthias.fuchs@esd-electronics.com>
-S:	Maintained
-F:	board/esd/apc405/
-F:	include/configs/APC405.h
-F:	configs/APC405_defconfig
diff --git a/board/esd/apc405/Makefile b/board/esd/apc405/Makefile
deleted file mode 100644
index ada8bfd..0000000
--- a/board/esd/apc405/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	= apc405.o \
-	../common/misc.o \
-	../common/auto_update.o
diff --git a/board/esd/apc405/apc405.c b/board/esd/apc405/apc405.c
deleted file mode 100644
index 5cc1d0d..0000000
--- a/board/esd/apc405/apc405.c
+++ /dev/null
@@ -1,461 +0,0 @@
-/*
- * (C) Copyright 2005-2008
- * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
- *
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <command.h>
-#include <malloc.h>
-#include <flash.h>
-#include <mtd/cfi_flash.h>
-#include <asm/4xx_pci.h>
-#include <pci.h>
-#include <usb.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#undef FPGA_DEBUG
-
-extern void lxt971_no_sleep(void);
-
-/* fpga configuration data - gzip compressed and generated by bin2c */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-#ifdef CONFIG_LCD_USED
-/* logo bitmap data - gzip compressed and generated by bin2c */
-unsigned char logo_bmp[] =
-{
-#include "logo_640_480_24bpp.c"
-};
-
-/*
- * include common lcd code (for esd boards)
- */
-#include "../common/lcd.c"
-#include "../common/s1d13505_640_480_16bpp.h"
-#include "../common/s1d13806_640_480_16bpp.h"
-#endif /* CONFIG_LCD_USED */
-
-/*
- * include common auto-update code (for esd boards)
- */
-#include "../common/auto_update.h"
-
-au_image_t au_image[] = {
-	{"preinst.img", 0, -1, AU_SCRIPT},
-	{"u-boot.img", 0xfff80000, 0x00080000, AU_FIRMWARE | AU_PROTECT},
-	{"pImage", 0xfe000000, 0x00100000, AU_NOR | AU_PROTECT},
-	{"pImage.initrd", 0xfe100000, 0x00400000, AU_NOR | AU_PROTECT},
-	{"work.img", 0xfe500000, 0x01400000, AU_NOR},
-	{"data.img", 0xff900000, 0x00580000, AU_NOR},
-	{"logo.img", 0xffe80000, 0x00100000, AU_NOR | AU_PROTECT},
-	{"postinst.img", 0, 0, AU_SCRIPT},
-};
-
-int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
-
-int board_revision(void)
-{
-	unsigned long CPC0_CR0Reg;
-	unsigned long value;
-
-	/*
-	 * Get version of APC405 board from GPIO's
-	 */
-
-	/* Setup GPIO pins (CS2/GPIO11, CS3/GPIO12 and CS4/GPIO13 as GPIO) */
-	CPC0_CR0Reg = mfdcr(CPC0_CR0);
-	mtdcr(CPC0_CR0, CPC0_CR0Reg | 0x03800000);
-	out_be32((void*)GPIO0_ODR, in_be32((void*)GPIO0_ODR) & ~0x001c0000);
-	out_be32((void*)GPIO0_TCR, in_be32((void*)GPIO0_TCR) & ~0x001c0000);
-
-	/* wait some time before reading input */
-	udelay(1000);
-
-	/* get config bits */
-	value = in_be32((void*)GPIO0_IR) & 0x001c0000;
-	/*
-	 * Restore GPIO settings
-	 */
-	mtdcr(CPC0_CR0, CPC0_CR0Reg);
-
-	switch (value) {
-	case 0x001c0000:
-		/* CS2==1 && CS3==1 && CS4==1 -> version <= 1.2 */
-		return 2;
-	case 0x000c0000:
-		/* CS2==0 && CS3==1 && CS4==1 -> version 1.3 */
-		return 3;
-	case 0x00180000:
-		/* CS2==1 && CS3==1 && CS4==0 -> version 1.6 */
-		return 6;
-	case 0x00140000:
-		/* CS2==1 && CS3==0 && CS4==1 -> version 1.8 */
-		return 8;
-	default:
-		/* should not be reached! */
-		return 0;
-	}
-}
-
-int board_early_init_f (void)
-{
-	/*
-	 * First pull fpga-prg pin low, to disable fpga logic
-	 */
-	out_be32((void*)GPIO0_ODR, 0x00000000);        /* no open drain pins */
-	out_be32((void*)GPIO0_TCR, CONFIG_SYS_FPGA_PRG);      /* setup for output   */
-	out_be32((void*)GPIO0_OR, 0);                  /* pull prg low       */
-
-	/*
-	 * IRQ 0-15  405GP internally generated; active high; level sensitive
-	 * IRQ 16    405GP internally generated; active low; level sensitive
-	 * IRQ 17-24 RESERVED
-	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
-	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
-	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
-	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
-	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
-	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
-	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
-	 */
-	mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
-	mtdcr(UIC0ER, 0x00000000);       /* disable all ints */
-	mtdcr(UIC0CR, 0x00000000);       /* set all to be non-critical*/
-	mtdcr(UIC0PR, 0xFFFFFF81);       /* set int polarities */
-	mtdcr(UIC0TR, 0x10000000);       /* set int trigger levels */
-	mtdcr(UIC0VCR, 0x00000001);      /* set vect base=0 */
-	mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
-
-	/*
-	 * EBC Configuration Register: set ready timeout to 512 ebc-clks
-	 */
-	mtebc(EBC0_CFG, 0xa8400000); /* ebc always driven */
-
-	/*
-	 * New boards have a single 32MB flash connected to CS0
-	 * instead of two 16MB flashes on CS0+1.
-	 */
-	if (board_revision() >= 8) {
-		/* disable CS1 */
-		mtebc(PB1AP, 0);
-		mtebc(PB1CR, 0);
-
-		/* resize CS0 to 32MB */
-		mtebc(PB0AP, CONFIG_SYS_EBC_PB0AP_HWREV8);
-		mtebc(PB0CR, CONFIG_SYS_EBC_PB0CR_HWREV8);
-	}
-
-	return 0;
-}
-
-int board_early_init_r(void)
-{
-	if (gd->board_type >= 8)
-		cfi_flash_num_flash_banks = 1;
-
-	return 0;
-}
-
-#define FUJI_BASE    0xf0100200
-#define LCDBL_PWM    0xa0
-#define LCDBL_PWMMIN 0xa4
-#define LCDBL_PWMMAX 0xa8
-
-int misc_init_r(void)
-{
-	u16 *fpga_mode = (u16 *)(CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL);
-	u16 *fpga_ctrl2 =(u16 *)(CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL2);
-	u8 *duart0_mcr = (u8 *)(DUART0_BA + 4);
-	u8 *duart1_mcr = (u8 *)(DUART1_BA + 4);
-	unsigned char *dst;
-	ulong len = sizeof(fpgadata);
-	int status;
-	int index;
-	int i;
-	unsigned long CPC0_CR0Reg;
-	char *str;
-	uchar *logo_addr;
-	ulong logo_size;
-	ushort minb, maxb;
-	int result;
-
-	/*
-	 * Setup GPIO pins (CS6+CS7 as GPIO)
-	 */
-	CPC0_CR0Reg = mfdcr(CPC0_CR0);
-	mtdcr(CPC0_CR0, CPC0_CR0Reg | 0x00300000);
-
-	dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
-	if (gunzip(dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
-		printf("GUNZIP ERROR - must RESET board to recover\n");
-		do_reset(NULL, 0, 0, NULL);
-	}
-
-	status = fpga_boot(dst, len);
-	if (status != 0) {
-		printf("\nFPGA: Booting failed ");
-		switch (status) {
-		case ERROR_FPGA_PRG_INIT_LOW:
-			printf("(Timeout: "
-			       "INIT not low after asserting PROGRAM*)\n ");
-			break;
-		case ERROR_FPGA_PRG_INIT_HIGH:
-			printf("(Timeout: "
-			       "INIT not high after deasserting PROGRAM*)\n ");
-			break;
-		case ERROR_FPGA_PRG_DONE:
-			printf("(Timeout: "
-			       "DONE not high after programming FPGA)\n ");
-			break;
-		}
-
-		/* display infos on fpgaimage */
-		index = 15;
-		for (i = 0; i < 4; i++) {
-			len = dst[index];
-			printf("FPGA: %s\n", &(dst[index+1]));
-			index += len + 3;
-		}
-		putc('\n');
-		/* delayed reboot */
-		for (i = 20; i > 0; i--) {
-			printf("Rebooting in %2d seconds \r",i);
-			for (index = 0; index < 1000; index++)
-				udelay(1000);
-		}
-		putc('\n');
-		do_reset(NULL, 0, 0, NULL);
-	}
-
-	/* restore gpio/cs settings */
-	mtdcr(CPC0_CR0, CPC0_CR0Reg);
-
-	puts("FPGA:  ");
-
-	/* display infos on fpgaimage */
-	index = 15;
-	for (i = 0; i < 4; i++) {
-		len = dst[index];
-		printf("%s ", &(dst[index + 1]));
-		index += len + 3;
-	}
-	putc('\n');
-
-	free(dst);
-
-	/*
-	 * Reset FPGA via FPGA_DATA pin
-	 */
-	SET_FPGA(FPGA_PRG | FPGA_CLK);
-	udelay(1000); /* wait 1ms */
-	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
-	udelay(1000); /* wait 1ms */
-
-	/*
-	 * Write board revision in FPGA
-	 */
-	out_be16(fpga_ctrl2,
-		 (in_be16(fpga_ctrl2) & 0xfff0) | (gd->board_type & 0x000f));
-
-	/*
-	 * Enable power on PS/2 interface (with reset)
-	 */
-	out_be16(fpga_mode, in_be16(fpga_mode) | CONFIG_SYS_FPGA_CTRL_PS2_RESET);
-	for (i=0;i<100;i++)
-		udelay(1000);
-	udelay(1000);
-	out_be16(fpga_mode, in_be16(fpga_mode) & ~CONFIG_SYS_FPGA_CTRL_PS2_RESET);
-
-	/*
-	 * Enable interrupts in exar duart mcr[3]
-	 */
-	out_8(duart0_mcr, 0x08);
-	out_8(duart1_mcr, 0x08);
-
-	/*
-	 * Init lcd interface and display logo
-	 */
-	str = getenv("splashimage");
-	if (str) {
-		logo_addr = (uchar *)simple_strtoul(str, NULL, 16);
-		logo_size = CONFIG_SYS_VIDEO_LOGO_MAX_SIZE;
-	} else {
-		logo_addr = logo_bmp;
-		logo_size = sizeof(logo_bmp);
-	}
-
-	if (gd->board_type >= 6) {
-		result = lcd_init((uchar *)CONFIG_SYS_LCD_BIG_REG,
-				  (uchar *)CONFIG_SYS_LCD_BIG_MEM,
-				  regs_13505_640_480_16bpp,
-				  sizeof(regs_13505_640_480_16bpp) /
-				  sizeof(regs_13505_640_480_16bpp[0]),
-				  logo_addr, logo_size);
-		if (result && str) {
-			/* retry with internal image */
-			logo_addr = logo_bmp;
-			logo_size = sizeof(logo_bmp);
-			lcd_init((uchar *)CONFIG_SYS_LCD_BIG_REG,
-				 (uchar *)CONFIG_SYS_LCD_BIG_MEM,
-				 regs_13505_640_480_16bpp,
-				 sizeof(regs_13505_640_480_16bpp) /
-				 sizeof(regs_13505_640_480_16bpp[0]),
-				 logo_addr, logo_size);
-		}
-	} else {
-		result = lcd_init((uchar *)CONFIG_SYS_LCD_BIG_REG,
-				  (uchar *)CONFIG_SYS_LCD_BIG_MEM,
-				  regs_13806_640_480_16bpp,
-				  sizeof(regs_13806_640_480_16bpp) /
-				  sizeof(regs_13806_640_480_16bpp[0]),
-				  logo_addr, logo_size);
-		if (result && str) {
-			/* retry with internal image */
-			logo_addr = logo_bmp;
-			logo_size = sizeof(logo_bmp);
-			lcd_init((uchar *)CONFIG_SYS_LCD_BIG_REG,
-				 (uchar *)CONFIG_SYS_LCD_BIG_MEM,
-				 regs_13806_640_480_16bpp,
-				 sizeof(regs_13806_640_480_16bpp) /
-				 sizeof(regs_13806_640_480_16bpp[0]),
-				 logo_addr, logo_size);
-		}
-	}
-
-	/*
-	 * Reset microcontroller and setup backlight PWM controller
-	 */
-	out_be16(fpga_mode, in_be16(fpga_mode) | 0x0014);
-	for (i=0;i<10;i++)
-		udelay(1000);
-	out_be16(fpga_mode, in_be16(fpga_mode) | 0x001c);
-
-	minb = 0;
-	maxb = 0xff;
-	str = getenv("lcdbl");
-	if (str) {
-		minb = (ushort)simple_strtoul(str, &str, 16) & 0x00ff;
-		if (str && (*str=',')) {
-			str++;
-			maxb = (ushort)simple_strtoul(str, NULL, 16) & 0x00ff;
-		} else
-			minb = 0;
-
-		out_be16((u16 *)(FUJI_BASE + LCDBL_PWMMIN), minb);
-		out_be16((u16 *)(FUJI_BASE + LCDBL_PWMMAX), maxb);
-
-		printf("LCDBL: min=0x%02x, max=0x%02x\n", minb, maxb);
-	}
-	out_be16((u16 *)(FUJI_BASE + LCDBL_PWM), 0xff);
-
-	/*
-	 * fix environment for field updated units
-	 */
-	if (getenv("altbootcmd") == NULL) {
-		setenv("usb_load", CONFIG_SYS_USB_LOAD_COMMAND);
-		setenv("usbargs", CONFIG_SYS_USB_ARGS);
-		setenv("bootcmd", CONFIG_BOOTCOMMAND);
-		setenv("usb_self", CONFIG_SYS_USB_SELF_COMMAND);
-		setenv("bootlimit", CONFIG_SYS_BOOTLIMIT);
-		setenv("altbootcmd", CONFIG_SYS_ALT_BOOTCOMMAND);
-		saveenv();
-	}
-
-	return (0);
-}
-
-/*
- * Check Board Identity:
- */
-int checkboard (void)
-{
-	char str[64];
-	int i = getenv_f("serial#", str, sizeof(str));
-
-	puts ("Board: ");
-
-	if (i == -1) {
-		puts ("### No HW ID - assuming APC405");
-	} else {
-		puts(str);
-	}
-
-	gd->board_type = board_revision();
-	printf(", Rev. 1.%ld\n", gd->board_type);
-
-	return 0;
-}
-
-#ifdef CONFIG_IDE_RESET
-void ide_set_reset(int on)
-{
-	u16 *fpga_mode = (u16 *)(CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL);
-
-	/*
-	 * Assert or deassert CompactFlash Reset Pin
-	 */
-	if (on) {
-		out_be16(fpga_mode,
-			 in_be16(fpga_mode) & ~CONFIG_SYS_FPGA_CTRL_CF_RESET);
-	} else {
-		out_be16(fpga_mode,
-			 in_be16(fpga_mode) | CONFIG_SYS_FPGA_CTRL_CF_RESET);
-	}
-}
-#endif /* CONFIG_IDE_RESET */
-
-void reset_phy(void)
-{
-	/*
-	 * Disable sleep mode in LXT971
-	 */
-	lxt971_no_sleep();
-}
-
-#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_BOARD_INIT)
-int board_usb_init(int index, enum usb_init_type init)
-{
-	return 0;
-}
-
-int usb_board_stop(void)
-{
-	unsigned short tmp;
-	int i;
-
-	/*
-	 * reset PCI bus
-	 * This is required to make some very old Linux OHCI driver
-	 * work after U-Boot has used the OHCI controller.
-	 */
-	pci_read_config_word(PCIDEVID_405GP, PCIBRDGOPT2, &tmp);
-	pci_write_config_word(PCIDEVID_405GP, PCIBRDGOPT2, (tmp | 0x1000));
-
-	for (i = 0; i < 100; i++)
-		udelay(1000);
-
-	pci_write_config_word(PCIDEVID_405GP, PCIBRDGOPT2, tmp);
-	return 0;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return usb_board_stop();
-}
-#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_BOARD_INIT) */
diff --git a/board/esd/apc405/fpgadata.c b/board/esd/apc405/fpgadata.c
deleted file mode 100644
index b68668c..0000000
--- a/board/esd/apc405/fpgadata.c
+++ /dev/null
@@ -1,4008 +0,0 @@
-0x1f, 0x8b, 0x08, 0x08, 0x49, 0xe1, 0xdb, 0x46,
-0x00, 0x03, 0x61, 0x62, 0x67, 0x34, 0x30, 0x35,
-0x5f, 0x31, 0x5f, 0x30, 0x33, 0x2e, 0x62, 0x69,
-0x74, 0x00, 0xed, 0xfd, 0x7d, 0x7c, 0x14, 0xd7,
-0x75, 0x3f, 0x8e, 0x9f, 0xb9, 0x33, 0x12, 0xa3,
-0xdd, 0x95, 0x76, 0xf4, 0xe4, 0xac, 0x6d, 0x20,
-0xa3, 0x95, 0x20, 0x6b, 0xb2, 0x88, 0x45, 0x60,
-0x8c, 0xb1, 0x90, 0x06, 0x49, 0x26, 0x8a, 0x4d,
-0x8c, 0x4c, 0xdd, 0x84, 0xf6, 0x9b, 0xa6, 0x6b,
-0x42, 0x53, 0xda, 0x17, 0x49, 0x65, 0x27, 0x9f,
-0x96, 0xe6, 0x93, 0x26, 0x57, 0x2b, 0x81, 0x85,
-0x21, 0xf6, 0x1a, 0x93, 0x46, 0x4e, 0x69, 0xba,
-0x60, 0xea, 0xc8, 0x09, 0x4d, 0x96, 0x07, 0x9b,
-0x07, 0x53, 0x3c, 0xc2, 0x32, 0x11, 0x18, 0xdb,
-0x0a, 0x71, 0x53, 0xf9, 0x21, 0xf6, 0x9a, 0xc8,
-0x44, 0xb6, 0x89, 0x23, 0xdb, 0xc4, 0x11, 0xcf,
-0xdf, 0x73, 0xee, 0xec, 0x3c, 0xec, 0x4a, 0x24,
-0xe9, 0xe7, 0xf3, 0xf3, 0xef, 0xf7, 0xc7, 0x2f,
-0x9b, 0x3f, 0x72, 0x3c, 0x7b, 0x35, 0xcc, 0x3d,
-0x7b, 0xe7, 0xdc, 0xf7, 0x3d, 0xe7, 0x7d, 0xce,
-0x81, 0xa2, 0xe0, 0xa8, 0xf5, 0x3f, 0x00, 0xe9,
-0x4e, 0xd0, 0xee, 0x5c, 0xf1, 0xd7, 0x73, 0x63,
-0xd7, 0xff, 0xe5, 0xec, 0xbf, 0x8c, 0xcd, 0xa9,
-0xfd, 0xd2, 0xe7, 0x57, 0xc2, 0x0a, 0xf0, 0xd5,
-0x7d, 0xf9, 0xfa, 0xd8, 0x17, 0xfe, 0xba, 0xee,
-0xfa, 0x79, 0xf0, 0x79, 0xf0, 0xd7, 0xc5, 0x62,
-0x37, 0xcc, 0xd2, 0x6f, 0x9c, 0xa5, 0xcf, 0x81,
-0x95, 0x50, 0x34, 0xbb, 0x6e, 0x41, 0x5d, 0xdd,
-0x82, 0x39, 0xd7, 0xc3, 0x5f, 0x81, 0x54, 0x1a,
-0xb8, 0x8c, 0x9f, 0xef, 0x3f, 0xf4, 0xa7, 0x5f,
-0x88, 0x01, 0x97, 0x00, 0x60, 0x52, 0x4c, 0x8a,
-0xd3, 0xff, 0xfb, 0x63, 0x92, 0x2e, 0x01, 0x6f,
-0x9c, 0x19, 0x03, 0x93, 0xfe, 0x1b, 0xb2, 0xdf,
-0x17, 0xc5, 0x40, 0xf7, 0xfe, 0xb7, 0x14, 0x03,
-0x03, 0xda, 0xa0, 0x41, 0x81, 0x32, 0xf8, 0xfd,
-0x1f, 0x09, 0x14, 0x6e, 0xcb, 0xff, 0xd3, 0xf1,
-0xec, 0x0f, 0x18, 0x8f, 0x9f, 0xff, 0xe3, 0xf1,
-0x7f, 0xc8, 0xf3, 0x00, 0x28, 0xff, 0xc7, 0xe3,
-0xb5, 0x3f, 0x6c, 0xbc, 0x2d, 0x5c, 0xd6, 0xa0,
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diff --git a/board/esd/apc405/logo_640_480_24bpp.c b/board/esd/apc405/logo_640_480_24bpp.c
deleted file mode 100644
index a218032..0000000
--- a/board/esd/apc405/logo_640_480_24bpp.c
+++ /dev/null
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