Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

* 'master' of git://git.denx.de/u-boot-mpc85xx:
  mpc85xx: Add inline GPIO acessor functions
  powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)
  powerpc/85xx: Fix P2020DS booting
  powerpc/85xx: Update USB device tree status based on pin settings
  fdt: Add new fdt_set_node_status & fdt_set_status_by_alias helpers
  powerpc/85xx: Add support for RMan LIODN initialization
  powerpc/85xx: Update device tree handling for SRIO
  powerpc/85xx: Update setting of SRIO LIODNs
  fm: Don't allow disabling of FM1-DTSEC1
  fm-eth: Don't mark the MAC we use for MDIO as disabled in device tree

3 files changed, 56 insertions, 56 deletions

diff --git a/board/freescale/corenet_ds/eth_hydra.c b/board/freescale/corenet_ds/eth_hydra.c
index 91b3408..a7a5e13 100644
--- a/board/freescale/corenet_ds/eth_hydra.c
+++ b/board/freescale/corenet_ds/eth_hydra.c
@@ -70,6 +70,7 @@
 #include <fm_eth.h>
 #include <fsl_mdio.h>
 #include <malloc.h>
+#include <fdt_support.h>
 #include <asm/fsl_dtsec.h>
 
 #include "../common/ngpixis.h"
@@ -200,25 +201,6 @@ static int hydra_mdio_init(char *realbusname, char *fakebusname)
 }
 
 /*
- * Given an alias or a path for a node, set the status of that node.
- *
- * If 'alias' is not a valid alias, then it is treated as a full path to the
- * node.  No error checking is performed.
- *
- * This function is normally called to set the status for a virtual MDIO node.
- */
-static void fdt_set_node_status(void *fdt, const char *alias,
-				const char *status)
-{
-	const char *path = fdt_get_alias(fdt, alias);
-
-	if (!path)
-		path = alias;
-
-	do_fixup_by_path(fdt, path, "status", status, strlen(status) + 1, 1);
-}
-
-/*
  * Given an alias or a path for a node, set the mux value of that node.
  *
  * If 'alias' is not a valid alias, then it is treated as a full path to the
@@ -372,14 +354,14 @@ void fdt_fixup_board_enet(void *fdt)
 		case PHY_INTERFACE_MODE_SGMII:
 			lane = serdes_get_first_lane(SGMII_FM1_DTSEC1 + idx);
 			if (lane >= 0) {
-				fdt_set_node_status(fdt, "emi1_sgmii", "okay");
+				fdt_status_okay_by_alias(fdt, "emi1_sgmii");
 				/* Also set the MUX value */
 				fdt_set_mdio_mux(fdt, "emi1_sgmii",
 						 mdio_mux[i].val);
 			}
 			break;
 		case PHY_INTERFACE_MODE_RGMII:
-			fdt_set_node_status(fdt, "emi1_rgmii", "okay");
+			fdt_status_okay_by_alias(fdt, "emi1_rgmii");
 			break;
 		default:
 			break;
@@ -388,7 +370,7 @@ void fdt_fixup_board_enet(void *fdt)
 
 	lane = serdes_get_first_lane(XAUI_FM1);
 	if (lane >= 0)
-		fdt_set_node_status(fdt, "emi2_xgmii", "okay");
+		fdt_status_okay_by_alias(fdt, "emi2_xgmii");
 #endif
 }
 
diff --git a/board/freescale/corenet_ds/eth_p4080.c b/board/freescale/corenet_ds/eth_p4080.c
index d4657f7..7ff00d1 100644
--- a/board/freescale/corenet_ds/eth_p4080.c
+++ b/board/freescale/corenet_ds/eth_p4080.c
@@ -93,21 +93,43 @@ struct mii_dev *mii_dev_for_muxval(u32 muxval)
 	return bus;
 }
 
-#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
+#if defined(CONFIG_SYS_P4080_ERRATUM_SERDES9) && defined(CONFIG_PHY_TERANETICS)
 int board_phy_config(struct phy_device *phydev)
 {
-	/*
-	 * If this is the 10G PHY, and we switched it to fiber,
-	 * we need to reset the serdes link for SERDES9
-	 */
-	if ((phydev->port == PORT_FIBRE) && (phydev->drv->uid == 0x00a19410)) {
+	if (phydev->drv->uid == PHY_UID_TN2020) {
+		unsigned long timeout = 1 * 1000; /* 1 seconds */
 		enum srds_prtcl device;
 
+		/*
+		 * Wait for the XAUI to come out of reset.  This is when it
+		 * starts transmitting alignment signals.
+		 */
+		while (--timeout) {
+			int reg = phy_read(phydev, MDIO_MMD_PHYXS, MDIO_CTRL1);
+			if (reg < 0) {
+				printf("TN2020: Error reading from PHY at "
+				       "address %u\n", phydev->addr);
+				break;
+			}
+			/*
+			 * Note that we've never actually seen
+			 * MDIO_CTRL1_RESET set to 1.
+			 */
+			if ((reg & MDIO_CTRL1_RESET) == 0)
+				break;
+			udelay(1000);
+		}
+
+		if (!timeout) {
+			printf("TN2020: Timeout waiting for PHY at address %u "
+			       " to reset.\n", phydev->addr);
+		}
+
 		switch (phydev->addr) {
-		case 4:
+		case CONFIG_SYS_FM1_10GEC1_PHY_ADDR:
 			device = XAUI_FM1;
 			break;
-		case 0:
+		case CONFIG_SYS_FM2_10GEC1_PHY_ADDR:
 			device = XAUI_FM2;
 			break;
 		default:
@@ -199,22 +221,6 @@ static int p4080ds_mdio_init(char *realbusname, u32 muxval)
 	return mdio_register(bus);
 }
 
-/*
- * Sets the specified node's status to the value contained in "status"
- * If the first character of the specified path is "/" then we use
- * alias as a path.  Otherwise, we look for an alias of that name
- */
-static void fdt_set_node_status(void *fdt, const char *alias,
-			const char *status)
-{
-	const char *path = fdt_get_alias(fdt, alias);
-
-	if (!path)
-		path = alias;
-
-	do_fixup_by_path(fdt, path, "status", status, strlen(status) + 1, 1);
-}
-
 void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
 				enum fm_port port, int offset)
 {
@@ -255,28 +261,28 @@ void fdt_fixup_board_enet(void *fdt)
 	 */
 
 	/* We've got six MDIO nodes that may or may not need to exist */
-	fdt_set_node_status(fdt, "emi1_slot3", "disabled");
-	fdt_set_node_status(fdt, "emi1_slot4", "disabled");
-	fdt_set_node_status(fdt, "emi1_slot5", "disabled");
-	fdt_set_node_status(fdt, "emi2_slot4", "disabled");
-	fdt_set_node_status(fdt, "emi2_slot5", "disabled");
+	fdt_status_disabled_by_alias(fdt, "emi1_slot3");
+	fdt_status_disabled_by_alias(fdt, "emi1_slot4");
+	fdt_status_disabled_by_alias(fdt, "emi1_slot5");
+	fdt_status_disabled_by_alias(fdt, "emi2_slot4");
+	fdt_status_disabled_by_alias(fdt, "emi2_slot5");
 
 	for (i = 0; i < NUM_FM_PORTS; i++) {
 		switch (mdio_mux[i]) {
 		case EMI1_SLOT3:
-			fdt_set_node_status(fdt, "emi1_slot3", "okay");
+			fdt_status_okay_by_alias(fdt, "emi1_slot3");
 			break;
 		case EMI1_SLOT4:
-			fdt_set_node_status(fdt, "emi1_slot4", "okay");
+			fdt_status_okay_by_alias(fdt, "emi1_slot4");
 			break;
 		case EMI1_SLOT5:
-			fdt_set_node_status(fdt, "emi1_slot5", "okay");
+			fdt_status_okay_by_alias(fdt, "emi1_slot5");
 			break;
 		case EMI2_SLOT4:
-			fdt_set_node_status(fdt, "emi2_slot4", "okay");
+			fdt_status_okay_by_alias(fdt, "emi2_slot4");
 			break;
 		case EMI2_SLOT5:
-			fdt_set_node_status(fdt, "emi2_slot5", "okay");
+			fdt_status_okay_by_alias(fdt, "emi2_slot5");
 			break;
 		}
 	}
diff --git a/board/freescale/p2020ds/ddr.c b/board/freescale/p2020ds/ddr.c
index c43f874..59034f9 100644
--- a/board/freescale/p2020ds/ddr.c
+++ b/board/freescale/p2020ds/ddr.c
@@ -57,6 +57,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
 {
 	const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
 	ulong ddr_freq;
+	int i;
 
 	if (ctrl_num) {
 		printf("Wrong parameter for controller number %d", ctrl_num);
@@ -65,6 +66,17 @@ void fsl_ddr_board_options(memctl_options_t *popts,
 	if (!pdimm->n_ranks)
 		return;
 
+	/*
+	 * set odt_rd_cfg and odt_wr_cfg. If the there is only one dimm in
+	 * that controller, set odt_wr_cfg to 4 for CS0, and 0 to CS1. If
+	 * there are two dimms in the controller, set odt_rd_cfg to 3 and
+	 * odt_wr_cfg to 3 for the even CS, 0 for the odd CS.
+	 */
+	for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
+		popts->cs_local_opts[i].odt_rd_cfg = 0;
+		popts->cs_local_opts[i].odt_wr_cfg = 1;
+	}
+
 	pbsp = dimm0;
 
 	/* Get clk_adjust, cpo, write_data_delay,2T, according to the board ddr