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authorBastian Ruppert <Bastian.Ruppert@Sewerin.de>2011-10-04 23:43:29 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-11-03 22:56:25 +0100
commitca1646b85d5d2be0ab524190875e6208f61ae8c6 (patch)
tree5051f1d3efed119754117a7a7c62fb4d456f2f90 /board
parentf9fc237f1f07d4e5ff7c9c2da39cabc8d3d7b339 (diff)
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Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console
Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de> Signed-off-by: Stefano Babic <sbabic@denx.de> CC: dzu@denx.de CC: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'board')
-rw-r--r--board/davinci/ea20/ea20.c30
1 files changed, 29 insertions, 1 deletions
diff --git a/board/davinci/ea20/ea20.c b/board/davinci/ea20/ea20.c
index 4e4107a..3b636ff 100644
--- a/board/davinci/ea20/ea20.c
+++ b/board/davinci/ea20/ea20.c
@@ -35,6 +35,7 @@
#include <asm/arch/emac_defs.h>
#include <asm/io.h>
#include <asm/arch/davinci_misc.h>
+#include <asm/arch/gpio.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -90,6 +91,12 @@ const struct pinmux_config nand_pins[] = {
};
#endif
+const struct pinmux_config gpio_pins[] = {
+ { pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/
+ { pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/
+ { pinmux(13), 8, 3 } /* GPIO6[12] U0_SW1 on EA20-00101_2*/
+};
+
static const struct pinmux_resource pinmuxes[] = {
#ifdef CONFIG_SPI_FLASH
PINMUX_ITEM(spi1_pins),
@@ -110,11 +117,32 @@ static const struct lpsc_resource lpsc[] = {
int board_init(void)
{
+ struct davinci_gpio *gpio6_base =
+ (struct davinci_gpio *)DAVINCI_GPIO_BANK67;
+
+ /* PinMux for GPIO */
+ if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
+ return 1;
+
+ /* Set the RESETOUTn low */
+ writel((readl(&gpio6_base->set_data) & ~(1 << 15)),
+ &gpio6_base->set_data);
+ writel((readl(&gpio6_base->dir) & ~(1 << 15)), &gpio6_base->dir);
+
+ /* Set U0_SW0 low for UART0 as console*/
+ writel((readl(&gpio6_base->set_data) & ~(1 << 10)),
+ &gpio6_base->set_data);
+ writel((readl(&gpio6_base->dir) & ~(1 << 10)), &gpio6_base->dir);
+
+ /* Set U0_SW1 low for UART0 as console*/
+ writel((readl(&gpio6_base->set_data) & ~(1 << 12)),
+ &gpio6_base->set_data);
+ writel((readl(&gpio6_base->dir) & ~(1 << 12)), &gpio6_base->dir);
+
#ifndef CONFIG_USE_IRQ
irq_init();
#endif
-
#ifdef CONFIG_NAND_DAVINCI
/*
* NAND CS setup - cycle counts based on da850evm NAND timings in the