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author | Lokesh Vutla <lokeshvutla@ti.com> | 2013-07-30 10:48:52 +0530 |
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committer | Tom Rini <trini@ti.com> | 2013-08-15 08:51:10 -0400 |
commit | 94d77fb656d49f2b0efe2de5605a52c5145d2c3b (patch) | |
tree | 0730083980308d786e0c44ceb61e4c156748b071 /board | |
parent | fdce7b633a1de24456226b18527cc7900c34282a (diff) | |
download | u-boot-imx-94d77fb656d49f2b0efe2de5605a52c5145d2c3b.zip u-boot-imx-94d77fb656d49f2b0efe2de5605a52c5145d2c3b.tar.gz u-boot-imx-94d77fb656d49f2b0efe2de5605a52c5145d2c3b.tar.bz2 |
ARM: AM33xx: Cleanup dplls data
Locking sequence for all the dplls is same.
In the current code same sequence is done repeatedly
for each dpll. Instead have a generic function
for locking dplls and pass dpll data to that function.
This is derived from OMAP4 boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'board')
-rw-r--r-- | board/isee/igep0033/board.c | 10 | ||||
-rw-r--r-- | board/phytec/pcm051/board.c | 9 | ||||
-rw-r--r-- | board/ti/am335x/board.c | 27 |
3 files changed, 46 insertions, 0 deletions
diff --git a/board/isee/igep0033/board.c b/board/isee/igep0033/board.c index c0f0c0d..034a8aa 100644 --- a/board/isee/igep0033/board.c +++ b/board/isee/igep0033/board.c @@ -66,6 +66,16 @@ static struct emif_regs ddr3_emif_reg_data = { .zq_config = K4B2G1646EBIH9_ZQ_CFG, .emif_ddr_phy_ctlr_1 = K4B2G1646EBIH9_EMIF_READ_LATENCY, }; + +#define OSC (V_OSCK/1000000) +const struct dpll_params dpll_ddr = { + 303, OSC-1, 1, -1, -1, -1, -1}; + +const struct dpll_params *get_dpll_ddr_params(void) +{ + return &dpll_ddr; +} + #endif /* diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c index 6291d03..17a98ff 100644 --- a/board/phytec/pcm051/board.c +++ b/board/phytec/pcm051/board.c @@ -44,6 +44,15 @@ static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; /* DDR RAM defines */ #define DDR_CLK_MHZ 303 /* DDR_DPLL_MULT value */ +#define OSC (V_OSCK/1000000) +const struct dpll_params dpll_ddr = { + DDR_CLK_MHZ, OSC-1, 1, -1, -1, -1, -1}; + +const struct dpll_params *get_dpll_ddr_params(void) +{ + return &dpll_ddr; +} + static const struct ddr_data ddr3_data = { .datardsratio0 = MT41J256M8HX15E_RD_DQS, .datawdsratio0 = MT41J256M8HX15E_WR_DQS, diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 728afc2..2be2297 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -242,6 +242,33 @@ int spl_start_uboot(void) } #endif +#define OSC (V_OSCK/1000000) +const struct dpll_params dpll_ddr = { + 266, OSC-1, 1, -1, -1, -1, -1}; +const struct dpll_params dpll_ddr_evm_sk = { + 303, OSC-1, 1, -1, -1, -1, -1}; +const struct dpll_params dpll_ddr_bone_black = { + 400, OSC-1, 1, -1, -1, -1, -1}; + +const struct dpll_params *get_dpll_ddr_params(void) +{ + struct am335x_baseboard_id header; + + enable_i2c0_pin_mux(); + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + if (read_eeprom(&header) < 0) + puts("Could not get board ID.\n"); + + if (board_is_evm_sk(&header)) + return &dpll_ddr_evm_sk; + else if (board_is_bone_lt(&header)) + return &dpll_ddr_bone_black; + else if (board_is_evm_15_or_later(&header)) + return &dpll_ddr_evm_sk; + else + return &dpll_ddr; +} + #endif /* |