diff options
author | Valentin Longchamp <valentin.longchamp@keymile.com> | 2013-10-18 11:47:23 +0200 |
---|---|---|
committer | York Sun <yorksun@freescale.com> | 2013-10-24 09:36:18 -0700 |
commit | 935b402eaec0f78ffdafd614aa8176a777d8b6d9 (patch) | |
tree | d6cf06666345e9a4ae5894bb2c1919a5f95fb798 /board | |
parent | 2f9e559a6cd0b33acbc00a2ea040121c03a8f80b (diff) | |
download | u-boot-imx-935b402eaec0f78ffdafd614aa8176a777d8b6d9.zip u-boot-imx-935b402eaec0f78ffdafd614aa8176a777d8b6d9.tar.gz u-boot-imx-935b402eaec0f78ffdafd614aa8176a777d8b6d9.tar.bz2 |
fsl/mpc85xx: define common serdes_clock_to_string function
This allows to share some common code for the boards that use a corenet
base SoC.
Two different versions of the function are available in
fsl_corenet_serdes.c and fsl_corenet2_serdes.c files.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: fix t1040qds.c]
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/b4860qds/b4860qds.c | 16 | ||||
-rw-r--r-- | board/freescale/corenet_ds/corenet_ds.c | 14 | ||||
-rw-r--r-- | board/freescale/p2041rdb/p2041rdb.c | 14 | ||||
-rw-r--r-- | board/freescale/t1040qds/t1040qds.c | 14 | ||||
-rw-r--r-- | board/freescale/t4qds/t4240qds.c | 16 |
5 files changed, 0 insertions, 74 deletions
diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c index f74651c..f6b012d 100644 --- a/board/freescale/b4860qds/b4860qds.c +++ b/board/freescale/b4860qds/b4860qds.c @@ -457,22 +457,6 @@ static int serdes_refclock(u8 sw, u8 sdclk) return ret; } -static const char *serdes_clock_to_string(u32 clock) -{ - switch (clock) { - case SRDS_PLLCR0_RFCK_SEL_100: - return "100"; - case SRDS_PLLCR0_RFCK_SEL_125: - return "125"; - case SRDS_PLLCR0_RFCK_SEL_156_25: - return "156.25"; - case SRDS_PLLCR0_RFCK_SEL_161_13: - return "161.13"; - default: - return "122.88"; - } -} - #define NUM_SRDS_BANKS 2 int misc_init_r(void) diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c index 60e2100..9212372 100644 --- a/board/freescale/corenet_ds/corenet_ds.c +++ b/board/freescale/corenet_ds/corenet_ds.c @@ -127,20 +127,6 @@ int board_early_init_r(void) return 0; } -static const char *serdes_clock_to_string(u32 clock) -{ - switch(clock) { - case SRDS_PLLCR0_RFCK_SEL_100: - return "100"; - case SRDS_PLLCR0_RFCK_SEL_125: - return "125"; - case SRDS_PLLCR0_RFCK_SEL_156_25: - return "156.25"; - default: - return "150"; - } -} - #define NUM_SRDS_BANKS 3 int misc_init_r(void) diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c index 60694a6..8554512 100644 --- a/board/freescale/p2041rdb/p2041rdb.c +++ b/board/freescale/p2041rdb/p2041rdb.c @@ -155,20 +155,6 @@ unsigned long get_board_sys_clk(unsigned long dummy) } } -static const char *serdes_clock_to_string(u32 clock) -{ - switch (clock) { - case SRDS_PLLCR0_RFCK_SEL_100: - return "100"; - case SRDS_PLLCR0_RFCK_SEL_125: - return "125"; - case SRDS_PLLCR0_RFCK_SEL_156_25: - return "156.25"; - default: - return "150"; - } -} - #define NUM_SRDS_BANKS 2 int misc_init_r(void) diff --git a/board/freescale/t1040qds/t1040qds.c b/board/freescale/t1040qds/t1040qds.c index 5abb18a..2aa176c 100644 --- a/board/freescale/t1040qds/t1040qds.c +++ b/board/freescale/t1040qds/t1040qds.c @@ -160,20 +160,6 @@ unsigned long get_board_ddr_clk(void) return 66666666; } -static const char *serdes_clock_to_string(u32 clock) -{ - switch (clock) { - case SRDS_PLLCR0_RFCK_SEL_100: - return "100"; - case SRDS_PLLCR0_RFCK_SEL_125: - return "125"; - case SRDS_PLLCR0_RFCK_SEL_156_25: - return "156.25"; - default: - return "Unknown frequency"; - } -} - #define NUM_SRDS_BANKS 2 int misc_init_r(void) { diff --git a/board/freescale/t4qds/t4240qds.c b/board/freescale/t4qds/t4240qds.c index 0c1a4fb..79b770b 100644 --- a/board/freescale/t4qds/t4240qds.c +++ b/board/freescale/t4qds/t4240qds.c @@ -608,22 +608,6 @@ unsigned long get_board_ddr_clk(void) return 66666666; } -static const char *serdes_clock_to_string(u32 clock) -{ - switch (clock) { - case SRDS_PLLCR0_RFCK_SEL_100: - return "100"; - case SRDS_PLLCR0_RFCK_SEL_125: - return "125"; - case SRDS_PLLCR0_RFCK_SEL_156_25: - return "156.25"; - case SRDS_PLLCR0_RFCK_SEL_161_13: - return "161.1328125"; - default: - return "???"; - } -} - int misc_init_r(void) { u8 sw; |