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authorRamneek Mehresh <ramneek.mehresh@freescale.com>2011-04-09 13:08:47 -0500
committerKumar Gala <galak@kernel.crashing.org>2011-04-27 22:29:03 -0500
commit2bad42a0c89bd1a977c05e994ba73e4e6030f945 (patch)
treea8938ca8aeee3240469f2b81b92fb450f9d4be84 /board
parent4b77047c2ac2262b8156382d3f1760c84fc0f273 (diff)
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powerpc/85xx: Add support for 2nd USB controller on p1_p2_rdb
Second USB controller only works for SPI and SD boot because of pin muxing Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/p1_p2_rdb/p1_p2_rdb.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c
index 0b4ae9d..d66b130 100644
--- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c
+++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c
@@ -47,6 +47,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define RGMII_PHY_RST_SET 0x02000000
#define USB_RST_CLR 0x04000000
+#define USB2_PORT_OUT_EN 0x01000000
#define GPIO_DIR 0x060f0000
@@ -128,6 +129,19 @@ int checkboard (void)
return 0;
}
+int misc_init_r(void)
+{
+#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+ ccsr_gpio_t *gpio = (void *)CONFIG_SYS_MPC85xx_GPIO_ADDR;
+
+ setbits_be32(&gpio->gpdir, USB2_PORT_OUT_EN);
+ setbits_be32(&gpio->gpdat, USB2_PORT_OUT_EN);
+ setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_ELBC_OFF_USB2_ON);
+#endif
+ return 0;
+}
+
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;