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authorStephen Warren <swarren@nvidia.com>2011-10-31 06:51:34 +0000
committerAndy Fleming <afleming@freescale.com>2011-11-03 02:15:00 -0500
commitde71fbe468b5531914735c88834187ae4e64202f (patch)
tree2ac6a41abc14ad190287e0d32dd1c7312e912760 /board
parent3e81c7724099f3f7e18bc3344825e63dcbf9a0f5 (diff)
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tegra2: Move MMC clock initialization into MMC driver
This centralizes knowledge of MMC clocking into the MMC driver. This also removes clock setup from the board files, which will simplify later changes that modify the Harmony board to support the correct set of MMC controllers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Cc: Andy Fleming <afleming@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board')
-rw-r--r--board/nvidia/common/board.c13
1 files changed, 1 insertions, 12 deletions
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index d13537d..370a259 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -102,16 +102,6 @@ static void pin_mux_uart(void)
#ifdef CONFIG_TEGRA2_MMC
/*
- * Routine: clock_init_mmc
- * Description: init the PLL and clocks for the SDMMC controllers
- */
-static void clock_init_mmc(void)
-{
- clock_start_periph_pll(PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH, 20000000);
- clock_start_periph_pll(PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH, 20000000);
-}
-
-/*
* Routine: pin_mux_mmc
* Description: setup the pin muxes/tristate values for the SDMMC(s)
*/
@@ -157,8 +147,7 @@ int board_init(void)
int board_mmc_init(bd_t *bd)
{
debug("board_mmc_init called\n");
- /* Enable clocks, muxes, etc. for SDMMC controllers */
- clock_init_mmc();
+ /* Enable muxes, etc. for SDMMC controllers */
pin_mux_mmc();
gpio_config_mmc();