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| author | Tim Harvey <tharvey@gateworks.com> | 2014-08-07 22:49:57 -0700 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-09-09 16:15:03 +0200 |
| commit | dad08286eaa84779349fe4cec427e1e29beaffac (patch) | |
| tree | a16dd1d418f9f6a2211ddf1939f6ba9a95ff5634 /board | |
| parent | 0991866cf7a10d4868aa2a10940b4def0f68cc50 (diff) | |
| download | u-boot-imx-dad08286eaa84779349fe4cec427e1e29beaffac.zip u-boot-imx-dad08286eaa84779349fe4cec427e1e29beaffac.tar.gz u-boot-imx-dad08286eaa84779349fe4cec427e1e29beaffac.tar.bz2 | |
imx: ventana: add pci fixup for PLX PEX860x switch GPIO
Most Gateworks Ventana boards use a PLX PEX860x PCIe switch for PCIe expansion.
These boards use GPIO on the PLX device as PERST# for the downstream ports
thus we assert this when the PLX is enumerated.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/gateworks/gw_ventana/gw_ventana.c | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 452a905..9a1b6dd 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -31,6 +31,7 @@ #include <mmc.h> #include <mtd_node.h> #include <netdev.h> +#include <pci.h> #include <power/pmic.h> #include <power/ltc3676_pmic.h> #include <power/pfuze100_pmic.h> @@ -1157,6 +1158,35 @@ int imx6_pcie_toggle_reset(void) } return 0; } + +/* + * Most Ventana boards have a PLX PEX860x PCIe switch onboard and use its + * GPIO's as PERST# signals for its downstream ports - configure the GPIO's + * properly and assert reset for 100ms. + */ +void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, + unsigned short vendor, unsigned short device, + unsigned short class) +{ + u32 dw; + + debug("%s: %02d:%02d.%02d: %04x:%04x\n", __func__, + PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), vendor, device); + if (vendor == PCI_VENDOR_ID_PLX && + (device & 0xfff0) == 0x8600 && + PCI_DEV(dev) == 0 && PCI_FUNC(dev) == 0) { + debug("configuring PLX 860X downstream PERST#\n"); + pci_hose_read_config_dword(hose, dev, 0x62c, &dw); + dw |= 0xaaa8; /* GPIO1-7 outputs */ + pci_hose_write_config_dword(hose, dev, 0x62c, dw); + + pci_hose_read_config_dword(hose, dev, 0x644, &dw); + dw |= 0xfe; /* GPIO1-7 output high */ + pci_hose_write_config_dword(hose, dev, 0x644, dw); + + mdelay(100); + } +} #endif /* CONFIG_CMD_PCI */ #ifdef CONFIG_SERIAL_TAG |