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author | Robin Gong <B38343@freescale.com> | 2012-10-24 18:00:01 +0800 |
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committer | Robin Gong <B38343@freescale.com> | 2012-10-26 18:48:39 +0800 |
commit | c078b850cf22e6cb0754750483d3cc816580cf63 (patch) | |
tree | 3fd08e3aa9e456f053db3cff0f670eca28141ab5 /board | |
parent | 09420eacbc8a5b9c87da1377a7d24125d3950703 (diff) | |
download | u-boot-imx-c078b850cf22e6cb0754750483d3cc816580cf63.zip u-boot-imx-c078b850cf22e6cb0754750483d3cc816580cf63.tar.gz u-boot-imx-c078b850cf22e6cb0754750483d3cc816580cf63.tar.bz2 |
ENGR00230981-1 pfuze:set all switches to PFM mode in standby
To save power, set all switches to PFM mode in standby,although PFM mode need
6% tolerance.But it will be implemented in kernel, and move the workaround
which all buck switches need be configured PWM mode on PF100 1.0
Another two change is:
1. u-boot will print PFUZE device id and revision id.
2. add value check for i2c write and read.
Signed-off-by: Robin Gong <B38343@freescale.com>
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/mx6q_sabresd/mx6q_sabresd.c | 57 | ||||
-rw-r--r-- | board/freescale/mx6sl_arm2/mx6sl_arm2.c | 47 | ||||
-rw-r--r-- | board/freescale/mx6sl_evk/mx6sl_evk.c | 49 |
3 files changed, 75 insertions, 78 deletions
diff --git a/board/freescale/mx6q_sabresd/mx6q_sabresd.c b/board/freescale/mx6q_sabresd/mx6q_sabresd.c index f3ae259..92c28ae 100644 --- a/board/freescale/mx6q_sabresd/mx6q_sabresd.c +++ b/board/freescale/mx6q_sabresd/mx6q_sabresd.c @@ -757,52 +757,52 @@ int i2c_bus_recovery(void) } -void setup_pmic_voltages(void) +static int setup_pmic_voltages(void) { - unsigned char value = 0 ; + unsigned char value, rev_id = 0 ; #if CONFIG_MX6_INTER_LDO_BYPASS unsigned int val = 0; #endif i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); if (!i2c_probe(0x8)) { - if (i2c_read(0x8, 0, 1, &value, 1)) - printf("%s:i2c_read:error\n", __func__); - printf("Found PFUZE100! device id=%x\n", value); - if (value == 0x10) { - /*workaround ER1 of pfuze1.0: set all buck regulators - in PWM mode except SW1C*/ - value = 0x6; - i2c_write(0x8, 0x23, 1, &value, 1);/*SW1AB*/ - - value = 0x6; - i2c_write(0x8, 0x38, 1, &value, 1);/*SW2*/ - - value = 0x6; - i2c_write(0x8, 0x3f, 1, &value, 1);/*SW3A*/ - - value = 0x6; - i2c_write(0x8, 0x46, 1, &value, 1);/*SW3B*/ - - value = 0x6; - i2c_write(0x8, 0x4d, 1, &value, 1);/*SW4*/ + if (i2c_read(0x8, 0, 1, &value, 1)) { + printf("Read device ID error!\n"); + return -1; } + if (i2c_read(0x8, 3, 1, &rev_id, 1)) { + printf("Read Rev ID error!\n"); + return -1; + } + printf("Found PFUZE100! deviceid=%x,revid=%x\n", value, rev_id); /*VDDCORE/VDDSOC default 1.375V is not enough, considering pfuze tolerance and IR drop and ripple, need increase to 1.425V for SabreSD*/ value = 0x2d; - i2c_write(0x8, 0x20, 1, &value, 1); + if (i2c_write(0x8, 0x20, 1, &value, 1)) { + printf("VDDCORE set voltage error!\n"); + return -1; + } value = 0x2d; - i2c_write(0x8, 0x2e, 1, &value, 1); + if (i2c_write(0x8, 0x2e, 1, &value, 1)) { + printf("VDDSOC set voltage error!\n"); + return -1; + } #if CONFIG_MX6_INTER_LDO_BYPASS /*VDDCORE 1.1V@800Mhz: SW1AB*/ value = 0x20; - i2c_write(0x8, 0x20, 1, &value, 1); + if (i2c_write(0x8, 0x20, 1, &value, 1)) { + printf("VDDCORE set voltage error!\n"); + return -1; + } /*VDDSOC 1.2V : SW1C*/ value = 0x24; - i2c_write(0x8, 0x2e, 1, &value, 1); + if (i2c_write(0x8, 0x2e, 1, &value, 1)) { + printf("VDDSOC set voltage error!\n"); + return -1; + } /* Bypass the VDDSOC from Anatop */ val = REG_RD(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE); @@ -1796,10 +1796,13 @@ int check_recovery_cmd_file(void) int board_late_init(void) { + int ret = 0; #ifdef CONFIG_I2C_MXC setup_i2c(CONFIG_SYS_I2C_PORT); i2c_bus_recovery(); - setup_pmic_voltages(); + ret = setup_pmic_voltages(); + if (ret) + return -1; #endif return 0; } diff --git a/board/freescale/mx6sl_arm2/mx6sl_arm2.c b/board/freescale/mx6sl_arm2/mx6sl_arm2.c index 8abfd4e..13d6339 100644 --- a/board/freescale/mx6sl_arm2/mx6sl_arm2.c +++ b/board/freescale/mx6sl_arm2/mx6sl_arm2.c @@ -949,43 +949,37 @@ int i2c_bus_recovery(void) } -void setup_pmic_voltages(void) +static int setup_pmic_voltages(void) { - unsigned char value = 0 ; + unsigned char value, rev_id = 0 ; #if CONFIG_MX6_INTER_LDO_BYPASS unsigned int val = 0; #endif i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); if (!i2c_probe(0x8)) { - if (i2c_read(0x8, 0, 1, &value, 1)) - printf("%s:i2c_read:error\n", __func__); - printf("Found PFUZE100! device id=%x\n", value); - if (value == 0x10) { - /*workaround ER1 of pfuze1.0: set all buck regulators - in PWM mode except SW1C*/ - value = 0x6; - i2c_write(0x8, 0x23, 1, &value, 1);/*SW1AB*/ - - value = 0x6; - i2c_write(0x8, 0x38, 1, &value, 1);/*SW2*/ - - value = 0x6; - i2c_write(0x8, 0x3f, 1, &value, 1);/*SW3A*/ - - value = 0x6; - i2c_write(0x8, 0x46, 1, &value, 1);/*SW3B*/ - - value = 0x6; - i2c_write(0x8, 0x4d, 1, &value, 1);/*SW4*/ + if (i2c_read(0x8, 0, 1, &value, 1)) { + printf("Read device ID error!\n"); + return -1; + } + if (i2c_read(0x8, 3, 1, &rev_id, 1)) { + printf("Read Rev ID error!\n"); + return -1; } + printf("Found PFUZE100! deviceid=%x,revid=%x\n", value, rev_id); #if CONFIG_MX6_INTER_LDO_BYPASS /*VDDCORE 1.1V@800Mhz: SW1AB*/ value = 0x20; - i2c_write(0x8, 0x20, 1, &value, 1); + if (i2c_write(0x8, 0x20, 1, &value, 1)) { + printf("VDDCORE set voltage error!\n"); + return -1; + } /*VDDSOC 1.2V : SW1C*/ value = 0x24; - i2c_write(0x8, 0x2e, 1, &value, 1); + if (i2c_write(0x8, 0x2e, 1, &value, 1)) { + printf("VDDSOC set voltage error!\n"); + return -1; + } /* Bypass the VDDSOC from Anatop */ val = REG_RD(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE); @@ -1041,9 +1035,12 @@ int board_init(void) int board_late_init(void) { #ifdef CONFIG_I2C_MXC + int ret = 0; setup_i2c(CONFIG_SYS_I2C_PORT); i2c_bus_recovery(); - setup_pmic_voltages(); + ret = setup_pmic_voltages(); + if (ret) + return -1; #endif return 0; } diff --git a/board/freescale/mx6sl_evk/mx6sl_evk.c b/board/freescale/mx6sl_evk/mx6sl_evk.c index 089373e..45d5dd2 100644 --- a/board/freescale/mx6sl_evk/mx6sl_evk.c +++ b/board/freescale/mx6sl_evk/mx6sl_evk.c @@ -935,43 +935,37 @@ int i2c_bus_recovery(void) return result; } -void setup_pmic_voltages(void) +static int setup_pmic_voltages(void) { - unsigned char value = 0; + unsigned char value, rev_id = 0; #if CONFIG_MX6_INTER_LDO_BYPASS unsigned int val = 0; #endif i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); if (!i2c_probe(0x8)) { - if (i2c_read(0x8, 0, 1, &value, 1)) - printf("%s:i2c_read:error\n", __func__); - printf("Found PFUZE100! device id=%x\n", value); - if (value == 0x10) { - /*workaround ER1 of pfuze1.0: set all buck regulators - in PWM mode except SW1C*/ - value = 0x6; - i2c_write(0x8, 0x23, 1, &value, 1);/*SW1AB*/ - - value = 0x6; - i2c_write(0x8, 0x38, 1, &value, 1);/*SW2*/ - - value = 0x6; - i2c_write(0x8, 0x3f, 1, &value, 1);/*SW3A*/ - - value = 0x6; - i2c_write(0x8, 0x46, 1, &value, 1);/*SW3B*/ - - value = 0x6; - i2c_write(0x8, 0x4d, 1, &value, 1);/*SW4*/ + if (i2c_read(0x8, 0, 1, &value, 1)) { + printf("Read device ID error!\n"); + return -1; + } + if (i2c_read(0x8, 3, 1, &rev_id, 1)) { + printf("Read Rev ID error!\n"); + return -1; } + printf("Found PFUZE100! deviceid=%x,revid=%x\n", value, rev_id); #if CONFIG_MX6_INTER_LDO_BYPASS /*VDDCORE 1.1V@800Mhz: SW1AB */ value = 0x20; - i2c_write(0x8, 0x20, 1, &value, 1); + if (i2c_write(0x8, 0x20, 1, &value, 1)) { + printf("VDDCORE set voltage error!\n"); + return -1; + } - /*VDDSOC 1.2V : SW1C */ + /*VDDSOC 1.2V : SW1C*/ value = 0x24; - i2c_write(0x8, 0x2e, 1, &value, 1); + if (i2c_write(0x8, 0x2e, 1, &value, 1)) { + printf("VDDSOC set voltage error!\n"); + return -1; + } /* Bypass the VDDSOC from Anatop */ val = REG_RD(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE); @@ -1027,9 +1021,12 @@ int board_init(void) int board_late_init(void) { #ifdef CONFIG_I2C_MXC + int ret = 0; setup_i2c(CONFIG_SYS_I2C_PORT); i2c_bus_recovery(); - setup_pmic_voltages(); + ret = setup_pmic_voltages(); + if (ret) + return -1; #endif return 0; } |