Merge branch 'master' of rsync://rsync.denx.de/git/u-boot

author: Kumar Gala <galak@kernel.crashing.org> 2006-04-20 12:25:10 -0500
committer: Kumar Gala <galak@kernel.crashing.org> 2006-04-20 12:25:10 -0500
commit: b86d7622b33892b1dafe761a7a9eaeeab9f3816b (patch)
tree: 56b1b6fc978166abce4afa8e9dee0af94bfc3cd6 /board
parent: f8edca2e9a128f526b1fe6f997f7adb852cf5b3c (diff)
parent: 56a4a63c106cc317fc0fe42686a99416fc469f5b (diff)
download: u-boot-imx-b86d7622b33892b1dafe761a7a9eaeeab9f3816b.zip
u-boot-imx-b86d7622b33892b1dafe761a7a9eaeeab9f3816b.tar.gz
u-boot-imx-b86d7622b33892b1dafe761a7a9eaeeab9f3816b.tar.bz2
180 files changed, 898 insertions, 1230 deletions
diff --git a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
index 0934e1b..40f41c7 100644
--- a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
+++ b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
@@ -1,6 +1,7 @@
 /*
  * (C) Copyright 2002
  * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
+ * (C) Copyright 2006
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -88,8 +89,6 @@ long initdram (int board_type)
 
 void after_reloc (ulong dest_addr, gd_t *gd)
 {
-/* HJF:	DECLARE_GLOBAL_DATA_PTR; */
-
 	board_init_r (gd, dest_addr);
 }
 
diff --git a/board/MAI/AmigaOneG3SE/articiaS.c b/board/MAI/AmigaOneG3SE/articiaS.c
index a4dad64..3901b80 100644
--- a/board/MAI/AmigaOneG3SE/articiaS.c
+++ b/board/MAI/AmigaOneG3SE/articiaS.c
@@ -29,6 +29,8 @@
 #include "smbus.h"
 #include "via686.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #undef DEBUG
 
 struct dimm_bank {
@@ -82,7 +84,6 @@ static inline unsigned short NSto10PS (unsigned char spd_byte)
 
 long detect_sdram (uint8 * rom, int dimmNum, struct dimm_bank *banks)
 {
-    DECLARE_GLOBAL_DATA_PTR;
 	int dimm_address = (dimmNum == 0) ? SM_DIMM0_ADDR : SM_DIMM1_ADDR;
 	uint32 busclock = gd->bus_clk;
 	uint32 memclock = busclock;
@@ -394,8 +395,6 @@ uint32 burst_to_len (uint32 support)
 
 long articiaS_ram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	register uint32 i;
 	register uint32 value1;
 	register uint32 value2;
diff --git a/board/MAI/AmigaOneG3SE/articiaS_pci.c b/board/MAI/AmigaOneG3SE/articiaS_pci.c
index d2e9f29..480dae5 100644
--- a/board/MAI/AmigaOneG3SE/articiaS_pci.c
+++ b/board/MAI/AmigaOneG3SE/articiaS_pci.c
@@ -26,6 +26,8 @@
 #include "memio.h"
 #include "articiaS.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #undef ARTICIA_PCI_DEBUG
 
 #ifdef  ARTICIA_PCI_DEBUG
@@ -493,8 +495,6 @@ pci_dev_t video_dev;
 
 int articiaS_init_vga (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
     extern void shutdown_bios(void);
     pci_dev_t dev = ~0;
     int busnr = 0;
diff --git a/board/MAI/AmigaOneG3SE/cmd_boota.c b/board/MAI/AmigaOneG3SE/cmd_boota.c
index 3e2835a..143bba2 100644
--- a/board/MAI/AmigaOneG3SE/cmd_boota.c
+++ b/board/MAI/AmigaOneG3SE/cmd_boota.c
@@ -3,6 +3,7 @@
 #include "../disk/part_amiga.h"
 #include <asm/cache.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 
 #undef BOOTA_DEBUG
 
@@ -108,8 +109,6 @@ int do_boota (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 
 	s = getenv ("autostart");
 	if (s && strcmp (s, "yes") == 0) {
-		DECLARE_GLOBAL_DATA_PTR;
-
 		void (*boot) (bd_t *, char *, block_dev_desc_t *);
 		char *args;
 
diff --git a/board/MAI/AmigaOneG3SE/serial.c b/board/MAI/AmigaOneG3SE/serial.c
index e83fb46..b6f57c7 100644
--- a/board/MAI/AmigaOneG3SE/serial.c
+++ b/board/MAI/AmigaOneG3SE/serial.c
@@ -4,6 +4,8 @@
 #include "memio.h"
 #include "articiaS.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifndef CFG_NS16550
 static uint32 ComPort1;
 
@@ -150,8 +152,6 @@ const NS16550_t Com1 = (NS16550_t) CFG_NS16550_COM2;
 
 int serial_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	uint32 clock_divisor = 115200 / gd->baudrate;
 
 	NS16550_init (Com0, clock_divisor);
@@ -239,8 +239,6 @@ void serial_puts (const char *string)
 
 void serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	uint32 clock_divisor = 115200 / gd->baudrate;
 
 	NS16550_init (Com0, clock_divisor);
diff --git a/board/MAI/AmigaOneG3SE/via686.c b/board/MAI/AmigaOneG3SE/via686.c
index c797e47..3606db8 100644
--- a/board/MAI/AmigaOneG3SE/via686.c
+++ b/board/MAI/AmigaOneG3SE/via686.c
@@ -28,6 +28,8 @@
 #include "via686.h"
 #include "i8259.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #undef VIA_DEBUG
 
 #ifdef  VIA_DEBUG
@@ -226,33 +228,31 @@ __asm         ("    .globl via_calibrate_time_base \n"
 
 extern unsigned long via_calibrate_time_base(void);
 
-void via_calibrate_bus_freq(void)
+void via_calibrate_bus_freq (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
-    unsigned long tb;
+	unsigned long tb;
 
-    /* This is 20 microseconds */
-    #define CALIBRATE_TIME 28636
+	/* This is 20 microseconds */
+#define CALIBRATE_TIME 28636
 
+	/* Enable the timer (and disable speaker) */
+	unsigned char c;
 
-    /* Enable the timer (and disable speaker) */
-    unsigned char c;
-    c = in_byte(0x61);
-    out_byte(0x61, ((c & ~0x02) | 0x01));
+	c = in_byte (0x61);
+	out_byte (0x61, ((c & ~0x02) | 0x01));
 
-    /* Set timer 2 to low/high writing */
-    out_byte(0x43, 0xb0);
-    out_byte(0x42, CALIBRATE_TIME & 0xff);
-    out_byte(0x42, CALIBRATE_TIME >>8);
+	/* Set timer 2 to low/high writing */
+	out_byte (0x43, 0xb0);
+	out_byte (0x42, CALIBRATE_TIME & 0xff);
+	out_byte (0x42, CALIBRATE_TIME >> 8);
 
-    /* Read the time base */
-    tb = via_calibrate_time_base();
+	/* Read the time base */
+	tb = via_calibrate_time_base ();
 
-    if (tb >= 700000)
-	gd->bus_clk = 133333333;
-    else
-	gd->bus_clk = 100000000;
+	if (tb >= 700000)
+		gd->bus_clk = 133333333;
+	else
+		gd->bus_clk = 100000000;
 
 }
 
diff --git a/board/MAI/AmigaOneG3SE/video.c b/board/MAI/AmigaOneG3SE/video.c
index 36e3c62..f6327f7 100644
--- a/board/MAI/AmigaOneG3SE/video.c
+++ b/board/MAI/AmigaOneG3SE/video.c
@@ -26,6 +26,8 @@
 #include "memio.h"
 #include <part.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 unsigned char *cursor_position;
 unsigned int cursor_row;
 unsigned int cursor_col;
@@ -480,7 +482,6 @@ extern char version_string[];
 void video_banner(void)
 {
     block_dev_desc_t *ide;
-    DECLARE_GLOBAL_DATA_PTR;
     int i;
     char *s;
     int maxdev;
diff --git a/board/Marvell/common/serial.c b/board/Marvell/common/serial.c
index 9d0d213..6a1d4d7 100644
--- a/board/Marvell/common/serial.c
+++ b/board/Marvell/common/serial.c
@@ -45,13 +45,13 @@
 
 #include "ns16550.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_MPSC
 
 
 int serial_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 #if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
 	int clock_divisor = 230400 / gd->baudrate;
 #endif
@@ -88,8 +88,6 @@ int serial_tstc (void)
 
 void serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	galbrg_set_baudrate (CONFIG_MPSC_PORT, gd->baudrate);
 }
 
@@ -97,8 +95,6 @@ void serial_setbrg (void)
 
 int serial_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int clock_divisor = 230400 / gd->baudrate;
 
 #ifdef CFG_INIT_CHAN1
@@ -130,8 +126,6 @@ int serial_tstc (void)
 
 void serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int clock_divisor = 230400 / gd->baudrate;
 
 #ifdef CFG_INIT_CHAN1
diff --git a/board/Marvell/db64360/mpsc.c b/board/Marvell/db64360/mpsc.c
index ccb3adc..d8acd31 100644
--- a/board/Marvell/db64360/mpsc.c
+++ b/board/Marvell/db64360/mpsc.c
@@ -42,6 +42,8 @@
 
 #include "../include/memory.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* Define this if you wish to use the MPSC as a register based UART.
  * This will force the serial port to not use the SDMA engine at all.
  */
@@ -114,9 +116,7 @@ static void mpsc_debug_init (void)
 
 	/* Clear the CFR  (CHR4) */
 	/* Write random 'Z' bit (bit 29) of CHR4 to enable debug uart *UNDOCUMENTED FEATURE* */
-	temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_indent: Standard input:229: Warning:old style assignment ambiguity in "=&".  Assuming "= &"
-
-REG_GAP));
+	temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP));
 	temp &= 0xffffff00;
 	temp |= BIT29;
 	GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP),
@@ -158,7 +158,6 @@ char mpsc_getchar_debug (void)
  * global variables [josh] */
 int mpsc_putchar_early (char ch)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	int mpsc = CHANNEL;
 	int temp =
 		GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
@@ -511,7 +510,6 @@ void mpsc_init2 (void)
 
 int galbrg_set_baudrate (int channel, int rate)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	int clock;
 
 	galbrg_disable (channel);	/*ok */
diff --git a/board/Marvell/db64360/mv_eth.c b/board/Marvell/db64360/mv_eth.c
index 3c5dee7..e5a87ad 100644
--- a/board/Marvell/db64360/mv_eth.c
+++ b/board/Marvell/db64360/mv_eth.c
@@ -732,6 +732,7 @@ int mv64360_eth_xmit (struct eth_device *dev, volatile void *dataPtr,
 	pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC;	/* DMA owned, first last */
 	pkt_info.byte_cnt = dataSize;
 	pkt_info.buf_ptr = (unsigned int) dataPtr;
+	pkt_info.return_info = 0;
 
 	status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info);
 	if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) {
diff --git a/board/Marvell/db64360/sdram_init.c b/board/Marvell/db64360/sdram_init.c
index d2635f8..f04aaf9 100644
--- a/board/Marvell/db64360/sdram_init.c
+++ b/board/Marvell/db64360/sdram_init.c
@@ -42,6 +42,8 @@
 #include "64360.h"
 #include "mv_regs.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #undef	DEBUG
 #define MAP_PCI
 
@@ -246,8 +248,6 @@ static inline unsigned short NSto10PS (unsigned char spd_byte)
 /* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
 static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	unsigned long spd_checksum;
 
 #ifdef ZUMA_NTL
diff --git a/board/Marvell/db64460/mpsc.c b/board/Marvell/db64460/mpsc.c
index 33fbc49..b783aff 100644
--- a/board/Marvell/db64460/mpsc.c
+++ b/board/Marvell/db64460/mpsc.c
@@ -42,6 +42,8 @@
 
 #include "../include/memory.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* Define this if you wish to use the MPSC as a register based UART.
  * This will force the serial port to not use the SDMA engine at all.
  */
@@ -114,9 +116,7 @@ static void mpsc_debug_init (void)
 
 	/* Clear the CFR  (CHR4) */
 	/* Write random 'Z' bit (bit 29) of CHR4 to enable debug uart *UNDOCUMENTED FEATURE* */
-	temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_indent: Standard input:229: Warning:old style assignment ambiguity in "=&".  Assuming "= &"
-
-REG_GAP));
+	temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP));
 	temp &= 0xffffff00;
 	temp |= BIT29;
 	GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP),
@@ -158,7 +158,6 @@ char mpsc_getchar_debug (void)
  * global variables [josh] */
 int mpsc_putchar_early (char ch)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	int mpsc = CHANNEL;
 	int temp =
 		GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
@@ -511,7 +510,6 @@ void mpsc_init2 (void)
 
 int galbrg_set_baudrate (int channel, int rate)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	int clock;
 
 	galbrg_disable (channel);	/*ok */
diff --git a/board/Marvell/db64460/mv_eth.c b/board/Marvell/db64460/mv_eth.c
index ec5d581..b2c7835 100644
--- a/board/Marvell/db64460/mv_eth.c
+++ b/board/Marvell/db64460/mv_eth.c
@@ -731,6 +731,7 @@ int mv64460_eth_xmit (struct eth_device *dev, volatile void *dataPtr,
 	pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC;	/* DMA owned, first last */
 	pkt_info.byte_cnt = dataSize;
 	pkt_info.buf_ptr = (unsigned int) dataPtr;
+	pkt_info.return_info = 0;
 
 	status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info);
 	if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) {
diff --git a/board/Marvell/db64460/sdram_init.c b/board/Marvell/db64460/sdram_init.c
index 8cfe84c..1762202 100644
--- a/board/Marvell/db64460/sdram_init.c
+++ b/board/Marvell/db64460/sdram_init.c
@@ -42,6 +42,8 @@
 #include "64460.h"
 #include "mv_regs.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #undef	DEBUG
 #define	MAP_PCI
 
@@ -246,8 +248,6 @@ static inline unsigned short NSto10PS (unsigned char spd_byte)
 /* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
 static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	unsigned long spd_checksum;
 
 #ifdef ZUMA_NTL
diff --git a/board/adsvix/adsvix.c b/board/adsvix/adsvix.c
index 5e770e9..c430d63 100644
--- a/board/adsvix/adsvix.c
+++ b/board/adsvix/adsvix.c
@@ -30,6 +30,8 @@
 
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 /*
@@ -38,8 +40,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -62,8 +62,6 @@ int board_late_init(void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
diff --git a/board/amcc/bamboo/config.mk b/board/amcc/bamboo/config.mk
index 433429b..35cb655 100644
--- a/board/amcc/bamboo/config.mk
+++ b/board/amcc/bamboo/config.mk
@@ -32,6 +32,3 @@ endif
 ifeq ($(dbcr),1)
 PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
 endif
-
-# legacy nand support
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/amcc/ebony/ebony.c b/board/amcc/ebony/ebony.c
index a2595ee..dcafac9 100644
--- a/board/amcc/ebony/ebony.c
+++ b/board/amcc/ebony/ebony.c
@@ -28,6 +28,8 @@
 #define FLASH_ONBD_N		2	/* 00000010 */
 #define FLASH_SRAM_SEL		1	/* 00000001 */
 
+DECLARE_GLOBAL_DATA_PTR;
+
 long int fixed_sdram(void);
 
 int board_early_init_f(void)
@@ -107,7 +109,7 @@ long int initdram(int board_type)
 	long dram_size = 0;
 
 #if defined(CONFIG_SPD_EEPROM)
-	dram_size = spd_sdram(0);
+	dram_size = spd_sdram();
 #else
 	dram_size = fixed_sdram();
 #endif
@@ -235,8 +237,6 @@ int pci_pre_init(struct pci_controller *hose)
 #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
 void pci_target_init(struct pci_controller *hose)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/*--------------------------------------------------------------------------+
 	 * Disable everything
 	 *--------------------------------------------------------------------------*/
diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
index c6b79a9..06a57f6 100644
--- a/board/amcc/luan/luan.c
+++ b/board/amcc/luan/luan.c
@@ -28,6 +28,7 @@
 #include <spd_sdram.h>
 #include "epld.h"
 
+DECLARE_GLOBAL_DATA_PTR;
 
 extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
 
@@ -291,8 +292,6 @@ int pci_pre_init( struct pci_controller *hose )
 #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
 void pci_target_init(struct pci_controller *hose)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/*--------------------------------------------------------------------------+
 	 * Disable everything
 	 *--------------------------------------------------------------------------*/
diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c
index d1a29c5..3f6d204 100644
--- a/board/amcc/ocotea/ocotea.c
+++ b/board/amcc/ocotea/ocotea.c
@@ -30,6 +30,8 @@
 #include <spd_sdram.h>
 #include <ppc4xx_enet.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define BOOT_SMALL_FLASH	32	/* 00100000 */
 #define FLASH_ONBD_N		2	/* 00000010 */
 #define FLASH_SRAM_SEL		1	/* 00000001 */
@@ -204,7 +206,7 @@ long int initdram (int board_type)
 	long dram_size = 0;
 
 #if defined(CONFIG_SPD_EEPROM)
-	dram_size = spd_sdram (0);
+	dram_size = spd_sdram ();
 #else
 	dram_size = fixed_sdram ();
 #endif
@@ -334,8 +336,6 @@ int pci_pre_init(struct pci_controller * hose )
 #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
 void pci_target_init(struct pci_controller * hose )
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/*--------------------------------------------------------------------------+
 	 * Disable everything
 	 *--------------------------------------------------------------------------*/
diff --git a/board/amcc/walnut/walnut.c b/board/amcc/walnut/walnut.c
index f1a96a6..292e026 100644
--- a/board/amcc/walnut/walnut.c
+++ b/board/amcc/walnut/walnut.c
@@ -99,7 +99,7 @@ void sdram_init(void)
  */
 long int initdram(int board_type)
 {
-	return spd_sdram(0);
+	return spd_sdram();
 }
 
 int testdram(void)
diff --git a/board/amcc/yellowstone/yellowstone.c b/board/amcc/yellowstone/yellowstone.c
index 8ddf910..20965c8 100644
--- a/board/amcc/yellowstone/yellowstone.c
+++ b/board/amcc/yellowstone/yellowstone.c
@@ -24,6 +24,8 @@
 #include <asm/processor.h>
 #include <spd_sdram.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
 
 int board_early_init_f(void)
@@ -136,7 +138,6 @@ int board_early_init_f(void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	uint pbcr;
 	int size_val = 0;
 
diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c
index 509d8e4..392d0dc 100644
--- a/board/amcc/yosemite/yosemite.c
+++ b/board/amcc/yosemite/yosemite.c
@@ -24,6 +24,8 @@
 #include <asm/processor.h>
 #include <spd_sdram.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
 
 int board_early_init_f(void)
@@ -132,7 +134,6 @@ int board_early_init_f(void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	uint pbcr;
 	int size_val = 0;
 
diff --git a/board/amirix/ap1000/serial.c b/board/amirix/ap1000/serial.c
index 39c4157..c6ee772 100644
--- a/board/amirix/ap1000/serial.c
+++ b/board/amirix/ap1000/serial.c
@@ -27,9 +27,7 @@
 
 #include <ns16550.h>
 
-#if 0
-#include "serial.h"
-#endif
+DECLARE_GLOBAL_DATA_PTR;
 
 const NS16550_t COM_PORTS[] =
 	{ (NS16550_t) CFG_NS16550_COM1, (NS16550_t) CFG_NS16550_COM2 };
@@ -40,8 +38,6 @@ static int gComPort = 0;
 
 int serial_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
 
 	(void) NS16550_init (COM_PORTS[0], clock_divisor);
@@ -71,8 +67,6 @@ int serial_tstc (void)
 
 void serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
 
 #ifdef CFG_INIT_CHAN1
diff --git a/board/armadillo/armadillo.c b/board/armadillo/armadillo.c
index de04c66..ca5bd1d 100644
--- a/board/armadillo/armadillo.c
+++ b/board/armadillo/armadillo.c
@@ -28,6 +28,8 @@
 #include <common.h>
 #include <clps7111.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 
@@ -37,8 +39,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* Activate LED flasher */
 	IO_LEDFLSH = 0x40;
 
@@ -53,8 +53,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/assabet/assabet.c b/board/assabet/assabet.c
index d3ccbb5..4f84a58 100644
--- a/board/assabet/assabet.c
+++ b/board/assabet/assabet.c
@@ -27,6 +27,8 @@
 #include <common.h>
 #include <SA-1100.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 /*
@@ -99,8 +101,6 @@ neponset_init(void)
 int
 board_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_arch_number = MACH_TYPE_ASSABET;
 	gd->bd->bi_boot_params = 0xc0000100;
 
@@ -112,8 +112,6 @@ board_init(void)
 int
 dram_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/at91rm9200dk/at91rm9200dk.c b/board/at91rm9200dk/at91rm9200dk.c
index 9016776..002981a 100644
--- a/board/at91rm9200dk/at91rm9200dk.c
+++ b/board/at91rm9200dk/at91rm9200dk.c
@@ -27,6 +27,8 @@
 #include <at91rm9200_net.h>
 #include <dm9161.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 /*
  * Miscelaneous platform dependent initialisations
@@ -34,8 +36,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* Enable Ctrlc */
 	console_init_f ();
 
@@ -56,8 +56,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
 	return 0;
diff --git a/board/bmw/serial.c b/board/bmw/serial.c
index f36a41b..712a95b 100644
--- a/board/bmw/serial.c
+++ b/board/bmw/serial.c
@@ -24,6 +24,8 @@
 #include <common.h>
 #include "ns16550.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #if CONFIG_CONS_INDEX == 1
 static struct NS16550 *console =
 		(struct NS16550 *) (CFG_EUMB_ADDR + 0x4500);
@@ -38,8 +40,6 @@ extern ulong get_bus_freq (ulong);
 
 int serial_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int clock_divisor = gd->bus_clk / 16 / gd->baudrate;
 
 	NS16550_init (CONFIG_CONS_INDEX - 1, clock_divisor);
@@ -75,8 +75,6 @@ int serial_tstc (void)
 
 void serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int clock_divisor = get_bus_freq (0) / 16 / gd->baudrate;
 
 	NS16550_reinit (console, clock_divisor);
diff --git a/board/cerf250/cerf250.c b/board/cerf250/cerf250.c
index cc1bc16..307894f 100644
--- a/board/cerf250/cerf250.c
+++ b/board/cerf250/cerf250.c
@@ -27,6 +27,8 @@
 
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 
@@ -36,8 +38,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -60,8 +60,6 @@ int board_late_init(void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
diff --git a/board/cm4008/cm4008.c b/board/cm4008/cm4008.c
index 4d2013b..d34737c 100644
--- a/board/cm4008/cm4008.c
+++ b/board/cm4008/cm4008.c
@@ -31,6 +31,8 @@
 #include <common.h>
 #include <asm/arch/platform.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 #define	ks8695_read(a)	  *((volatile unsigned int *) (KS8695_IO_BASE+(a)))
@@ -75,8 +77,6 @@ int board_late_init (void)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* arch number of CM4008 */
 	gd->bd->bi_arch_number = 624;
 
@@ -92,8 +92,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/cm41xx/cm41xx.c b/board/cm41xx/cm41xx.c
index 65eaa94..02d05af 100644
--- a/board/cm41xx/cm41xx.c
+++ b/board/cm41xx/cm41xx.c
@@ -31,6 +31,8 @@
 #include <common.h>
 #include <asm/arch/platform.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 #define	ks8695_read(a)	  *((volatile unsigned int *) (KS8695_IO_BASE+(a)))
@@ -75,8 +77,6 @@ int board_late_init (void)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* arch number of CM41xx */
 	gd->bd->bi_arch_number = 672;
 
@@ -92,8 +92,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/cmc_pu2/cmc_pu2.c b/board/cmc_pu2/cmc_pu2.c
index 14168e6..9ae3c42 100644
--- a/board/cmc_pu2/cmc_pu2.c
+++ b/board/cmc_pu2/cmc_pu2.c
@@ -33,6 +33,8 @@
 #include <at91rm9200_net.h>
 #include <dm9161.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 /*
  * Miscelaneous platform dependent initialisations
@@ -45,7 +47,6 @@ int hw_detect (void);
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	AT91PS_PIO piob = AT91C_BASE_PIOB;
 	AT91PS_PIO pioc = AT91C_BASE_PIOC;
 
@@ -109,8 +110,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
 	return 0;
diff --git a/board/cogent/serial.c b/board/cogent/serial.c
index 4c20017..2b595a8 100644
--- a/board/cogent/serial.c
+++ b/board/cogent/serial.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <board/cogent/serial.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
 
 #if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \
@@ -25,76 +27,65 @@
 
 int serial_init (void)
 {
-/*  DECLARE_GLOBAL_DATA_PTR; */
-
-    cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
+	cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
 
-    cma_mb_reg_write(&mbsp->ser_ier, 0x00);	/* turn off interrupts */
-    serial_setbrg ();
-    cma_mb_reg_write(&mbsp->ser_lcr, 0x03);	/* 8 data, 1 stop, no parity */
-    cma_mb_reg_write(&mbsp->ser_mcr, 0x03);	/* RTS/DTR */
-    cma_mb_reg_write(&mbsp->ser_fcr, 0x07);	/* Clear & enable FIFOs */
+	cma_mb_reg_write (&mbsp->ser_ier, 0x00);	/* turn off interrupts */
+	serial_setbrg ();
+	cma_mb_reg_write (&mbsp->ser_lcr, 0x03);	/* 8 data, 1 stop, no parity */
+	cma_mb_reg_write (&mbsp->ser_mcr, 0x03);	/* RTS/DTR */
+	cma_mb_reg_write (&mbsp->ser_fcr, 0x07);	/* Clear & enable FIFOs */
 
-    return (0);
+	return (0);
 }
 
-void
-serial_setbrg (void)
+void serial_setbrg (void)
 {
-    DECLARE_GLOBAL_DATA_PTR;
-
-    cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
-    unsigned int divisor;
-    unsigned char lcr;
-
-    if ((divisor = br_to_div(gd->baudrate)) == 0)
-	divisor = DEFDIV;
-
-    lcr = cma_mb_reg_read(&mbsp->ser_lcr);
-    cma_mb_reg_write(&mbsp->ser_lcr, lcr|0x80);/* Access baud rate(set DLAB)*/
-    cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff);
-    cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff);
-    cma_mb_reg_write(&mbsp->ser_lcr, lcr);	/* unset DLAB */
+	cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
+	unsigned int divisor;
+	unsigned char lcr;
+
+	if ((divisor = br_to_div (gd->baudrate)) == 0)
+		divisor = DEFDIV;
+
+	lcr = cma_mb_reg_read (&mbsp->ser_lcr);
+	cma_mb_reg_write (&mbsp->ser_lcr, lcr | 0x80);	/* Access baud rate(set DLAB) */
+	cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
+	cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
+	cma_mb_reg_write (&mbsp->ser_lcr, lcr);	/* unset DLAB */
 }
 
-void
-serial_putc(const char c)
+void serial_putc (const char c)
 {
-    cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
+	cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
 
-    if (c == '\n')
-	serial_putc('\r');
+	if (c == '\n')
+		serial_putc ('\r');
 
-    while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0)
-	;
+	while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
 
-    cma_mb_reg_write(&mbsp->ser_thr, c);
+	cma_mb_reg_write (&mbsp->ser_thr, c);
 }
 
-void
-serial_puts(const char *s)
+void serial_puts (const char *s)
 {
-    while (*s != '\0')
-	serial_putc(*s++);
+	while (*s != '\0')
+		serial_putc (*s++);
 }
 
-int
-serial_getc(void)
+int serial_getc (void)
 {
-    cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
+	cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
 
-    while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0)
-	;
+	while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
 
-    return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f);
+	return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
 }
 
-int
-serial_tstc(void)
+int serial_tstc (void)
 {
-    cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
+	cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
 
-    return ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) != 0);
+	return ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) != 0);
 }
 
 #endif /* CONS_NONE */
@@ -118,71 +109,63 @@ serial_tstc(void)
 #error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial
 #endif
 
-void
-kgdb_serial_init(void)
+void kgdb_serial_init (void)
 {
-    cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
-    unsigned int divisor;
+	cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
+	unsigned int divisor;
 
-    if ((divisor = br_to_div(CONFIG_KGDB_BAUDRATE)) == 0)
-	divisor = DEFDIV;
+	if ((divisor = br_to_div (CONFIG_KGDB_BAUDRATE)) == 0)
+		divisor = DEFDIV;
 
-    cma_mb_reg_write(&mbsp->ser_ier, 0x00);	/* turn off interrupts */
-    cma_mb_reg_write(&mbsp->ser_lcr, 0x80);	/* Access baud rate(set DLAB)*/
-    cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff);
-    cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff);
-    cma_mb_reg_write(&mbsp->ser_lcr, 0x03);	/* 8 data, 1 stop, no parity */
-    cma_mb_reg_write(&mbsp->ser_mcr, 0x03);	/* RTS/DTR */
-    cma_mb_reg_write(&mbsp->ser_fcr, 0x07);	/* Clear & enable FIFOs */
+	cma_mb_reg_write (&mbsp->ser_ier, 0x00);	/* turn off interrupts */
+	cma_mb_reg_write (&mbsp->ser_lcr, 0x80);	/* Access baud rate(set DLAB) */
+	cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
+	cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
+	cma_mb_reg_write (&mbsp->ser_lcr, 0x03);	/* 8 data, 1 stop, no parity */
+	cma_mb_reg_write (&mbsp->ser_mcr, 0x03);	/* RTS/DTR */
+	cma_mb_reg_write (&mbsp->ser_fcr, 0x07);	/* Clear & enable FIFOs */
 
-    printf("[on cma10x serial port B] ");
+	printf ("[on cma10x serial port B] ");
 }
 
-void
-putDebugChar(int c)
+void putDebugChar (int c)
 {
-    cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
+	cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
 
-    while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0)
-	;
+	while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
 
-    cma_mb_reg_write(&mbsp->ser_thr, c & 0xff);
+	cma_mb_reg_write (&mbsp->ser_thr, c & 0xff);
 }
 
-void
-putDebugStr(const char *str)
+void putDebugStr (const char *str)
 {
-    while (*str != '\0') {
-	if (*str == '\n')
-	    putDebugChar('\r');
-	putDebugChar(*str++);
-    }
+	while (*str != '\0') {
+		if (*str == '\n')
+			putDebugChar ('\r');
+		putDebugChar (*str++);
+	}
 }
 
-int
-getDebugChar(void)
+int getDebugChar (void)
 {
-    cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
+	cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
 
-    while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0)
-	;
+	while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
 
-    return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f);
+	return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
 }
 
-void
-kgdb_interruptible(int yes)
+void kgdb_interruptible (int yes)
 {
-    cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
-
-    if (yes == 1) {
-	printf("kgdb: turning serial ints on\n");
-	cma_mb_reg_write(&mbsp->ser_ier, 0xf);
-    }
-    else {
-	printf("kgdb: turning serial ints off\n");
-	cma_mb_reg_write(&mbsp->ser_ier, 0x0);
-    }
+	cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
+
+	if (yes == 1) {
+		printf ("kgdb: turning serial ints on\n");
+		cma_mb_reg_write (&mbsp->ser_ier, 0xf);
+	} else {
+		printf ("kgdb: turning serial ints off\n");
+		cma_mb_reg_write (&mbsp->ser_ier, 0x0);
+	}
 }
 
 #endif /* KGDB && KGDB_NONE */
diff --git a/board/cradle/cradle.c b/board/cradle/cradle.c
index 6f65f32..6d8d555 100644
--- a/board/cradle/cradle.c
+++ b/board/cradle/cradle.c
@@ -28,6 +28,8 @@
 #include <asm/arch/pxa-regs.h>
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 
@@ -181,8 +183,6 @@ int
 board_init (void)
 /**********************************************************/
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	led_code (0xf, YELLOW);
 
 	/* arch number of HHP Cradle */
@@ -209,8 +209,6 @@ int
 dram_init (void)
 /**********************************************************/
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
diff --git a/board/csb226/csb226.c b/board/csb226/csb226.c
index c99a715..80caf8b 100644
--- a/board/csb226/csb226.c
+++ b/board/csb226/csb226.c
@@ -26,6 +26,8 @@
 #include <common.h>
 #include <asm/arch/pxa-regs.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_SHOW_BOOT_PROGRESS
 # define SHOW_BOOT_PROGRESS(arg)        show_boot_progress(arg)
 #else
@@ -65,8 +67,6 @@ int misc_init_r(void)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -88,8 +88,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/csb637/csb637.c b/board/csb637/csb637.c
index 6100a53..aeb1a13 100644
--- a/board/csb637/csb637.c
+++ b/board/csb637/csb637.c
@@ -26,6 +26,8 @@
 #include <at91rm9200_net.h>
 #include <bcm5221.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 /*
  * Miscelaneous platform dependent initialisations
@@ -33,8 +35,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* Enable Ctrlc */
 	console_init_f ();
 
@@ -51,8 +51,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
 	return 0;
diff --git a/board/cu824/cu824.c b/board/cu824/cu824.c
index 5844a5c..3edd27a 100644
--- a/board/cu824/cu824.c
+++ b/board/cu824/cu824.c
@@ -2,7 +2,7 @@
  * (C) Copyright 2001
  * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
  *
- * (C) Copyright 2001, 2002
+ * (C) Copyright 2001-2006
  * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
 
  * See file CREDITS for list of people who contributed to this
@@ -29,12 +29,12 @@
 #include <asm/processor.h>
 #include <pci.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define BOARD_REV_REG 0xFE80002B
 
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	char  revision = *(volatile char *)(BOARD_REV_REG);
 	char  buf[32];
 
diff --git a/board/dave/B2/B2.c b/board/dave/B2/B2.c
index 29676b8..64fe948 100644
--- a/board/dave/B2/B2.c
+++ b/board/dave/B2/B2.c
@@ -27,13 +27,14 @@
 #include <common.h>
 #include <asm/hardware.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*
  * Miscelaneous platform dependent initialization
  */
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	u32 temp;
 
 	/* Configuration Port Control Register*/
@@ -119,8 +120,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/dave/PPChameleonEVB/PPChameleonEVB.c b/board/dave/PPChameleonEVB/PPChameleonEVB.c
index 52055b8..e8302d9 100644
--- a/board/dave/PPChameleonEVB/PPChameleonEVB.c
+++ b/board/dave/PPChameleonEVB/PPChameleonEVB.c
@@ -29,6 +29,8 @@
 #include <command.h>
 #include <malloc.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 /* Prototypes */
@@ -81,8 +83,6 @@ extern flash_info_t flash_info[];	/* info for FLASH chips */
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* adjust flash start and size as well as the offset */
 	gd->bd->bi_flashstart = 0 - flash_info[0].size;
 	gd->bd->bi_flashoffset= flash_info[0].size - CFG_MONITOR_LEN;
diff --git a/board/dave/PPChameleonEVB/config.mk b/board/dave/PPChameleonEVB/config.mk
index 1dc635f..9083aac 100644
--- a/board/dave/PPChameleonEVB/config.mk
+++ b/board/dave/PPChameleonEVB/config.mk
@@ -26,9 +26,3 @@
 
 # Reserve 320 kB for Monitor
 TEXT_BASE = 0xFFFB0000
-
-# Compile the new NAND code (CFG_NAND_LEGACY mustn't be defined)
-BOARDLIBS = drivers/nand/libnand.a
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-#BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/dbau1x00/lowlevel_init.S b/board/dbau1x00/lowlevel_init.S
index 7afd584..14a7846 100644
--- a/board/dbau1x00/lowlevel_init.S
+++ b/board/dbau1x00/lowlevel_init.S
@@ -185,6 +185,8 @@ tlbloop:
 	bne	t0, t2, tlbloop
 	nop
 
+#endif /* CONFIG_DBAU1550 */
+
 	/* First setup pll:s to make serial work ok */
 	/* We have a 12 MHz crystal */
 	li	t0, SYS_CPUPLL
@@ -205,6 +207,7 @@ tlbloop:
 	sw	t1, 0(t0) /* aux pll */
 	sync
 
+#ifdef CONFIG_DBAU1550
 	/*  Static memory controller */
 	/* RCE0 - can not change while fetching, do so from icache */
 	move		t2, ra /* Store return address */
@@ -237,7 +240,7 @@ noCacheJump:
 	sw	t1, 0(t0)
 #else /* CONFIG_DBAU1550 */
 	li	t0, MEM_STTIME0
-	li	t1, 0x00014C0F
+	li	t1, 0x040181D7
 	sw	t1, 0(t0)
 
 	/* RCE0 AMD 29LV640M MirrorBit Flash */
diff --git a/board/delta/config.mk b/board/delta/config.mk
index 9564625..3fe406c 100644
--- a/board/delta/config.mk
+++ b/board/delta/config.mk
@@ -1,8 +1 @@
-#TEXT_BASE = 0x0
-#TEXT_BASE = 0xa1700000
-#TEXT_BASE = 0xa3080000
-#TEXT_BASE = 0x9ffe0000
-TEXT_BASE = 0xa3008000
-
-# Compile the new NAND code (needed iff #ifdef CONFIG_NEW_NAND_CODE)
-BOARDLIBS = drivers/nand/libnand.a
+TEXT_BASE = 0x83008000
diff --git a/board/delta/delta.c b/board/delta/delta.c
index 3ffcc2a..b7671dd 100644
--- a/board/delta/delta.c
+++ b/board/delta/delta.c
@@ -26,9 +26,15 @@
  */
 
 #include <common.h>
+#include <i2c.h>
+#include <da9030.h>
+#include <asm/arch/pxa-regs.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 /* ------------------------------------------------------------------------- */
 
+static void init_DA9030(void);
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -36,8 +42,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -54,14 +58,13 @@ int board_late_init(void)
 {
 	setenv("stdout", "serial");
 	setenv("stderr", "serial");
+	init_DA9030();
 	return 0;
 }
 
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
@@ -73,3 +76,81 @@ int dram_init (void)
 
 	return 0;
 }
+
+void i2c_init_board()
+{
+	CKENB |= (CKENB_4_I2C);
+
+	/* setup I2C GPIO's */
+	GPIO32 = 0x801;		/* SCL = Alt. Fkt. 1 */
+	GPIO33 = 0x801;		/* SDA = Alt. Fkt. 1 */
+}
+
+/* initialize the DA9030 Power Controller */
+static void init_DA9030()
+{
+	uchar addr = (uchar) DA9030_I2C_ADDR, val = 0;
+
+	CKENB |= CKENB_7_GPIO;
+	udelay(100);
+
+	/* Rising Edge on EXTON to reset DA9030 */
+	GPIO17 = 0x8800;	/* configure GPIO17, no pullup, -down */
+	GPDR0 |= (1<<17);	/* GPIO17 is output */
+	GSDR0 = (1<<17);
+	GPCR0 = (1<<17);	/* drive GPIO17 low */
+	GPSR0 = (1<<17);	/* drive GPIO17 high */
+
+#if CFG_DA9030_EXTON_DELAY
+	udelay((unsigned long) CFG_DA9030_EXTON_DELAY);	/* wait for DA9030 */
+#endif
+	GPCR0 = (1<<17);	/* drive GPIO17 low */
+
+	/* reset the watchdog and go active (0xec) */
+	val = (SYS_CONTROL_A_HWRES_ENABLE |
+	       (0x6<<4) |
+	       SYS_CONTROL_A_WDOG_ACTION |
+	       SYS_CONTROL_A_WATCHDOG);
+	if(i2c_write(addr, SYS_CONTROL_A, 1, &val, 1)) {
+		printf("Error accessing DA9030 via i2c.\n");
+		return;
+	}
+
+	i2c_reg_write(addr, REG_CONTROL_1_97, 0xfd); /* disable LDO1, enable LDO6 */
+	i2c_reg_write(addr, LDO2_3, 0xd1);	/* LDO2 =1,9V, LDO3=3,1V */
+	i2c_reg_write(addr, LDO4_5, 0xcc);	/* LDO2 =1,9V, LDO3=3,1V */
+	i2c_reg_write(addr, LDO6_SIMCP, 0x3e);	/* LDO6=3,2V, SIMCP = 5V support */
+	i2c_reg_write(addr, LDO7_8, 0xc9);	/* LDO7=2,7V, LDO8=3,0V */
+	i2c_reg_write(addr, LDO9_12, 0xec);	/* LDO9=3,0V, LDO12=3,2V */
+	i2c_reg_write(addr, BUCK, 0x0c);	/* Buck=1.2V */
+	i2c_reg_write(addr, REG_CONTROL_2_98, 0x7f); /* All LDO'S on 8,9,10,11,12,14 */
+	i2c_reg_write(addr, LDO_10_11, 0xcc);	/* LDO10=3.0V  LDO11=3.0V */
+	i2c_reg_write(addr, LDO_15, 0xae);	/* LDO15=1.8V, dislock first 3bit */
+	i2c_reg_write(addr, LDO_14_16, 0x05);	/* LDO14=2.8V, LDO16=NB */
+	i2c_reg_write(addr, LDO_18_19, 0x9c);	/* LDO18=3.0V, LDO19=2.7V */
+	i2c_reg_write(addr, LDO_17_SIMCP0, 0x2c); /* LDO17=3.0V, SIMCP=3V support */
+	i2c_reg_write(addr, BUCK2_DVC1, 0x9a);	/* Buck2=1.5V plus Update support of 520 MHz */
+	i2c_reg_write(addr, REG_CONTROL_2_18, 0x43); /* Ball on */
+	i2c_reg_write(addr, MISC_CONTROLB, 0x08); /* session valid enable */
+	i2c_reg_write(addr, USBPUMP, 0xc1);	/* start pump, ignore HW signals */
+
+	val = i2c_reg_read(addr, STATUS);
+	if(val & STATUS_CHDET)
+		printf("Charger detected, turning on LED.\n");
+	else {
+		printf("No charger detetected.\n");
+		/* undervoltage? print error and power down */
+	}
+}
+
+
+#if 0
+/* reset the DA9030 watchdog */
+void hw_watchdog_reset(void)
+{
+	uchar addr = (uchar) DA9030_I2C_ADDR, val = 0;
+	val = i2c_reg_read(addr, SYS_CONTROL_A);
+	val |= SYS_CONTROL_A_WATCHDOG;
+	i2c_reg_write(addr, SYS_CONTROL_A, val);
+}
+#endif
diff --git a/board/delta/lowlevel_init.S b/board/delta/lowlevel_init.S
index 498cf7f..f059db5 100644
--- a/board/delta/lowlevel_init.S
+++ b/board/delta/lowlevel_init.S
@@ -1,10 +1,5 @@
 /*
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * NOTE: I haven't clean this up considerably, just enough to get it
- * running. See hal_platform_setup.h for the source. See
- * board/cradle/lowlevel_init.S for another PXA250 setup that is
- * much cleaner.
+ * (C) Copyright 2006 DENX Software Engineering
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -31,14 +26,6 @@
 
 DRAM_SIZE:  .long   CFG_DRAM_SIZE
 
-/* wait for coprocessor write complete */
-.macro CPWAIT reg
-	mrc	p15,0,\reg,c2,c0,0
-	mov	\reg,\reg
-	sub	pc,pc,#4
-.endm
-
-
 .macro wait time
 	ldr		r2, =OSCR
 	mov		r3, #0
@@ -49,13 +36,9 @@ DRAM_SIZE:  .long   CFG_DRAM_SIZE
 	bls		0b
 .endm
 
-/*
- *	Memory setup
- */
-
 .globl lowlevel_init
 lowlevel_init:
-	/* Set up GPIO pins first ----------------------------------------- */
+	/* Set up GPIO pins first */
 	mov	 r10, lr
 
 	/*  Configure GPIO  Pins 97, 98 UART1 / altern. Fkt. 1 */
@@ -73,22 +56,7 @@ lowlevel_init:
 	bic		r1, r1, #0x80000000
 	str		r1, [r0]
 
-	/* ---------------------------------------------------------------- */
-	/* Enable memory interface					    */
-	/* ---------------------------------------------------------------- */
-
-	/* ---------------------------------------------------------------- */
-	/* Step 1: Wait for at least 200 microsedonds to allow internal	    */
-	/*	   clocks to settle. Only necessary after hard reset...	    */
-	/*	   FIXME: can be optimized later			    */
-	/* ---------------------------------------------------------------- */
-;	wait #300
-
 mem_init:
-
-#define NEW_SDRAM_INIT 1
-#ifdef NEW_SDRAM_INIT
-
 	/* Configure ACCR Register - enable DMEMC Clock at 260 / 2 MHz */
 	ldr		r0, =ACCR
 	ldr		r1, [r0]
@@ -99,7 +67,7 @@ mem_init:
 	/* 2. Programm MDCNFG, leaving DMCEN de-asserted */
 	ldr		r0, =MDCNFG
 	ldr		r1, =(MDCNFG_DMAP | MDCNFG_DTYPE | MDCNFG_DTC_2 | MDCNFG_DCSE0 | MDCNFG_DRAC_13)
-	/*	ldr		r1, =0x80000403 */
+	/* ldr		r1, =0x80000403 */
 	str		r1, [r0]
 	ldr		r1, [r0]	/* delay until written */
 
@@ -140,121 +108,6 @@ mem_init:
 	orr		r1, r1, #MDCNFG_DMCEN
 	str		r1, [r0]
 
-
-#else /* NEW_SDRAM_INIT */
-
-	/* configure the MEMCLKCFG register */
-	ldr		r1, =MEMCLKCFG
-	ldr		r2, =0x00010001
-	str		r2, [r1]	     @ WRITE
-	ldr		r2, [r1]	     @ DELAY UNTIL WRITTEN
-
-	/* set CSADRCFG[0] to data flash SRAM mode */
-	ldr		r1, =CSADRCFG0
-	ldr		r2, =0x00320809
-	str		r2, [r1]	     @ WRITE
-	ldr		r2, [r1]	     @ DELAY UNTIL WRITTEN
-
-	/* set CSADRCFG[1] to data flash SRAM mode */
-	ldr		r1, =CSADRCFG1
-	ldr		r2, =0x00320809
-	str		r2, [r1]	     @ WRITE
-	ldr		r2, [r1]	     @ DELAY UNTIL WRITTEN
-
-	/* set MSC 0 register for SRAM memory */
-	ldr		r1, =MSC0
-	ldr		r2, =0x11191119
-	str		r2, [r1]	     @ WRITE
-	ldr		r2, [r1]	     @ DELAY UNTIL WRITTEN
-
-	/* set CSADRCFG[2] to data flash SRAM mode */
-	ldr		r1, =CSADRCFG2
-	ldr		r2, =0x00320809
-	str		r2, [r1]	     @ WRITE
-	ldr		r2, [r1]	     @ DELAY UNTIL WRITTEN
-
-	/* set CSADRCFG[3] to VLIO mode */
-	ldr		r1, =CSADRCFG3
-	ldr		r2, =0x0032080B
-	str		r2, [r1]	     @ WRITE
-	ldr		r2, [r1]	     @ DELAY UNTIL WRITTEN
-
-	/* set MSC 1 register for VLIO memory */
-	ldr		r1, =MSC1
-	ldr		r2, =0x123C1119
-	str		r2, [r1]	     @ WRITE
-	ldr		r2, [r1]	     @ DELAY UNTIL WRITTEN
-
-#if 0
-	/* This does not work in Zylonite. -SC */
-	ldr		r0, =0x15fffff0
-	ldr		r1, =0xb10b
-	str		r1, [r0]
-	str		r1, [r0, #4]
-#endif
-
-	/* Configure ACCR Register */
-	ldr		r0, =ACCR		@ ACCR
-	ldr		r1, =0x0180b108
-	str		r1, [r0]
-	ldr		r1, [r0]
-
-	/* Configure MDCNFG Register */
-	ldr		r0, =MDCNFG		@ MDCNFG
-	ldr		r1, =0x403
-	str		r1, [r0]
-	ldr		r1, [r0]
-
-	/* Perform Resistive Compensation by configuring RCOMP register */
-	ldr		r1, =RCOMP		@ RCOMP
-	ldr		r2, =0x000000ff
-	str		r2, [r1]
-	ldr		r2, [r1]
-
-	/* Configure MDMRS Register for SDCS0 */
-	ldr		r1, =MDMRS		@ MDMRS
-	ldr		r2, =0x60000023
-	ldr		r3, [r1]
-	orr		r2, r2, r3
-	str		r2, [r1]
-	ldr		r2, [r1]
-
-	/* Configure MDMRS Register for SDCS1 */
-	ldr		r1, =MDMRS		@ MDMRS
-	ldr		r2, =0xa0000023
-	ldr		r3, [r1]
-	orr		r2, r2, r3
-	str		r2, [r1]
-	ldr		r2, [r1]
-
-	/* Configure MDREFR */
-	ldr		r1, =MDREFR		@ MDREFR
-	ldr		r2, =0x00000006
-	str		r2, [r1]
-	ldr		r2, [r1]
-
-	/* Configure EMPI */
-	ldr		r1, =EMPI		@ EMPI
-	ldr		r2, =0x80000000
-	str		r2, [r1]
-	ldr		r2, [r1]
-
-	/* Hardware DDR Read-Strobe Delay Calibration */
-	ldr		r0, =DDR_HCAL		@ DDR_HCAL
-	ldr		r1, =0x803ffc07	    @ the offset is correct? -SC
-	str		r1, [r0]
-	wait		#5
-	ldr		r1, [r0]
-
-	/* Here we assume the hardware calibration alwasy be successful. -SC */
-	/* Set DMCEN bit in MDCNFG Register */
-	ldr		r0, =MDCNFG		@ MDCNFG
-	ldr		r1, [r0]
-	orr		r1, r1, #0x40000000	@ enable SDRAM for Normal Access
-	str		r1, [r0]
-
-#endif /* NEW_SDRAM_INIT */
-
 #ifndef CFG_SKIP_DRAM_SCRUB
 	/* scrub/init SDRAM if enabled/present */
 	ldr	r8, =CFG_DRAM_BASE	/* base address of SDRAM (CFG_DRAM_BASE) */
@@ -290,96 +143,4 @@ mem_init:
 	mcr	p14,0,r0,c10,c0,0  /* dcsr */
 
 endlowlevel_init:
-
 	mov	pc, lr
-
-
-/*
-@********************************************************************************
-@ DDR calibration
-@
-@  This function is used to calibrate DQS delay lines.
-@ Monahans supports three ways to do it. One is software
-@ calibration. Two is hardware calibration. Three is hybrid
-@ calibration.
-@
-@ TBD
-@ -SC
-ddr_calibration:
-
-	@ Case 1:	Write the correct delay value once
-	@ Configure DDR_SCAL Register
-	ldr		r0, =DDR_SCAL		@ DDR_SCAL
-q	ldr		r1, =0xaf2f2f2f
-	str		r1, [r0]
-	ldr		r1, [r0]
-*/
-/*	@ Case 2:	Software Calibration
-	@ Write test pattern to memory
-	ldr		r5, =0x0faf0faf		@ Data Pattern
-	ldr		r4, =0xa0000000		@ DDR ram
-	str		r5, [r4]
-
-	mov		r1, =0x0		@ delay count
-	mov		r6, =0x0
-	mov		r7, =0x0
-ddr_loop1:
-	add		r1, r1, =0x1
-	cmp		r1, =0xf
-	ble		end_loop
-	mov		r3, r1
-	mov		r0, r1, lsl #30
-	orr		r3, r3, r0
-	mov		r0, r1, lsl #22
-	orr		r3, r3, r0
-	mov		r0, r1, lsl #14
-	orr		r3, r3, r0
-	orr		r3, r3, =0x80000000
-	ldr		r2, =DDR_SCAL
-	str		r3, [r2]
-
-	ldr		r2, [r4]
-	cmp		r2, r5
-	bne		ddr_loop1
-	mov		r6, r1
-ddr_loop2:
-	add		r1, r1, =0x1
-	cmp		r1, =0xf
-	ble		end_loop
-	mov		r3, r1
-	mov		r0, r1, lsl #30
-	orr		r3, r3, r0
-	mov		r0, r1, lsl #22
-	orr		r3, r3, r0
-	mov		r0, r1, lsl #14
-	orr		r3, r3, r0
-	orr		r3, r3, =0x80000000
-	ldr		r2, =DDR_SCAL
-	str		r3, [r2]
-
-	ldr		r2, [r4]
-	cmp		r2, r5
-	be		ddr_loop2
-	mov		r7, r2
-
-	add		r3, r6, r7
-	lsr		r3, r3, =0x1
-	mov		r0, r1, lsl #30
-	orr		r3, r3, r0
-	mov		r0, r1, lsl #22
-	orr		r3, r3, r0
-	mov		r0, r1, lsl #14
-	orr		r3, r3, r0
-	orr		r3, r3, =0x80000000
-	ldr		r2, =DDR_SCAL
-
-end_loop:
-
-	@ Case 3:	Hardware Calibratoin
-	ldr		r0, =DDR_HCAL		@ DDR_HCAL
-	ldr		r1, =0x803ffc07	    @ the offset is correct? -SC
-	str		r1, [r0]
-	wait		#5
-	ldr		r1, [r0]
-	mov		pc, lr
-*/
diff --git a/board/delta/nand.c b/board/delta/nand.c
index c4df6e5..fe648fc 100644
--- a/board/delta/nand.c
+++ b/board/delta/nand.c
@@ -23,7 +23,7 @@
 #include <common.h>
 
 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#ifdef CONFIG_NEW_NAND_CODE
+#if !defined(CFG_NAND_LEGACY)
 
 #include <nand.h>
 #include <asm/arch/pxa-regs.h>
@@ -293,11 +293,6 @@ static int dfc_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
 {
 	unsigned long ndsr=0, event=0;
 
-	/* mk@tbd set appropriate timeouts */
-	/* 	if (state == FL_ERASING) */
-	/* 		timeo = CFG_HZ * 400; */
-	/* 	else */
-	/* 		timeo = CFG_HZ * 20; */
 	if(state == FL_WRITING) {
 		event = NDSR_CS0_CMDD | NDSR_CS0_BBD;
 	} else if(state == FL_ERASING) {
@@ -563,13 +558,12 @@ void board_nand_init(struct nand_chip *nand)
 
 
 	/* wait 10 us due to cmd buffer clear reset */
-	/* 	wait(10); */
+	/*	wait(10); */
 
 
 	nand->hwcontrol = dfc_hwcontrol;
-/* 	nand->dev_ready = dfc_device_ready; */
+/*	nand->dev_ready = dfc_device_ready; */
 	nand->eccmode = NAND_ECC_SOFT;
-	nand->chip_delay = NAND_DELAY_US;
 	nand->options = NAND_BUSWIDTH_16;
 	nand->waitfunc = dfc_wait;
 	nand->read_byte = dfc_read_byte;
diff --git a/board/dnp1110/dnp1110.c b/board/dnp1110/dnp1110.c
index 24c3e00..ab8e7be 100644
--- a/board/dnp1110/dnp1110.c
+++ b/board/dnp1110/dnp1110.c
@@ -24,8 +24,8 @@
 
 #include <common.h>
 #include <SA-1100.h>
-/* ------------------------------------------------------------------------- */
 
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -33,25 +33,21 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
 	/* arch number of DNP1110-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_DNP1110;
 
-    /* flash vpp on */
-    PPDR |= 0x80;	/* assumes LCD controller is off */
-    PPSR |= 0x80;
+	/* flash vpp on */
+	PPDR |= 0x80;	/* assumes LCD controller is off */
+	PPSR |= 0x80;
 
 	return 0;
 }
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/eltec/bab7xx/bab7xx.c b/board/eltec/bab7xx/bab7xx.c
index fc48ed5..555475e 100644
--- a/board/eltec/bab7xx/bab7xx.c
+++ b/board/eltec/bab7xx/bab7xx.c
@@ -31,6 +31,8 @@
 #include <ns87308.h>
 #include <video_fb.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*---------------------------------------------------------------------------*/
 /*
  * Get Bus clock frequency
@@ -169,8 +171,6 @@ long int initdram (int board_type)
 
 void after_reloc (ulong dest_addr)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/*
 	 * Jump to the main U-Boot board init code
 	 */
diff --git a/board/eltec/elppc/elppc.c b/board/eltec/elppc/elppc.c
index a9dbeb2..108adb1 100644
--- a/board/eltec/elppc/elppc.c
+++ b/board/eltec/elppc/elppc.c
@@ -26,6 +26,8 @@
 #include <mpc106.h>
 #include <video_fb.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 int checkboard (void)
@@ -137,8 +139,6 @@ void watchdog_reset (void)
 
 void after_reloc (ulong dest_addr)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/*
 	 * Jump to the main U-Boot board init code
 	 */
diff --git a/board/ep7312/ep7312.c b/board/ep7312/ep7312.c
index 11eab23..6968a5d 100644
--- a/board/ep7312/ep7312.c
+++ b/board/ep7312/ep7312.c
@@ -25,8 +25,7 @@
 #include <common.h>
 #include <clps7111.h>
 
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -34,8 +33,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* Activate LED flasher */
 	IO_LEDFLSH = 0x40;
 
@@ -50,8 +47,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/esd/apc405/apc405.c b/board/esd/apc405/apc405.c
index 4b2b07a..078df00 100644
--- a/board/esd/apc405/apc405.c
+++ b/board/esd/apc405/apc405.c
@@ -26,7 +26,7 @@
 #include <command.h>
 #include <malloc.h>
 
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
 
 #if 0
 #define FPGA_DEBUG
@@ -166,8 +166,6 @@ int misc_init_f (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	volatile unsigned short *fpga_mode =
 		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
 	volatile unsigned short *fpga_ctrl2 =
@@ -301,8 +299,6 @@ int misc_init_r (void)
 
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	unsigned char str[64];
 	int i = getenv_r ("serial#", str, sizeof(str));
 
diff --git a/board/esd/ar405/ar405.c b/board/esd/ar405/ar405.c
index 3aac3c6..dfead33 100644
--- a/board/esd/ar405/ar405.c
+++ b/board/esd/ar405/ar405.c
@@ -26,6 +26,8 @@
 #include <asm/processor.h>
 #include <command.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*cmd_boot.c*/
 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
 extern void lxt971_no_sleep(void);
@@ -53,8 +55,6 @@ const unsigned char fpgadata_xl30[] = {
 
 int board_early_init_f (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int index, len, i;
 	int status;
 
@@ -151,8 +151,6 @@ int board_early_init_f (void)
 
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int index;
 	int len;
 	char str[64];
diff --git a/board/esd/ash405/config.mk b/board/esd/ash405/config.mk
index 3cf5dd8..1d743a9 100644
--- a/board/esd/ash405/config.mk
+++ b/board/esd/ash405/config.mk
@@ -26,6 +26,3 @@
 #
 
 TEXT_BASE = 0xFFFC0000
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/esd/canbt/canbt.c b/board/esd/canbt/canbt.c
index 2ced6cb..055a397 100644
--- a/board/esd/canbt/canbt.c
+++ b/board/esd/canbt/canbt.c
@@ -26,6 +26,7 @@
 #include <asm/processor.h>
 #include <command.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 
 /*cmd_boot.c*/
 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
@@ -50,8 +51,6 @@ const unsigned char fpgadata[] = {
 
 int board_early_init_f (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	unsigned long cntrl0Reg;
 	int index, len, i;
 	int status;
diff --git a/board/esd/cms700/cms700.c b/board/esd/cms700/cms700.c
index e283a92..cb04710 100644
--- a/board/esd/cms700/cms700.c
+++ b/board/esd/cms700/cms700.c
@@ -26,10 +26,10 @@
 #include <command.h>
 #include <malloc.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 
 extern void lxt971_no_sleep(void);
 
-
 /* fpga configuration data - not compressed, generated by bin2c */
 const unsigned char fpgadata[] =
 {
@@ -87,8 +87,6 @@ int misc_init_f (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* adjust flash start and offset */
 	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
 	gd->bd->bi_flashoffset = 0;
diff --git a/board/esd/cms700/config.mk b/board/esd/cms700/config.mk
index 0c56c40..5c3c01c 100644
--- a/board/esd/cms700/config.mk
+++ b/board/esd/cms700/config.mk
@@ -26,6 +26,3 @@
 #
 
 TEXT_BASE = 0xFFFC0000
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/esd/common/auto_update.c b/board/esd/common/auto_update.c
index cad8211..5cd3423 100644
--- a/board/esd/common/auto_update.c
+++ b/board/esd/common/auto_update.c
@@ -24,8 +24,8 @@
 
 #include <common.h>
 
-#ifndef CFG_NAND_LEGACY
-#error CFG_NAND_LEGACY not defined in a file using the legacy NAND support!
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+#warning CFG_NAND_LEGACY not defined in a file using the legacy NAND support!
 #endif
 
 #include <command.h>
@@ -74,7 +74,7 @@ extern int flash_write (char *, ulong, ulong);
 /* change char* to void* to shutup the compiler */
 extern block_dev_desc_t *get_dev (char*, int);
 
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
 /* references to names in cmd_nand.c */
 #define NANDRW_READ	0x01
 #define NANDRW_WRITE	0x00
@@ -84,7 +84,7 @@ extern struct nand_chip nand_dev_desc[];
 extern int nand_legacy_rw(struct nand_chip* nand, int cmd, size_t start, size_t len,
 		   size_t * retlen, u_char * buf);
 extern int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean);
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */
 
 extern block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
 
@@ -188,7 +188,7 @@ int au_do_update(int i, long sz)
 	int off, rc;
 	uint nbytes;
 	int k;
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
 	int total;
 #endif
 
@@ -262,7 +262,7 @@ int au_do_update(int i, long sz)
 			debug ("flash_sect_erase(%lx, %lx);\n", start, end);
 			flash_sect_erase(start, end);
 		} else {
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
 			printf("Updating NAND FLASH with image %s\n", au_image[i].name);
 			debug ("nand_legacy_erase(%lx, %lx);\n", start, end);
 			rc = nand_legacy_erase (nand_dev_desc, start, end - start + 1, 0);
@@ -290,7 +290,7 @@ int au_do_update(int i, long sz)
 			debug ("flash_write(%p, %lx %x)\n", addr, start, nbytes);
 			rc = flash_write((char *)addr, start, nbytes);
 		} else {
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
 			debug ("nand_legacy_rw(%p, %lx %x)\n", addr, start, nbytes);
 			rc = nand_legacy_rw(nand_dev_desc, NANDRW_WRITE | NANDRW_JFFS2,
 				     start, nbytes, (size_t *)&total, (uchar *)addr);
@@ -308,7 +308,7 @@ int au_do_update(int i, long sz)
 		if (au_image[i].type != AU_NAND) {
 			rc = crc32 (0, (uchar *)(start + off), ntohl(hdr->ih_size));
 		} else {
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
 			rc = nand_legacy_rw(nand_dev_desc, NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP,
 				     start, nbytes, (size_t *)&total, (uchar *)addr);
 			rc = crc32 (0, (uchar *)(addr + off), ntohl(hdr->ih_size));
diff --git a/board/esd/cpci2dp/cpci2dp.c b/board/esd/cpci2dp/cpci2dp.c
index 1a27ca0..36bf329 100644
--- a/board/esd/cpci2dp/cpci2dp.c
+++ b/board/esd/cpci2dp/cpci2dp.c
@@ -26,6 +26,8 @@
 #include <command.h>
 #include <malloc.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int board_early_init_f (void)
 {
 	unsigned long cntrl0Reg;
@@ -74,7 +76,6 @@ int misc_init_f (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned long cntrl0Reg;
 
 	/* adjust flash start and offset */
diff --git a/board/esd/cpci405/config.mk b/board/esd/cpci405/config.mk
index ceff4c4..0be45c7 100644
--- a/board/esd/cpci405/config.mk
+++ b/board/esd/cpci405/config.mk
@@ -38,6 +38,3 @@ TEXT_BASE = 0xFFFD0000
 endif
 endif
 endif
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c
index 2ab9673..f803610 100644
--- a/board/esd/cpci405/cpci405.c
+++ b/board/esd/cpci405/cpci405.c
@@ -27,7 +27,8 @@
 #include <malloc.h>
 #include <net.h>
 
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
+
 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);       /*cmd_boot.c*/
 #if 0
 #define FPGA_DEBUG
@@ -100,8 +101,6 @@ int board_early_init_f (void)
 #endif
 
 #ifdef FPGA_DEBUG
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* set up serial port with default baudrate */
 	(void) get_clocks ();
 	gd->baudrate = CONFIG_BAUDRATE;
@@ -126,8 +125,6 @@ int board_early_init_f (void)
 		if (status != 0) {
 			/* booting FPGA failed */
 #ifndef FPGA_DEBUG
-			DECLARE_GLOBAL_DATA_PTR;
-
 			/* set up serial port with default baudrate */
 			(void) get_clocks ();
 			gd->baudrate = CONFIG_BAUDRATE;
@@ -268,7 +265,6 @@ int misc_init_f (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned long cntrl0Reg;
 
 	/* adjust flash start and offset */
@@ -707,8 +703,6 @@ U_BOOT_CMD(
  */
 int do_get_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	bd_t *bd = gd->bd;
 	char *buf;
 	ulong crc;
diff --git a/board/esd/cpci750/mpsc.c b/board/esd/cpci750/mpsc.c
index 52398b2..25c10e0 100644
--- a/board/esd/cpci750/mpsc.c
+++ b/board/esd/cpci750/mpsc.c
@@ -42,6 +42,8 @@
 
 #include "../../Marvell/include/memory.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* Define this if you wish to use the MPSC as a register based UART.
  * This will force the serial port to not use the SDMA engine at all.
  */
@@ -157,7 +159,6 @@ char mpsc_getchar_debug (void)
  * global variables [josh] */
 int mpsc_putchar_early (char ch)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	int mpsc = CHANNEL;
 	int temp =
 		GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
@@ -510,7 +511,6 @@ void mpsc_init2 (void)
 
 int galbrg_set_baudrate (int channel, int rate)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	int clock;
 
 	galbrg_disable (channel);	/*ok */
diff --git a/board/esd/cpci750/mv_eth.c b/board/esd/cpci750/mv_eth.c
index be176dc..bc84ef0 100644
--- a/board/esd/cpci750/mv_eth.c
+++ b/board/esd/cpci750/mv_eth.c
@@ -733,6 +733,7 @@ int mv64360_eth_xmit (struct eth_device *dev, volatile void *dataPtr,
 	pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC;	/* DMA owned, first last */
 	pkt_info.byte_cnt = dataSize;
 	pkt_info.buf_ptr = (unsigned int) dataPtr;
+	pkt_info.return_info = 0;
 
 	status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info);
 	if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) {
diff --git a/board/esd/cpci750/sdram_init.c b/board/esd/cpci750/sdram_init.c
index db545ef..6bdfc1d 100644
--- a/board/esd/cpci750/sdram_init.c
+++ b/board/esd/cpci750/sdram_init.c
@@ -45,6 +45,7 @@
 #include "64360.h"
 #include "mv_regs.h"
 
+DECLARE_GLOBAL_DATA_PTR;
 
 #undef	DEBUG
 /* #define DEBUG */
@@ -250,8 +251,6 @@ NSto10PS(unsigned char spd_byte)
 /* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
 static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	unsigned long spd_checksum;
 
 	uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR;
diff --git a/board/esd/cpci750/serial.c b/board/esd/cpci750/serial.c
index 44de052..ba32ac1 100644
--- a/board/esd/cpci750/serial.c
+++ b/board/esd/cpci750/serial.c
@@ -38,13 +38,12 @@
 #include "../../Marvell/include/memory.h"
 #include "serial.h"
 
-
 #include "mpsc.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int serial_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	mpsc_init (gd->baudrate);
 
 	return (0);
@@ -70,8 +69,6 @@ int serial_tstc (void)
 
 void serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	galbrg_set_baudrate (CONFIG_MPSC_PORT, gd->baudrate);
 }
 
diff --git a/board/esd/cpciiser4/cpciiser4.c b/board/esd/cpciiser4/cpciiser4.c
index 7bf7bb5..fcb8cbb 100644
--- a/board/esd/cpciiser4/cpciiser4.c
+++ b/board/esd/cpciiser4/cpciiser4.c
@@ -26,6 +26,8 @@
 #include <asm/processor.h>
 #include <command.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*cmd_boot.c*/
 
 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
@@ -55,8 +57,6 @@ const unsigned char fpgadata[] = {
 
 int board_early_init_f (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int index, len, i;
 	volatile unsigned char dummy;
 	int status;
diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c
index fd51f7f..240ab78 100644
--- a/board/esd/dp405/dp405.c
+++ b/board/esd/dp405/dp405.c
@@ -26,6 +26,7 @@
 #include <command.h>
 #include <malloc.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 
 /* fpga configuration data - not compressed, generated by bin2c */
 const unsigned char fpgadata[] =
@@ -84,8 +85,6 @@ int misc_init_f (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* adjust flash start and offset */
 	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
 	gd->bd->bi_flashoffset = 0;
diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c
index 26e8341..a019ce4 100644
--- a/board/esd/du405/du405.c
+++ b/board/esd/du405/du405.c
@@ -28,6 +28,8 @@
 #include <405gp_i2c.h>
 #include <command.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*cmd_boot.c*/
 
 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
@@ -55,8 +57,6 @@ const unsigned char fpgadata[] = {
 
 int board_early_init_f (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int index, len, i;
 	int status;
 
diff --git a/board/esd/hh405/config.mk b/board/esd/hh405/config.mk
index 798a3fa..7129ad5 100644
--- a/board/esd/hh405/config.mk
+++ b/board/esd/hh405/config.mk
@@ -29,6 +29,3 @@
 TEXT_BASE = 0xFFF80000
 #TEXT_BASE = 0xFFFC0000
 #TEXT_BASE = 0x00FC0000
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/esd/hh405/hh405.c b/board/esd/hh405/hh405.c
index 99fd556..ea344c0 100644
--- a/board/esd/hh405/hh405.c
+++ b/board/esd/hh405/hh405.c
@@ -34,6 +34,8 @@
 #include <pci.h>
 #include <sm501.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_VIDEO_SM501
 
 #define SWAP32(x)	 ((((x) & 0x000000ff) << 24) | (((x) & 0x0000ff00) << 8)|\
@@ -358,8 +360,6 @@ int board_early_init_f (void)
 
 int cf_enable(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int i;
 
 	volatile unsigned short *fpga_ctrl =
@@ -391,8 +391,6 @@ int cf_enable(void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	volatile unsigned short *fpga_ctrl =
 		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
 	volatile unsigned short *lcd_contrast =
@@ -628,8 +626,6 @@ int misc_init_r (void)
 
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	char str[64];
 	int i = getenv_r ("serial#", str, sizeof(str));
 
@@ -673,8 +669,6 @@ long int initdram (int board_type)
 #ifdef CONFIG_IDE_RESET
 void ide_set_reset(int on)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	volatile unsigned short *fpga_mode =
 		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
 	volatile unsigned short *fpga_status =
@@ -788,8 +782,6 @@ U_BOOT_CMD(eepwren,	2,	0,	do_eep_wren,
  */
 void video_get_info_str (int line_number, char *info)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	char str[64];
 	char str2[64];
 	int i = getenv_r("serial#", str2, sizeof(str));
diff --git a/board/esd/hub405/config.mk b/board/esd/hub405/config.mk
index 4c60c35..a6d31aa 100644
--- a/board/esd/hub405/config.mk
+++ b/board/esd/hub405/config.mk
@@ -26,6 +26,3 @@
 #
 
 TEXT_BASE = 0xFFFC0000
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/esd/hub405/hub405.c b/board/esd/hub405/hub405.c
index 0c6771f..1e0accb 100644
--- a/board/esd/hub405/hub405.c
+++ b/board/esd/hub405/hub405.c
@@ -26,10 +26,10 @@
 #include <command.h>
 #include <malloc.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 
 extern void lxt971_no_sleep(void);
 
-
 int board_revision(void)
 {
 	unsigned long osrl_reg;
@@ -110,8 +110,6 @@ int misc_init_f (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
 	volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
 	volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
@@ -208,8 +206,6 @@ int misc_init_r (void)
  */
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	char str[64];
 	int i = getenv_r ("serial#", str, sizeof(str));
 
diff --git a/board/esd/pci405/pci405.c b/board/esd/pci405/pci405.c
index 4be4d7e..e5d2273 100644
--- a/board/esd/pci405/pci405.c
+++ b/board/esd/pci405/pci405.c
@@ -30,6 +30,7 @@
 
 #include "pci405.h"
 
+DECLARE_GLOBAL_DATA_PTR;
 
 /* Prototypes */
 int gunzip(void *, int, unsigned char *, unsigned long *);
@@ -111,8 +112,6 @@ int board_revision(void)
 
 unsigned long fpga_done_state(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	if (gd->board_type < 2) {
 		return FPGA_DONE_STATE_V11;
 	} else {
@@ -123,8 +122,6 @@ unsigned long fpga_done_state(void)
 
 unsigned long fpga_init_state(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	if (gd->board_type < 2) {
 		return FPGA_INIT_STATE_V11;
 	} else {
@@ -320,8 +317,6 @@ int misc_init_r (void)
 
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	char str[64];
 	int i = getenv_r ("serial#", str, sizeof(str));
 
diff --git a/board/esd/plu405/config.mk b/board/esd/plu405/config.mk
index 916b285..25b2105 100644
--- a/board/esd/plu405/config.mk
+++ b/board/esd/plu405/config.mk
@@ -27,6 +27,3 @@
 
 TEXT_BASE = 0xFFFC0000
 #TEXT_BASE = 0x00FC0000
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c
index f9e4d43..7499671 100644
--- a/board/esd/pmc405/pmc405.c
+++ b/board/esd/pmc405/pmc405.c
@@ -29,10 +29,10 @@
 #include <command.h>
 #include <malloc.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 
 extern void lxt971_no_sleep(void);
 
-
 /* fpga configuration data - not compressed, generated by bin2c */
 const unsigned char fpgadata[] =
 {
@@ -100,8 +100,6 @@ int board_early_init_f (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* adjust flash start and offset */
 	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
 	gd->bd->bi_flashoffset = 0;
diff --git a/board/esd/voh405/config.mk b/board/esd/voh405/config.mk
index 72e8103..219a4eb 100644
--- a/board/esd/voh405/config.mk
+++ b/board/esd/voh405/config.mk
@@ -26,6 +26,3 @@
 #
 
 TEXT_BASE = 0xFFF80000
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/esd/vom405/vom405.c b/board/esd/vom405/vom405.c
index bc5fa7c..8be552e 100644
--- a/board/esd/vom405/vom405.c
+++ b/board/esd/vom405/vom405.c
@@ -26,10 +26,10 @@
 #include <command.h>
 #include <malloc.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 
 extern void lxt971_no_sleep(void);
 
-
 /* fpga configuration data - not compressed, generated by bin2c */
 const unsigned char fpgadata[] =
 {
@@ -81,8 +81,6 @@ int board_early_init_f (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* adjust flash start and offset */
 	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
 	gd->bd->bi_flashoffset = 0;
diff --git a/board/esd/wuh405/config.mk b/board/esd/wuh405/config.mk
index 3cf5dd8..1d743a9 100644
--- a/board/esd/wuh405/config.mk
+++ b/board/esd/wuh405/config.mk
@@ -26,6 +26,3 @@
 #
 
 TEXT_BASE = 0xFFFC0000
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/etin/debris/debris.c b/board/etin/debris/debris.c
index 93c502c..08ed635 100644
--- a/board/etin/debris/debris.c
+++ b/board/etin/debris/debris.c
@@ -26,6 +26,8 @@
 #include <pci.h>
 #include <i2c.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int checkboard (void)
 {
 	/*TODO: Check processor type */
@@ -170,8 +172,6 @@ void nvram_write(long dest, const void *src, size_t count)
 
 int misc_init_r(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* Write ethernet addr in NVRAM for VxWorks */
 	nvram_write(CFG_ENV_ADDR + CFG_NVRAM_VXWORKS_OFFS,
 			(char*)&gd->bd->bi_enetaddr[0], 6);
diff --git a/board/etx094/etx094.c b/board/etx094/etx094.c
index dba3c11..eb58b5d 100644
--- a/board/etx094/etx094.c
+++ b/board/etx094/etx094.c
@@ -24,6 +24,8 @@
 #include <common.h>
 #include <mpc8xx.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 static long int dram_size (long int, long int *, long int);
@@ -90,8 +92,6 @@ const uint sdram_table[] = {
 
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	char *s = getenv ("serial#");
 	char *e;
 
diff --git a/board/evb4510/evb4510.c b/board/evb4510/evb4510.c
index 0008e5a..13abbb7 100644
--- a/board/evb4510/evb4510.c
+++ b/board/evb4510/evb4510.c
@@ -25,6 +25,8 @@
 #include <asm/hardware.h>
 #include <command.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_EVB4510
 
 /* ------------------------------------------------------------------------- */
@@ -35,8 +37,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	icache_enable();
 
 	/* address for the kernel command line */
@@ -52,7 +52,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
 #if CONFIG_NR_DRAM_BANKS == 2
diff --git a/board/evb64260/evb64260.c b/board/evb64260/evb64260.c
index 6a9d164..ab59941 100644
--- a/board/evb64260/evb64260.c
+++ b/board/evb64260/evb64260.c
@@ -37,6 +37,9 @@
 #include "mpsc.h"
 #include "i2c.h"
 #include "64260.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_ZUMA_V2
 extern void zuma_mbox_init(void);
 #endif
@@ -323,8 +326,6 @@ int misc_init_r (void)
 void
 after_reloc(ulong dest_addr)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* check to see if we booted from the sram.  If so, move things
 	 * back to the way they should be. (we're running from main
 	 * memory at this point now */
diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c
index ee623ca..98ac7f6 100644
--- a/board/evb64260/mpsc.c
+++ b/board/evb64260/mpsc.c
@@ -32,6 +32,8 @@
 #include <malloc.h>
 #include "mpsc.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int (*mpsc_putchar)(char ch) = mpsc_putchar_early;
 
 static volatile unsigned int *rx_desc_base=NULL;
@@ -115,7 +117,6 @@ struct _tag_mirror_hack {
 int
 mpsc_putchar_early(char ch)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	int mpsc=CHANNEL;
 	int temp=GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
 	galmpsc_set_tcschar(mpsc,ch);
@@ -177,79 +178,82 @@ mpsc_putchar_sdma(char ch)
 	return 0;
 }
 
-char
-mpsc_getchar(void)
+char mpsc_getchar (void)
 {
-    DECLARE_GLOBAL_DATA_PTR;
-    static unsigned int done = 0;
-    volatile char ch;
-    unsigned int len=0, idx=0, temp;
-
-    volatile unsigned int *p;
-
-
-    do {
-	p=&rx_desc_base[rx_desc_index*8];
-
-	INVALIDATE_DCACHE(&p[0], &p[1]);
-	/* Wait for character */
-	while (p[1] & DESC_OWNER){
-	    udelay(100);
-	    INVALIDATE_DCACHE(&p[0], &p[1]);
-	}
-
-	/* Handle error case */
-	if (p[1] & (1<<15)) {
-		printf("oops, error: %08x\n", p[1]);
-
-		temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,CHANNEL,GALMPSC_REG_GAP);
-		temp |= (1 << 23);
-		GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2, CHANNEL,GALMPSC_REG_GAP, temp);
-
-		/* Can't poll on abort bit, so we just wait. */
-		udelay(100);
+	static unsigned int done = 0;
+	volatile char ch;
+	unsigned int len = 0, idx = 0, temp;
 
-		galsdma_enable_rx();
-	}
-
-	/* Number of bytes left in this descriptor */
-	len = p[0] & 0xffff;
-
-	if (len) {
-	    /* Where to look */
-	    idx = 5;
-	    if (done > 3) idx = 4;
-	    if (done > 7) idx = 7;
-	    if (done > 11) idx = 6;
-
-	    INVALIDATE_DCACHE(&p[idx], &p[idx+1]);
-	    ch = p[idx] & 0xff;
-	    done++;
-	}
+	volatile unsigned int *p;
 
-	if (done < len) {
-		/* this descriptor has more bytes still
-		 * shift down the char we just read, and leave the
-		 * buffer in place for the next time around
-		 */
-		p[idx] =  p[idx] >> 8;
-		FLUSH_DCACHE(&p[idx], &p[idx+1]);
-	}
 
-	if (done == len) {
-		/* nothing left in this descriptor.
-		 * go to next one
-		 */
-		p[1] = DESC_OWNER | DESC_FIRST | DESC_LAST;
-		p[0] = 0x00100000;
-		FLUSH_DCACHE(&p[0], &p[1]);
-		/* Next descriptor */
-		rx_desc_index = (rx_desc_index + 1) % RX_DESC;
-		done = 0;
-	}
-    } while (len==0);	/* galileo bug.. len might be zero */
-
-    return ch;
+	do {
+		p = &rx_desc_base[rx_desc_index * 8];
+
+		INVALIDATE_DCACHE (&p[0], &p[1]);
+		/* Wait for character */
+		while (p[1] & DESC_OWNER) {
+			udelay (100);
+			INVALIDATE_DCACHE (&p[0], &p[1]);
+		}
+
+		/* Handle error case */
+		if (p[1] & (1 << 15)) {
+			printf ("oops, error: %08x\n", p[1]);
+
+			temp = GTREGREAD_MIRROR (GALMPSC_CHANNELREG_2,
+						 CHANNEL, GALMPSC_REG_GAP);
+			temp |= (1 << 23);
+			GT_REG_WRITE_MIRROR (GALMPSC_CHANNELREG_2, CHANNEL,
+					     GALMPSC_REG_GAP, temp);
+
+			/* Can't poll on abort bit, so we just wait. */
+			udelay (100);
+
+			galsdma_enable_rx ();
+		}
+
+		/* Number of bytes left in this descriptor */
+		len = p[0] & 0xffff;
+
+		if (len) {
+			/* Where to look */
+			idx = 5;
+			if (done > 3)
+				idx = 4;
+			if (done > 7)
+				idx = 7;
+			if (done > 11)
+				idx = 6;
+
+			INVALIDATE_DCACHE (&p[idx], &p[idx + 1]);
+			ch = p[idx] & 0xff;
+			done++;
+		}
+
+		if (done < len) {
+			/* this descriptor has more bytes still
+			 * shift down the char we just read, and leave the
+			 * buffer in place for the next time around
+			 */
+			p[idx] = p[idx] >> 8;
+			FLUSH_DCACHE (&p[idx], &p[idx + 1]);
+		}
+
+		if (done == len) {
+			/* nothing left in this descriptor.
+			 * go to next one
+			 */
+			p[1] = DESC_OWNER | DESC_FIRST | DESC_LAST;
+			p[0] = 0x00100000;
+			FLUSH_DCACHE (&p[0], &p[1]);
+			/* Next descriptor */
+			rx_desc_index = (rx_desc_index + 1) % RX_DESC;
+			done = 0;
+		}
+	} while (len == 0);	/* galileo bug.. len might be zero */
+
+	return ch;
 }
 
 int
@@ -266,8 +270,6 @@ mpsc_test_char(void)
 int
 mpsc_init(int baud)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	memset(MIRROR_HACK, 0, sizeof(struct _tag_mirror_hack));
 	MIRROR_HACK->GALMPSC_ROUTING_REGISTER_M=0x3fffffff;
 
@@ -382,7 +384,6 @@ mpsc_init2(void)
 int
 galbrg_set_baudrate(int channel, int rate)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	int clock;
 
 	galbrg_disable(channel);
@@ -410,7 +411,6 @@ galbrg_set_baudrate(int channel, int rate)
 static int
 galbrg_set_CDV(int channel, int value)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int temp;
 
 	temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP);
@@ -424,7 +424,6 @@ galbrg_set_CDV(int channel, int value)
 static int
 galbrg_enable(int channel)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int temp;
 
 	temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP);
@@ -437,7 +436,6 @@ galbrg_enable(int channel)
 static int
 galbrg_disable(int channel)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int temp;
 
 	temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP);
@@ -450,7 +448,6 @@ galbrg_disable(int channel)
 static int
 galbrg_set_clksrc(int channel, int value)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int temp;
 
 	temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG,channel, GALBRG_REG_GAP);
@@ -583,7 +580,6 @@ galsdma_set_burstsize(int channel, unsigned int value)
 static int
 galmpsc_connect(int channel, int connect)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int temp;
 
 	temp = GTREGREAD_MIRROR_G(GALMPSC_ROUTING_REGISTER);
@@ -629,7 +625,6 @@ galmpsc_route_serial(int channel, int connect)
 static int
 galmpsc_route_rx_clock(int channel, int brg)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int temp;
 
 	temp = GTREGREAD_MIRROR_G(GALMPSC_RxC_ROUTE);
@@ -647,7 +642,6 @@ galmpsc_route_rx_clock(int channel, int brg)
 static int
 galmpsc_route_tx_clock(int channel, int brg)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int temp;
 
 	temp = GTREGREAD_MIRROR_G(GALMPSC_TxC_ROUTE);
@@ -688,7 +682,6 @@ galmpsc_write_config_regs(int mpsc, int mode)
 static int
 galmpsc_config_channel_regs(int mpsc)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP, 0);
 	GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP, 0);
 	GT_REG_WRITE(GALMPSC_CHANNELREG_3+(mpsc*GALMPSC_REG_GAP), 1);
@@ -709,7 +702,6 @@ galmpsc_config_channel_regs(int mpsc)
 static int
 galmpsc_set_brkcnt(int mpsc, int value)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int temp;
 
 	temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP);
@@ -723,7 +715,6 @@ galmpsc_set_brkcnt(int mpsc, int value)
 static int
 galmpsc_set_tcschar(int mpsc, int value)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int temp;
 
 	temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP);
@@ -737,7 +728,6 @@ galmpsc_set_tcschar(int mpsc, int value)
 static int
 galmpsc_set_char_length(int mpsc, int value)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int temp;
 
 	temp = GTREGREAD_MIRROR(GALMPSC_PROTOCONF_REG,mpsc,GALMPSC_REG_GAP);
@@ -751,7 +741,6 @@ galmpsc_set_char_length(int mpsc, int value)
 static int
 galmpsc_set_stop_bit_length(int mpsc, int value)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int temp;
 
 	temp = GTREGREAD_MIRROR(GALMPSC_PROTOCONF_REG,mpsc,GALMPSC_REG_GAP);
@@ -764,7 +753,6 @@ galmpsc_set_stop_bit_length(int mpsc, int value)
 static int
 galmpsc_set_parity(int mpsc, int value)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int temp;
 
 	temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
@@ -784,7 +772,6 @@ galmpsc_set_parity(int mpsc, int value)
 static int
 galmpsc_enter_hunt(int mpsc)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	int temp;
 
 	temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
@@ -802,7 +789,6 @@ galmpsc_enter_hunt(int mpsc)
 static int
 galmpsc_shutdown(int mpsc)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 #if 0
 	unsigned int temp;
 
diff --git a/board/evb64260/sdram_init.c b/board/evb64260/sdram_init.c
index 8d63c6f..fae6d10 100644
--- a/board/evb64260/sdram_init.c
+++ b/board/evb64260/sdram_init.c
@@ -35,6 +35,8 @@
 #include "i2c.h"
 #include "64260.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* #define	DEBUG */
 #define	MAP_PCI
 
@@ -199,7 +201,6 @@ static int check_dimm (uchar slot, sdram_info_t * info)
  * the array which is passed in with the relevant information */
 static int check_dimm (uchar slot, sdram_info_t * info)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR;
 	int ret;
 	uchar rows, cols, sdram_banks, supp_cal, width, cal_val;
diff --git a/board/evb64260/serial.c b/board/evb64260/serial.c
index d9c7a15..191445c 100644
--- a/board/evb64260/serial.c
+++ b/board/evb64260/serial.c
@@ -39,6 +39,8 @@
 
 #include "mpsc.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
 const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1,
 				(NS16550_t) CFG_NS16550_COM2 };
@@ -48,8 +50,6 @@ const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1,
 
 int serial_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 #if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
 	int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
 #endif
@@ -90,8 +90,6 @@ serial_tstc(void)
 void
 serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	galbrg_set_baudrate(CONFIG_MPSC_PORT, gd->baudrate);
 }
 
@@ -99,8 +97,6 @@ serial_setbrg (void)
 
 int serial_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
 
 #ifdef CFG_INIT_CHAN1
@@ -137,8 +133,6 @@ serial_tstc(void)
 void
 serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
 
 #ifdef CFG_INIT_CHAN1
diff --git a/board/ezkit533/ezkit533.c b/board/ezkit533/ezkit533.c
index f8ee900..8d6c8de 100644
--- a/board/ezkit533/ezkit533.c
+++ b/board/ezkit533/ezkit533.c
@@ -30,6 +30,8 @@
 #include "psd4256.h"
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int checkboard(void)
 {
 	printf("CPU:   ADSP BF533 Rev.: 0.%d\n", *pCHIPID >> 28);
@@ -41,7 +43,6 @@ int checkboard(void)
 
 long int initdram(int board_type)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 #ifdef DEBUG
 	int brate;
 	char *tmp = getenv("baudrate");
diff --git a/board/gcplus/gcplus.c b/board/gcplus/gcplus.c
index 261e894..829b597 100644
--- a/board/gcplus/gcplus.c
+++ b/board/gcplus/gcplus.c
@@ -26,7 +26,8 @@
 
 #include <common.h>
 #include <SA-1100.h>
-/* ------------------------------------------------------------------------- */
+
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -35,8 +36,6 @@
 int
 board_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_arch_number = MACH_TYPE_GRAPHICSCLIENT;
 
 	gd->bd->bi_boot_params = 0xc000003c; /* Weird address? */
@@ -62,8 +61,6 @@ board_init(void)
 int
 dram_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
diff --git a/board/gen860t/fpga.c b/board/gen860t/fpga.c
index 37788d5..2ba7e0e 100644
--- a/board/gen860t/fpga.c
+++ b/board/gen860t/fpga.c
@@ -32,6 +32,8 @@
 #include <command.h>
 #include "fpga.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #if (CONFIG_FPGA)
 
 #if 0
@@ -189,8 +191,6 @@ void fpga_selectmap_init (void)
  */
 int gen860t_init_fpga (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int i;
 
 	PRINTF ("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n", __FUNCTION__, __LINE__, gd->reloc_off);
diff --git a/board/gen860t/gen860t.c b/board/gen860t/gen860t.c
index b7a1b56..eb73221 100644
--- a/board/gen860t/gen860t.c
+++ b/board/gen860t/gen860t.c
@@ -30,6 +30,8 @@
 #include "fpga.h"
 #include "ioport.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_STATUS_LED
 #include <status_led.h>
 #endif
@@ -126,8 +128,6 @@ const uint selectmap_upm_table[] = {
  */
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	char *s;
 	char buf[64];
 	int i;
@@ -305,5 +305,3 @@ int post_hotkeys_pressed (void)
 	return 0;		/* No hotkeys supported */
 }
 #endif
-
-/* vim: set ts=4 sw=4 tw=78 : */
diff --git a/board/hermes/hermes.c b/board/hermes/hermes.c
index e95d9ee..a523db1 100644
--- a/board/hermes/hermes.c
+++ b/board/hermes/hermes.c
@@ -32,6 +32,8 @@
 # define SHOW_BOOT_PROGRESS(arg)
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 static long int dram_size (long int, long int *, long int);
@@ -105,8 +107,6 @@ const uint sdram_table[] = {
 
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	char *s = getenv ("serial#");
 	char *e;
 
diff --git a/board/hymod/bsp.c b/board/hymod/bsp.c
index 0596fa4..6868f26 100644
--- a/board/hymod/bsp.c
+++ b/board/hymod/bsp.c
@@ -28,6 +28,8 @@
 #include <net.h>
 #include <asm/iopin_8260.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*-----------------------------------------------------------------------
  * Board Special Commands: FPGA load/store, EEPROM erase
  */
@@ -75,8 +77,6 @@
 int
 fpga_load (int mezz, uchar *addr, ulong size)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
 	xlx_info_t *fp;
 	xlx_iopins_t *fpgaio;
diff --git a/board/hymod/env.c b/board/hymod/env.c
index f9e1421..062553b 100644
--- a/board/hymod/env.c
+++ b/board/hymod/env.c
@@ -23,6 +23,8 @@
 
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* imports from fetch.c */
 extern int fetch_and_parse (char *, ulong, int (*)(uchar *, uchar *));
 
@@ -32,8 +34,6 @@ static char *def_global_env_path = "/hymod/global_env";
 static int
 env_callback (uchar *name, uchar *value)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
 	char ov[CFG_CBSIZE], nv[CFG_CBSIZE], *p, *q, *nn, c, *curver, *newver;
 	int override = 1, append = 0, remove = 0, nnl, ovl, nvl;
diff --git a/board/hymod/hymod.c b/board/hymod/hymod.c
index dea0a70..5e98e9e 100644
--- a/board/hymod/hymod.c
+++ b/board/hymod/hymod.c
@@ -30,6 +30,8 @@
 #include <i2c.h>
 #include <asm/iopin_8260.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 /* imports from eeprom.c */
@@ -424,8 +426,6 @@ initdram (int board_type)
 int
 last_stage_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
 	int rc;
 
diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c
index 44831c6..4f056b2 100644
--- a/board/icecube/icecube.c
+++ b/board/icecube/icecube.c
@@ -27,6 +27,7 @@
 #include <common.h>
 #include <mpc5xxx.h>
 #include <pci.h>
+#include <asm/processor.h>
 
 #if defined(CONFIG_LITE5200B)
 #include "mt46v32m16.h"
@@ -89,6 +90,8 @@ long int initdram (int board_type)
 {
 	ulong dramsize = 0;
 	ulong dramsize2 = 0;
+	uint svr, pvr;
+
 #ifndef CFG_RAMBOOT
 	ulong test1, test2;
 
@@ -183,6 +186,24 @@ long int initdram (int board_type)
 
 #endif /* CFG_RAMBOOT */
 
+	/*
+	 * On MPC5200B we need to set the special configuration delay in the
+	 * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM
+	 * Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190:
+	 *
+	 * "The SDelay should be written to a value of 0x00000004. It is
+	 * required to account for changes caused by normal wafer processing
+	 * parameters."
+	 */
+	svr = get_svr();
+	pvr = get_pvr();
+	if ((SVR_MJREV(svr) >= 2) &&
+	    (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) {
+
+		*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
+		__asm__ volatile ("sync");
+	}
+
 	return dramsize + dramsize2;
 }
 
diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c
index 081ef65..7b9a83d 100644
--- a/board/ids8247/ids8247.c
+++ b/board/ids8247/ids8247.c
@@ -25,6 +25,8 @@
 #include <ioports.h>
 #include <mpc8260.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*
  * I/O Port configuration table
  *
@@ -295,8 +297,6 @@ long int initdram (int board_type)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_flashstart = 0xff800000;
 }
 
diff --git a/board/impa7/impa7.c b/board/impa7/impa7.c
index e496923..3230dd4 100644
--- a/board/impa7/impa7.c
+++ b/board/impa7/impa7.c
@@ -25,6 +25,8 @@
 #include <common.h>
 #include <clps7111.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 
@@ -34,8 +36,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* Activate LED flasher */
 	IO_LEDFLSH = 0x40;
 
@@ -50,8 +50,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
diff --git a/board/innokom/innokom.c b/board/innokom/innokom.c
index ae5402e..7f8f47c 100644
--- a/board/innokom/innokom.c
+++ b/board/innokom/innokom.c
@@ -27,6 +27,8 @@
 #include <asm/arch/pxa-regs.h>
 #include <asm/mach-types.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_SHOW_BOOT_PROGRESS
 # define SHOW_BOOT_PROGRESS(arg)        show_boot_progress(arg)
 #else
@@ -95,8 +97,6 @@ int misc_init_r(void)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -116,8 +116,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/integratorap/integratorap.c b/board/integratorap/integratorap.c
index d4f61d6..e659907 100644
--- a/board/integratorap/integratorap.c
+++ b/board/integratorap/integratorap.c
@@ -39,6 +39,8 @@
 #include <pci.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 void flash__init (void);
 void ether__init (void);
 void peripheral_power_enable (void);
@@ -65,8 +67,6 @@ static inline void delay (unsigned long loops)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* arch number of Integrator Board */
 	gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR;
 
@@ -480,8 +480,6 @@ void ether__init (void)
 ******************************/
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size	 = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/integratorcp/integratorcp.c b/board/integratorcp/integratorcp.c
index 216876b..d6d6e13 100644
--- a/board/integratorcp/integratorcp.c
+++ b/board/integratorcp/integratorcp.c
@@ -35,6 +35,8 @@
 
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 void flash__init (void);
 void ether__init (void);
 void peripheral_power_enable (void);
@@ -54,8 +56,6 @@ void show_boot_progress(int progress)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* arch number of Integrator Board */
 	gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
 
@@ -105,8 +105,6 @@ void ether__init (void)
 ******************************/
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size	 = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/ixdp425/ixdp425.c b/board/ixdp425/ixdp425.c
index c04626a..aa96591 100644
--- a/board/ixdp425/ixdp425.c
+++ b/board/ixdp425/ixdp425.c
@@ -28,11 +28,7 @@
 #include <asm/arch/ixp425.h>
 #include <common.h>
 
-/* ------------------------------------------------------------------------- */
-
-
-/* local prototypes */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -49,8 +45,6 @@ int board_post_init (void)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* arch number of IXDP */
 	gd->bd->bi_arch_number = MACH_TYPE_IXDP425;
 
@@ -64,8 +58,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/kb9202/kb9202.c b/board/kb9202/kb9202.c
index 4a7cf77..ec51dca 100644
--- a/board/kb9202/kb9202.c
+++ b/board/kb9202/kb9202.c
@@ -31,7 +31,8 @@
 #include <at91rm9200_net.h>
 #include <lxt971a.h>
 
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
+
 /*
  * Miscelaneous platform dependent initialisations
  */
@@ -42,8 +43,6 @@ void lowlevel_init(void) {
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* Enable Ctrlc */
 	console_init_f ();
 
@@ -60,8 +59,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
 	return 0;
diff --git a/board/kup/kup4k/kup4k.c b/board/kup/kup4k/kup4k.c
index e621c43..4e377a1 100644
--- a/board/kup/kup4k/kup4k.c
+++ b/board/kup/kup4k/kup4k.c
@@ -29,6 +29,8 @@
    #include "s1d13706.h"
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #undef DEBUG
 #ifdef  DEBUG
 # define debugk(fmt,args...)    printf(fmt ,##args)
@@ -44,10 +46,6 @@ typedef struct {
 
 /* ------------------------------------------------------------------------- */
 
-#if 0
-static long int dram_size (long int, long int *, long int);
-#endif
-
 #ifdef CONFIG_KUP4K_LOGO
 void lcd_logo(bd_t *bd);
 #endif
@@ -235,62 +233,8 @@ long int initdram (int board_type)
 
 /* ------------------------------------------------------------------------- */
 
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-#if 0
-static long int dram_size (long int mamr_value, long int *base,
-						   long int maxsize)
-{
-	volatile immap_t *immap = (immap_t *) CFG_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	volatile long int *addr;
-	ulong cnt, val;
-	ulong save[32];				/* to make test non-destructive */
-	unsigned char i = 0;
-
-	memctl->memc_mamr = mamr_value;
-
-	for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
-		addr = base + cnt;		/* pointer arith! */
-
-		save[i++] = *addr;
-		*addr = ~cnt;
-	}
-
-	/* write 0 to base address */
-	addr = base;
-	save[i] = *addr;
-	*addr = 0;
-
-	/* check at base address */
-	if ((val = *addr) != 0) {
-		*addr = save[i];
-		return (0);
-	}
-
-	for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
-		addr = base + cnt;		/* pointer arith! */
-
-		val = *addr;
-		*addr = save[--i];
-
-		if (val != (~cnt)) {
-			return (cnt * sizeof (long));
-		}
-	}
-	return (maxsize);
-}
-#endif
-
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 #ifdef CONFIG_STATUS_LED
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
 #endif
diff --git a/board/lart/lart.c b/board/lart/lart.c
index 66b730d..8d534c8 100644
--- a/board/lart/lart.c
+++ b/board/lart/lart.c
@@ -24,6 +24,8 @@
 
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 
@@ -33,8 +35,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -49,7 +49,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	bd_t *bd = gd->bd;
 
 	bd->bi_dram[0].start = PHYS_SDRAM_1;
diff --git a/board/logodl/logodl.c b/board/logodl/logodl.c
index 95634ac..14fd28f 100644
--- a/board/logodl/logodl.c
+++ b/board/logodl/logodl.c
@@ -25,6 +25,8 @@
 #include <common.h>
 #include <asm/arch/pxa-regs.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /**
  * board_init: - setup some data structures
  *
@@ -33,8 +35,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -57,8 +57,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/lpd7a40x/lpd7a40x.c b/board/lpd7a40x/lpd7a40x.c
index 4c373ee..e12bbf0 100644
--- a/board/lpd7a40x/lpd7a40x.c
+++ b/board/lpd7a40x/lpd7a40x.c
@@ -37,14 +37,14 @@
 
 #include <lpd7a400_cpld.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*
  * Miscellaneous platform dependent initialisations
  */
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* set up the I/O ports */
 
 	/* enable flash programming */
@@ -74,8 +74,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/lubbock/lubbock.c b/board/lubbock/lubbock.c
index e618ab9..5829170 100644
--- a/board/lubbock/lubbock.c
+++ b/board/lubbock/lubbock.c
@@ -27,8 +27,7 @@
 
 #include <common.h>
 
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -36,8 +35,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -60,8 +57,6 @@ int board_late_init(void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
diff --git a/board/lwmon/lwmon.c b/board/lwmon/lwmon.c
index a174b57..9e8ea2d 100644
--- a/board/lwmon/lwmon.c
+++ b/board/lwmon/lwmon.c
@@ -45,6 +45,8 @@ V* Verification:  dzu@denx.de
 #include <linux/types.h>
 #include <linux/string.h>	/* for strdup */
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*------------------------ Local prototypes ---------------------------*/
 static long int dram_size (long int, long int *, long int);
 static void kbd_init (void);
@@ -455,8 +457,6 @@ Z*               for the lwmon board.
  ***********************************************************************/
 int board_postclk_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	kbd_init();
 
 #ifdef CONFIG_MODEM_SUPPORT
@@ -471,15 +471,11 @@ int board_postclk_init (void)
 
 struct serial_device * default_serial_console (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	return gd->do_mdm_init ? &serial_scc_device : &serial_smc_device;
 }
 
 static void kbd_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	uchar kbd_data[KEYBD_DATALEN];
 	uchar tmp_data[KEYBD_DATALEN];
 	uchar val, errcd;
@@ -571,8 +567,6 @@ V* Verification: dzu@denx.de
  ***********************************************************************/
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	uchar kbd_data[KEYBD_DATALEN];
 	char keybd_env[2 * KEYBD_DATALEN + 1];
 	uchar kbd_init_status = gd->kbd_status >> 8;
diff --git a/board/mcc200/mcc200.c b/board/mcc200/mcc200.c
index d1c99fd..5fe239f 100644
--- a/board/mcc200/mcc200.c
+++ b/board/mcc200/mcc200.c
@@ -30,6 +30,8 @@
 
 #include "mt48lc8m32b2-6-7.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 extern flash_info_t flash_info[];	/* FLASH chips info */
 
 ulong flash_get_size (ulong base, int banknum);
@@ -190,8 +192,6 @@ int checkboard (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/*
 	 * Adjust flash start and offset to detected values
 	 */
@@ -238,6 +238,16 @@ int misc_init_r (void)
 			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);
 	}
 
+	if (gd->bd->bi_flashsize > (32 << 20)) {
+		/* Unprotect the upper bank of the Flash */
+		*(volatile int*)MPC5XXX_CS0_CFG |= (1 << 6);
+		flash_protect (FLAG_PROTECT_CLEAR,
+			       flash_info[0].start[0],
+			       (flash_info[0].start[0] + flash_info[0].size) / 2 - 1,
+			       &flash_info[0]);
+		*(volatile int*)MPC5XXX_CS0_CFG &= ~(1 << 6);
+	}
+
 	return (0);
 }
 
diff --git a/board/ml2/serial.c b/board/ml2/serial.c
index 92baba9..74687f1 100644
--- a/board/ml2/serial.c
+++ b/board/ml2/serial.c
@@ -29,70 +29,59 @@
 #include <ns16550.h>
 #endif
 
-#if 0
-#include "serial.h"
-#endif
+DECLARE_GLOBAL_DATA_PTR;
 
 #if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
 const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1,
-				(NS16550_t) CFG_NS16550_COM2 };
+	(NS16550_t) CFG_NS16550_COM2
+};
 #endif
 
-int
-serial_init (void)
+int serial_init (void)
 {
-		DECLARE_GLOBAL_DATA_PTR;
-
-	    int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
+	int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
 
 #ifdef CFG_INIT_CHAN1
-	    (void)NS16550_init(COM_PORTS[0], clock_divisor);
+	(void) NS16550_init (COM_PORTS[0], clock_divisor);
 #endif
 #ifdef CFG_INIT_CHAN2
-	    (void)NS16550_init(COM_PORTS[1], clock_divisor);
+	(void) NS16550_init (COM_PORTS[1], clock_divisor);
 #endif
-		return 0;
+	return 0;
 
 }
 
-void
-serial_putc(const char c)
+void serial_putc (const char c)
 {
-    if (c == '\n')
-	NS16550_putc(COM_PORTS[CFG_DUART_CHAN], '\r');
+	if (c == '\n')
+		NS16550_putc (COM_PORTS[CFG_DUART_CHAN], '\r');
 
-    NS16550_putc(COM_PORTS[CFG_DUART_CHAN], c);
+	NS16550_putc (COM_PORTS[CFG_DUART_CHAN], c);
 }
 
-int
-serial_getc(void)
+int serial_getc (void)
 {
-    return NS16550_getc(COM_PORTS[CFG_DUART_CHAN]);
+	return NS16550_getc (COM_PORTS[CFG_DUART_CHAN]);
 }
 
-int
-serial_tstc(void)
+int serial_tstc (void)
 {
-    return NS16550_tstc(COM_PORTS[CFG_DUART_CHAN]);
+	return NS16550_tstc (COM_PORTS[CFG_DUART_CHAN]);
 }
 
-void
-serial_setbrg (void)
+void serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
-    int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
+	int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
 
 #ifdef CFG_INIT_CHAN1
-    NS16550_reinit(COM_PORTS[0], clock_divisor);
+	NS16550_reinit (COM_PORTS[0], clock_divisor);
 #endif
 #ifdef CFG_INIT_CHAN2
-    NS16550_reinit(COM_PORTS[1], clock_divisor);
+	NS16550_reinit (COM_PORTS[1], clock_divisor);
 #endif
 }
 
-void
-serial_puts (const char *s)
+void serial_puts (const char *s)
 {
 	while (*s) {
 		serial_putc (*s++);
@@ -100,32 +89,27 @@ serial_puts (const char *s)
 }
 
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-void
-kgdb_serial_init(void)
+void kgdb_serial_init (void)
 {
 }
 
-void
-putDebugChar (int c)
+void putDebugChar (int c)
 {
 	serial_putc (c);
 }
 
-void
-putDebugStr (const char *str)
+void putDebugStr (const char *str)
 {
 	serial_puts (str);
 }
 
-int
-getDebugChar (void)
+int getDebugChar (void)
 {
-	return serial_getc();
+	return serial_getc ();
 }
 
-void
-kgdb_interruptible (int yes)
+void kgdb_interruptible (int yes)
 {
 	return;
 }
-#endif	/* CFG_CMD_KGDB	*/
+#endif /* CFG_CMD_KGDB */
diff --git a/board/modnet50/modnet50.c b/board/modnet50/modnet50.c
index 448c623..4544069 100644
--- a/board/modnet50/modnet50.c
+++ b/board/modnet50/modnet50.c
@@ -24,8 +24,7 @@
 
 #include <common.h>
 
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -33,7 +32,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	/* address for the kernel command line */
 	gd->bd->bi_boot_params = 0x800;
 	return 0;
@@ -41,7 +39,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	if (CONFIG_NR_DRAM_BANKS == 2) {
diff --git a/board/mp2usb/mp2usb.c b/board/mp2usb/mp2usb.c
index e75be1e..486d44c 100644
--- a/board/mp2usb/mp2usb.c
+++ b/board/mp2usb/mp2usb.c
@@ -31,15 +31,14 @@
 #include <dm9161.h>
 #include <asm/mach-types.h>
 
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
+
 /*
  * Miscelaneous platform dependent initialisations
  */
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* Enable Ctrlc */
 	console_init_f ();
 
@@ -56,8 +55,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
 	return 0;
diff --git a/board/mpc8349ads/mpc8349ads.c b/board/mpc8349ads/mpc8349ads.c
index 505acbc..9841298 100644
--- a/board/mpc8349ads/mpc8349ads.c
+++ b/board/mpc8349ads/mpc8349ads.c
@@ -64,7 +64,7 @@ long int initdram (int board_type)
 	/* DDR SDRAM - Main SODIMM */
 	im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
 #if defined(CONFIG_SPD_EEPROM)
-	msize = spd_sdram(NULL);
+	msize = spd_sdram();
 #else
 	msize = fixed_sdram();
 #endif
diff --git a/board/mpc8349ads/pci.c b/board/mpc8349ads/pci.c
index c559424..319e35c 100644
--- a/board/mpc8349ads/pci.c
+++ b/board/mpc8349ads/pci.c
@@ -26,6 +26,8 @@
 #include <asm/mpc8349_pci.h>
 #include <i2c.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_PCI
 
 /* System RAM mapped to PCI space */
@@ -127,7 +129,6 @@ pib_init(void)
 void
 pci_init_board(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	volatile immap_t *	immr;
 	volatile clk8349_t *	clk;
 	volatile law8349_t *	pci_law;
diff --git a/board/mpc8349emds/mpc8349emds.c b/board/mpc8349emds/mpc8349emds.c
index 73a33f6..7ece7db 100644
--- a/board/mpc8349emds/mpc8349emds.c
+++ b/board/mpc8349emds/mpc8349emds.c
@@ -116,14 +116,14 @@ int fixed_sdram(void)
 	im->ddr.csbnds[2].csbnds = 0x0000000f;
 	im->ddr.cs_config[2] = CFG_DDR_CONFIG;
 
-	/* currently we use only one CS, so disable the other banks */ 
+	/* currently we use only one CS, so disable the other banks */
 	im->ddr.cs_config[0] = 0;
 	im->ddr.cs_config[1] = 0;
 	im->ddr.cs_config[3] = 0;
 
 	im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
 	im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
-	
+
 	im->ddr.sdram_cfg =
 		SDRAM_CFG_SREN
 #if defined(CONFIG_DDR_2T_TIMING)
@@ -136,7 +136,7 @@ int fixed_sdram(void)
 #endif
 	im->ddr.sdram_mode = CFG_DDR_MODE;
 
-	im->ddr.sdram_interval = CFG_DDR_INTERVAL; 
+	im->ddr.sdram_interval = CFG_DDR_INTERVAL;
 	udelay(200);
 
 	/* enable DDR controller */
@@ -361,12 +361,12 @@ int do_ecc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	volatile u32 val;
 	u64 *addr, count, val64;
 	register u64 *i;
-	
+
 	if (argc > 4) {
 		printf ("Usage:\n%s\n", cmdtp->usage);
 		return 1;
 	}
-	
+
 	if (argc == 2) {
 		if (strcmp(argv[1], "status") == 0) {
 			ecc_print_status();
@@ -379,8 +379,8 @@ int do_ecc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			ddr->capture_attributes = 0;
 			return 0;
 		}
-	} 
-	
+	}
+
 	if (argc == 3) {
 		if (strcmp(argv[1], "sbecnt") == 0) {
 			val = simple_strtoul(argv[2], NULL, 10);
@@ -416,8 +416,8 @@ int do_ecc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			} else if (strcmp(argv[2], "+mse") == 0) {
 				val |= ECC_ERROR_DISABLE_MSED;
 			} else if (strcmp(argv[2], "+all") == 0) {
-				val |= (ECC_ERROR_DISABLE_SBED | 
-					ECC_ERROR_DISABLE_MBED | 
+				val |= (ECC_ERROR_DISABLE_SBED |
+					ECC_ERROR_DISABLE_MBED |
 					ECC_ERROR_DISABLE_MSED);
 			} else if (strcmp(argv[2], "-sbe") == 0) {
 				val &= ~ECC_ERROR_DISABLE_SBED;
@@ -426,8 +426,8 @@ int do_ecc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			} else if (strcmp(argv[2], "-mse") == 0) {
 				val &= ~ECC_ERROR_DISABLE_MSED;
 			} else if (strcmp(argv[2], "-all") == 0) {
-				val &= ~(ECC_ERROR_DISABLE_SBED | 
-					ECC_ERROR_DISABLE_MBED | 
+				val &= ~(ECC_ERROR_DISABLE_SBED |
+					ECC_ERROR_DISABLE_MBED |
 					ECC_ERROR_DISABLE_MSED);
 			} else {
 				printf("Incorrect err_disable field\n");
diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c
index b331d6e..06d021a 100644
--- a/board/mpl/common/common_util.c
+++ b/board/mpl/common/common_util.c
@@ -42,6 +42,9 @@
 #include "../mip405/mip405.h"
 #include <405gp_pci.h>
 #endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
 #if defined(CONFIG_PATI)
 #define FIRM_START 0xFFF00000
 #endif
@@ -584,7 +587,6 @@ extern int get_boot_mode(void);
 void video_get_info_str (int line_number, char *info)
 {
 	/* init video info strings for graphic console */
-	DECLARE_GLOBAL_DATA_PTR;
 	PPC405_SYS_INFO sys_info;
 	char rev;
 	int i,boot;
diff --git a/board/mpl/common/memtst.c b/board/mpl/common/memtst.c
index 2c77d37..ff1190a 100644
--- a/board/mpl/common/memtst.c
+++ b/board/mpl/common/memtst.c
@@ -50,13 +50,15 @@ int testdram (void)
 #include <asm/processor.h>
 #include <405gp_i2c.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define FALSE           0
 #define TRUE            1
 
-#define TEST_QUIET 			8
+#define TEST_QUIET 	8
 #define TEST_SHOW_PROG 	4
 #define TEST_SHOW_ERR 	2
-#define TEST_SHOW_ALL		1
+#define TEST_SHOW_ALL	1
 
 #define TESTPAT1 0xAA55AA55
 #define TESTPAT2 0x55AA55AA
@@ -468,7 +470,6 @@ static RAM_MEMTEST_FUNC test_stage[TEST_STAGES] = {
 
 void mem_test_reloc(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned long addr;
 	int i;
 	for (i=0; i< TEST_STAGES; i++) {
diff --git a/board/mpl/common/pci.c b/board/mpl/common/pci.c
index 692930b..bde14be 100644
--- a/board/mpl/common/pci.c
+++ b/board/mpl/common/pci.c
@@ -32,7 +32,7 @@
 #ifdef CONFIG_405GP
 #ifdef CONFIG_PCI
 
-#undef DEBUG
+DECLARE_GLOBAL_DATA_PTR;
 
 #include "piix4_pci.h"
 #include "pci_parts.h"
@@ -94,7 +94,6 @@ static struct pci_controller hose = {
 
 static void reloc_pci_cfg_table(struct pci_config_table *table)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned long addr;
 
 	for (; table && table->vendor; table++) {
diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c
index 9c469b0..34f3289 100644
--- a/board/mpl/mip405/mip405.c
+++ b/board/mpl/mip405/mip405.c
@@ -70,6 +70,9 @@
 #include "../common/common_util.h"
 #include <i2c.h>
 #include <rtc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
 extern block_dev_desc_t * scsi_get_dev(int dev);
 extern block_dev_desc_t * ide_get_dev(int dev);
 
@@ -189,8 +192,6 @@ const sdram_t sdram_table[] = {
 void SDRAM_err (const char *s)
 {
 #ifndef SDRAM_DEBUG
-	DECLARE_GLOBAL_DATA_PTR;
-
 	(void) get_clocks ();
 	gd->baudrate = 9600;
 	serial_init ();
@@ -241,8 +242,6 @@ void write_4hex (unsigned long val)
 
 int init_sdram (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	unsigned long	tmp, baseaddr;
 	unsigned short	i;
 	unsigned char	trp_clocks,
@@ -681,7 +680,6 @@ extern flash_info_t flash_info[];	/* info for FLASH chips */
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	/* adjust flash start and size as well as the offset */
 	gd->bd->bi_flashstart=0-flash_info[0].size;
 	gd->bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN;
diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c
index a398362..3828608 100644
--- a/board/mpl/pip405/pip405.c
+++ b/board/mpl/pip405/pip405.c
@@ -31,6 +31,8 @@
 #include "../common/isa.h"
 #include "../common/common_util.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #undef SDRAM_DEBUG
 
 #define FALSE           0
@@ -134,8 +136,6 @@ unsigned short NSto10PS (unsigned char spd_byte)
 void SDRAM_err (const char *s)
 {
 #ifndef SDRAM_DEBUG
-	DECLARE_GLOBAL_DATA_PTR;
-
 	(void) get_clocks ();
 	gd->baudrate = 9600;
 	serial_init ();
@@ -191,9 +191,6 @@ int board_early_init_f (void)
 			trc_clocks, tctp_clocks;
 	unsigned char cal_index, cal_val, spd_version, spd_chksum;
 	unsigned char buf[8];
-#ifdef SDRAM_DEBUG
-	DECLARE_GLOBAL_DATA_PTR;
-#endif
 	/* set up the config port */
 	mtdcr (ebccfga, pb7ap);
 	mtdcr (ebccfgd, CONFIG_PORT_AP);
@@ -613,8 +610,6 @@ static int test_dram (unsigned long ramsize);
 
 long int initdram (int board_type)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	unsigned long bank_reg[4], tmp, bank_size;
 	int i, ds;
 	unsigned long TotalSize;
@@ -666,7 +661,6 @@ extern flash_info_t flash_info[];	/* info for FLASH chips */
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	/* adjust flash start and size as well as the offset */
 	gd->bd->bi_flashstart=0-flash_info[0].size;
 	gd->bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN;
diff --git a/board/mpl/vcma9/vcma9.c b/board/mpl/vcma9/vcma9.c
index ffdba5d..0d2003d 100644
--- a/board/mpl/vcma9/vcma9.c
+++ b/board/mpl/vcma9/vcma9.c
@@ -32,7 +32,7 @@
 #include "vcma9.h"
 #include "../common/common_util.h"
 
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
 
 #define FCLK_SPEED 1
 
@@ -71,7 +71,6 @@ static inline void delay(unsigned long loops)
 
 int board_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
 	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
 
@@ -275,8 +274,6 @@ static void Show_VCMA9_Info(char *board_name, char *serial)
 
 int dram_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = Get_SDRAM_ChipSize() * Get_SDRAM_ChipNr();
 
diff --git a/board/mvblue/mvblue.c b/board/mvblue/mvblue.c
index 20a551d..ee8f3e3 100644
--- a/board/mvblue/mvblue.c
+++ b/board/mvblue/mvblue.c
@@ -14,6 +14,8 @@
 #include <pci.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 u32 get_BoardType (void);
 
 #define PCI_CONFIG(b,d,f,r)    cpu_to_le32(0x80000000 | ((b&0xff)<<16) \
@@ -50,7 +52,6 @@ void hw_watchdog_reset (void)
 }
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	ulong busfreq = get_bus_freq (0);
 	char buf[32];
 	u32 BoardType = get_BoardType ();
diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c
index 5c33ba3..abf2fd5 100644
--- a/board/mx1ads/mx1ads.c
+++ b/board/mx1ads/mx1ads.c
@@ -27,7 +27,7 @@
 /*#include <mc9328.h>*/
 #include <asm/arch/imx-regs.h>
 
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
 
 #define FCLK_SPEED 1
 
@@ -55,10 +55,11 @@
 
 #if 0
 
-static inline void delay (unsigned long loops) {
+static inline void delay (unsigned long loops)
+{
 	__asm__ volatile ("1:\n"
-	  "subs %0, %1, #1\n"
-	  "bne 1b":"=r" (loops):"0" (loops));
+			  "subs %0, %1, #1\n"
+			  "bne 1b":"=r" (loops):"0" (loops));
 }
 
 #endif
@@ -67,62 +68,58 @@ static inline void delay (unsigned long loops) {
  * Miscellaneous platform dependent initialisations
  */
 
-void SetAsynchMode(void) {
-	__asm__ (
-		"mrc p15,0,r0,c1,c0,0 \n"
-		"mov r2, #0xC0000000 \n"
-		"orr r0,r2,r0 \n"
-		"mcr p15,0,r0,c1,c0,0 \n"
-	);
+void SetAsynchMode (void)
+{
+	__asm__ ("mrc p15,0,r0,c1,c0,0 \n"
+		 "mov r2, #0xC0000000 \n"
+		 "orr r0,r2,r0 \n" "mcr p15,0,r0,c1,c0,0 \n");
 }
 
 static u32 mc9328sid;
 
-int board_init (void) {
+int board_init (void)
+{
+	volatile unsigned int tmp;
 
-	DECLARE_GLOBAL_DATA_PTR;
+	mc9328sid = SIDR;
 
-	volatile unsigned int  tmp;
+	GPCR = 0x000003AB;	/* I/O pad driving strength     */
 
-	mc9328sid	= SIDR;
-
-	GPCR 		= 0x000003AB;		/* I/O pad driving strength 	*/
-
-/*	MX1_CS1U 	= 0x00000A00;	*/	/* SRAM initialization 		*/
+	/*	MX1_CS1U 	= 0x00000A00;	*/ /* SRAM initialization          */
 /*	MX1_CS1L 	= 0x11110601; 	*/
 
-	MPCTL0 		= 0x04632410;	/* setting for 150 MHz MCU PLL CLK	*/
+	MPCTL0 = 0x04632410;	/* setting for 150 MHz MCU PLL CLK      */
 
 /* set FCLK divider 1 (i.e. FCLK to MCU PLL CLK) and
  * BCLK divider to 2 (i.e. BCLK to 48 MHz)
  */
-	CSCR 	= 0xAF000403;
+	CSCR = 0xAF000403;
 
-	CSCR 	|= 0x00200000;   	/* Trigger the restart bit(bit 21)	*/
-	CSCR 	&= 0xFFFF7FFF;		/* Program PRESC bit(bit 15) to 0 to divide-by-1 */
+	CSCR |= 0x00200000;	/* Trigger the restart bit(bit 21)      */
+	CSCR &= 0xFFFF7FFF;	/* Program PRESC bit(bit 15) to 0 to divide-by-1 */
 
 /* setup cs4 for cs8900 ethernet */
 
-	CS4U	= 0x00000F00;	/* Initialize CS4 for CS8900 ethernet 	*/
-	CS4L	= 0x00001501;
+	CS4U = 0x00000F00;	/* Initialize CS4 for CS8900 ethernet   */
+	CS4L = 0x00001501;
 
-	GIUS(0)	&= 0xFF3FFFFF;
-	GPR(0)	&= 0xFF3FFFFF;
+	GIUS (0) &= 0xFF3FFFFF;
+	GPR (0) &= 0xFF3FFFFF;
 
-	tmp = *(unsigned int *)(0x1500000C);
-	tmp = *(unsigned int *)(0x1500000C);
+	tmp = *(unsigned int *) (0x1500000C);
+	tmp = *(unsigned int *) (0x1500000C);
 
-	SetAsynchMode();
+	SetAsynchMode ();
 
 	gd->bd->bi_arch_number = MACH_TYPE_MX1ADS;
 
-	gd->bd->bi_boot_params = 0x08000100;	/* adress of boot parameters	*/
+	gd->bd->bi_boot_params = 0x08000100;	/* adress of boot parameters    */
 
-	icache_enable();
-	dcache_enable();
+	icache_enable ();
+	dcache_enable ();
 
 /* set PERCLKs				*/
-	PCDR = 0x00000055;     	/* set PERCLKS				*/
+	PCDR = 0x00000055;	/* set PERCLKS                          */
 
 /* PERCLK3 is only used by SSI so the SSI driver can set it any value it likes
  * PERCLK1 and PERCLK2 are shared so DO NOT change it in any other place
@@ -135,34 +132,38 @@ int board_init (void) {
 	return 0;
 }
 
-int board_late_init(void) {
-
-	setenv("stdout", "serial");
-	setenv("stderr", "serial");
-
-	switch	(mc9328sid) {
-		case 0x0005901d :
-			printf ("MX1ADS board with MC9328 MX1 (0L44N), Silicon ID 0x%08x \n\n",mc9328sid);
-			break;
-		case 0x04d4c01d :
-			printf ("MX1ADS board with MC9328 MXL (1L45N), Silicon ID 0x%08x \n\n",mc9328sid);
-			break;
-		case 0x00d4c01d :
-			printf ("MX1ADS board with MC9328 MXL (2L45N), Silicon ID 0x%08x \n\n",mc9328sid);
-			break;
-
-		default :
-			printf ("MX1ADS board with UNKNOWN MC9328 cpu, Silicon ID 0x%08x \n",mc9328sid);
-			break;
+int board_late_init (void)
+{
+
+	setenv ("stdout", "serial");
+	setenv ("stderr", "serial");
+
+	switch (mc9328sid) {
+	case 0x0005901d:
+		printf ("MX1ADS board with MC9328 MX1 (0L44N), Silicon ID 0x%08x \n\n",
+			mc9328sid);
+		break;
+	case 0x04d4c01d:
+		printf ("MX1ADS board with MC9328 MXL (1L45N), Silicon ID 0x%08x \n\n",
+			mc9328sid);
+		break;
+	case 0x00d4c01d:
+		printf ("MX1ADS board with MC9328 MXL (2L45N), Silicon ID 0x%08x \n\n",
+			mc9328sid);
+		break;
+
+	default:
+		printf ("MX1ADS board with UNKNOWN MC9328 cpu, Silicon ID 0x%08x \n",
+			mc9328sid);
+		break;
 	}
 	return 0;
 }
 
-int dram_init (void) {
-	DECLARE_GLOBAL_DATA_PTR;
-
+int dram_init (void)
+{
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
 	return 0;
 }
diff --git a/board/mx1fs2/mx1fs2.c b/board/mx1fs2/mx1fs2.c
index 9e7a06c..1c026f0 100644
--- a/board/mx1fs2/mx1fs2.c
+++ b/board/mx1fs2/mx1fs2.c
@@ -19,9 +19,10 @@
  */
 
 #include <common.h>
-
 #include <asm/arch/imx-regs.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define SHOW_BOOT_PROGRESS(arg)        show_boot_progress(arg)
 
 extern void imx_gpio_mode(int gpio_mode);
@@ -79,8 +80,6 @@ static void logo_init(void)
 int
 board_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_arch_number = MACH_TYPE_MX1FS2;
 	gd->bd->bi_boot_params = 0x08000100;
 serial_init();
@@ -91,8 +90,6 @@ serial_init();
 int
 dram_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 #if ( CONFIG_NR_DRAM_BANKS > 0 )
 	gd->bd->bi_dram[0].start = MX1FS2_SDRAM_1;
 	gd->bd->bi_dram[0].size = MX1FS2_SDRAM_1_SIZE;
diff --git a/board/nc650/Makefile b/board/nc650/Makefile
index a4dd85f..8dc4934 100644
--- a/board/nc650/Makefile
+++ b/board/nc650/Makefile
@@ -1,4 +1,5 @@
 #
+# (C) Copyright 2006 Detlev Zundel, dzu@denx.de
 # (C) Copyright 2004
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
@@ -25,7 +26,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= lib$(BOARD).a
 
-OBJS	= $(BOARD).o flash.o
+OBJS	= $(BOARD).o nand.o flash.o
 
 $(LIB):	.depend $(OBJS)
 	$(AR) crv $@ $(OBJS)
diff --git a/board/nc650/config.mk b/board/nc650/config.mk
index fa8ba31..5b2284a 100644
--- a/board/nc650/config.mk
+++ b/board/nc650/config.mk
@@ -1,4 +1,5 @@
 #
+# (C) Copyright 2006 Detlev Zundel, dzu@denx.de
 # (C) Copyright 2004
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
@@ -26,3 +27,4 @@
 #
 
 TEXT_BASE = 0x40700000
+BOARDLIBS = drivers/nand/libnand.a
diff --git a/board/nc650/flash.c b/board/nc650/flash.c
index ce2f83b..8d7c172 100644
--- a/board/nc650/flash.c
+++ b/board/nc650/flash.c
@@ -32,6 +32,8 @@
 #include <common.h>
 #include <mpc8xx.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
 #define CFG_OR_TIMING_FLASH_AT_50MHZ (OR_ACS_DIV1  | OR_TRLX | OR_CSNT_SAM | \
 				      OR_SCY_2_CLK | OR_EHTR | OR_BI)
@@ -95,8 +97,6 @@ unsigned long flash_init (void)
 #ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
 	int scy, trlx, flash_or_timing, clk_diff;
 
-	DECLARE_GLOBAL_DATA_PTR;
-
 	scy = (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4;
 	if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) {
 		trlx = OR_TRLX;
diff --git a/board/nc650/nand.c b/board/nc650/nand.c
new file mode 100644
index 0000000..f27e536
--- /dev/null
+++ b/board/nc650/nand.c
@@ -0,0 +1,117 @@
+/*
+ * (C) Copyright 2006 Detlev Zundel, dzu@denx.de
+ * (C) Copyright 2006 DENX Software Engineering
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+
+#include <nand.h>
+
+#if defined(CONFIG_IDS852_REV1)
+/*
+ *	hardware specific access to control-lines
+ */
+static void nc650_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+	struct nand_chip *this = mtd->priv;
+
+	switch(cmd) {
+		case NAND_CTL_SETCLE:
+			this->IO_ADDR_W += 2;
+			break;
+		case NAND_CTL_CLRCLE:
+			this->IO_ADDR_W -= 2;
+			break;
+		case NAND_CTL_SETALE:
+			this->IO_ADDR_W += 1;
+			break;
+		case NAND_CTL_CLRALE:
+			this->IO_ADDR_W -= 1;
+			break;
+		case NAND_CTL_SETNCE:
+		case NAND_CTL_CLRNCE:
+			/* nop */
+			break;
+	}
+}
+#elif defined(CONFIG_IDS852_REV2)
+/*
+ *	hardware specific access to control-lines
+ */
+static void nc650_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+	struct nand_chip *this = mtd->priv;
+
+	switch(cmd) {
+		case NAND_CTL_SETCLE:
+ 			*(((volatile __u8 *) this->IO_ADDR_W) + 0xa) = 0; 
+			break;
+		case NAND_CTL_CLRCLE:
+ 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
+			break;
+		case NAND_CTL_SETALE:
+ 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x9) = 0; 
+			break;
+		case NAND_CTL_CLRALE:
+ 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
+			break;
+		case NAND_CTL_SETNCE:
+ 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
+			break;
+		case NAND_CTL_CLRNCE:
+ 			*(((volatile __u8 *) this->IO_ADDR_W) + 0xc) = 0; 
+			break;
+	}
+}
+#else
+#error Unknown IDS852 module revision
+#endif
+
+/*
+ * Board-specific NAND initialization. The following members of the
+ * argument are board-specific (per include/linux/mtd/nand.h):
+ * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
+ * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
+ * - hwcontrol: hardwarespecific function for accesing control-lines
+ * - dev_ready: hardwarespecific function for  accesing device ready/busy line
+ * - enable_hwecc?: function to enable (reset)  hardware ecc generator. Must
+ *   only be provided if a hardware ECC is available
+ * - eccmode: mode of ecc, see defines
+ * - chip_delay: chip dependent delay for transfering data from array to
+ *   read regs (tR)
+ * - options: various chip options. They can partly be set to inform
+ *   nand_scan about special functionality. See the defines for further
+ *   explanation
+ * Members with a "?" were not set in the merged testing-NAND branch,
+ * so they are not set here either.
+ */
+void board_nand_init(struct nand_chip *nand)
+{
+
+	nand->hwcontrol = nc650_hwcontrol;
+	nand->eccmode = NAND_ECC_SOFT;
+	nand->chip_delay = 12;
+/*	nand->options = NAND_SAMSUNG_LP_OPTIONS;*/
+}
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
diff --git a/board/nc650/nc650.c b/board/nc650/nc650.c
index fe96b93..c90ac9c 100644
--- a/board/nc650/nc650.c
+++ b/board/nc650/nc650.c
@@ -1,4 +1,5 @@
 /*
+ * (C) Copyright 2006 Detlev Zundel, dzu@denx.de
  * (C) Copyright 2001
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
@@ -108,7 +109,16 @@ const uint nand_flash_table[] = {
 
 int checkboard (void)
 {
-	puts ("Board: NC650\n");
+#if !defined(CONFIG_CP850)
+	puts ("Board: NC650");
+#else
+	puts ("Board: CP850");
+#endif
+#if defined(CONFIG_IDS852_REV1)
+	puts (" with IDS852 rev 1 module\n");
+#elif defined(CONFIG_IDS852_REV2)
+	puts (" with IDS852 rev 2 module\n");
+#endif
 	return 0;
 }
 
@@ -241,13 +251,61 @@ static long int dram_size (long int mamr_value, long int *base, long int maxsize
 	return (get_ram_size(base, maxsize));
 }
 
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-void nand_init(void)
-{
-	extern unsigned long nand_probe(unsigned long physadr);
 
-	unsigned long totlen = nand_probe(CFG_NAND_BASE);
+#if defined(CONFIG_CP850)
+
+#define DPRAM_VARNAME           "KP850DIP"
+#define PARAM_ADDR              0x7C0
+#define NAME_ADDR               0x7F8
+#define BOARD_NAME              "KP01"
+#define DEFAULT_LB              "241111"
 
-	printf ("%4lu MB\n", totlen >> 20);
+int misc_init_r(void)
+{
+	int             iCompatMode = 0;
+	char            *pParam = NULL;
+	char            *envlb;
+	
+	/* 
+	   First byte in CPLD read address space signals compatibility mode
+	   0 - cp850
+	   1 - kp852
+	*/
+	pParam = (char*)(CFG_CPLD_BASE);
+	if( *pParam != 0)
+		iCompatMode = 1;
+	
+	if ( iCompatMode != 0) {
+		/* 
+		   In KP852 compatibility mode we have to write to
+		   DPRAM as early as possible the binary coded
+		   line config and board name.
+		   The line config is derived from the environment
+		   variable DPRAM_VARNAME by converting from ASCII
+		   to binary per character.
+		*/
+		if ( (envlb = getenv ( DPRAM_VARNAME )) == 0) {
+			setenv( DPRAM_VARNAME, DEFAULT_LB);
+			envlb = DEFAULT_LB;
+		}
+		
+		/* Status string */
+		printf("Mode:  KP852(LB=%s)\n", envlb);
+
+		/* copy appl init */
+		pParam = (char*)(DPRAM_BASE_ADDR + PARAM_ADDR);
+		while (*envlb) {
+			*(pParam++) = *(envlb++) - '0';
+		}
+		*pParam = '\0';
+
+		/* copy board id */
+		pParam = (char*)(DPRAM_BASE_ADDR + NAME_ADDR);
+		strcpy( pParam, BOARD_NAME);
+	} else {
+		puts("Mode:  CP850\n");
+	}
+	
+	return 0;
 }
 #endif
diff --git a/board/netphone/config.mk b/board/netphone/config.mk
index de179c2..8497ebc 100644
--- a/board/netphone/config.mk
+++ b/board/netphone/config.mk
@@ -26,6 +26,3 @@
 #
 
 TEXT_BASE = 0x40000000
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/netstar/config.mk b/board/netstar/config.mk
index 50d647a..8b73e97 100644
--- a/board/netstar/config.mk
+++ b/board/netstar/config.mk
@@ -9,6 +9,3 @@
 
 # XXX TEXT_BASE = 0x20012000
 TEXT_BASE = 0x13FC0000
-
-# Compile the new NAND code
-BOARDLIBS = drivers/nand/libnand.a
diff --git a/board/netstar/netstar.c b/board/netstar/netstar.c
index 62615e5..4b7eba1 100644
--- a/board/netstar/netstar.c
+++ b/board/netstar/netstar.c
@@ -22,10 +22,10 @@
 
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int board_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* arch number of NetStar board */
 	/* TODO: use define from asm/mach-types.h */
 	gd->bd->bi_arch_number = 692;
@@ -38,8 +38,6 @@ int board_init(void)
 
 int dram_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/netta/netta.c b/board/netta/netta.c
index 9194bfb..4923e3a 100644
--- a/board/netta/netta.c
+++ b/board/netta/netta.c
@@ -555,9 +555,9 @@ int board_early_init_f(void)
 	return 0;
 }
 
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
 
-#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_legacy.h>
 
 extern ulong nand_probe(ulong physadr);
 extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
diff --git a/board/netta2/config.mk b/board/netta2/config.mk
index de179c2..8497ebc 100644
--- a/board/netta2/config.mk
+++ b/board/netta2/config.mk
@@ -26,6 +26,3 @@
 #
 
 TEXT_BASE = 0x40000000
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/netvia/config.mk b/board/netvia/config.mk
index 583174a..9dddaad 100644
--- a/board/netvia/config.mk
+++ b/board/netvia/config.mk
@@ -26,6 +26,3 @@
 #
 
 TEXT_BASE = 0x40000000
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/ns9750dev/ns9750dev.c b/board/ns9750dev/ns9750dev.c
index ea00d5a..1dd348a 100644
--- a/board/ns9750dev/ns9750dev.c
+++ b/board/ns9750dev/ns9750dev.c
@@ -41,6 +41,8 @@
 # include <./ns9750_bbus.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 void flash__init( void );
 void ether__init( void );
 
@@ -60,8 +62,6 @@ static inline void delay( unsigned long loops )
 
 int board_init( void )
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* Active BBUS modules */
 	*get_bbus_reg_addr( NS9750_BBUS_MASTER_RESET ) = 0;
 
@@ -114,8 +114,6 @@ void ether__init (void)
 ******************************/
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/nx823/nx823.c b/board/nx823/nx823.c
index 65d45c1..4a426ec 100644
--- a/board/nx823/nx823.c
+++ b/board/nx823/nx823.c
@@ -28,12 +28,10 @@
 #include <malloc.h>
 #include <mpc8xx.h>
 
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
 
 static long int dram_size (long int, long int *, long int);
 
-/* ------------------------------------------------------------------------- */
-
 #define	_NOT_USED_	0xFFFFFFFF
 
 const uint sdram_table[] = {
@@ -366,8 +364,6 @@ u_long *my_sernum;
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	char tmp[50];
 	u_char *e = gd->bd->bi_enetaddr;
 
@@ -387,8 +383,6 @@ int misc_init_r (void)
 
 void load_sernum_ethaddr (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int i;
 	bd_t *bd = gd->bd;
 
diff --git a/board/omap1510inn/omap1510innovator.c b/board/omap1510inn/omap1510innovator.c
index f037f42..8941209 100644
--- a/board/omap1510inn/omap1510innovator.c
+++ b/board/omap1510inn/omap1510innovator.c
@@ -31,6 +31,8 @@
 
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static void flash__init (void);
 static void ether__init (void);
 
@@ -47,8 +49,6 @@ static inline void delay (unsigned long loops)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* arch number of OMAP 1510-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_OMAP_INNOVATOR;
 
@@ -122,8 +122,6 @@ static void ether__init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/omap1610inn/omap1610innovator.c b/board/omap1610inn/omap1610innovator.c
index 7842518..8dbe686 100644
--- a/board/omap1610inn/omap1610innovator.c
+++ b/board/omap1610inn/omap1610innovator.c
@@ -36,6 +36,8 @@
 #include <./configs/omap1510.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_CS_AUTOBOOT
 unsigned long omap_flash_base;
 #endif
@@ -60,8 +62,6 @@ static inline void delay (unsigned long loops)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	if (machine_is_omap_h2())
 		gd->bd->bi_arch_number = MACH_TYPE_OMAP_H2;
 	else if (machine_is_omap_innovator())
@@ -153,8 +153,6 @@ void ether__init (void)
 ******************************/
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/omap2420h4/omap2420h4.c b/board/omap2420h4/omap2420h4.c
index 2387176..f7f75e0 100644
--- a/board/omap2420h4/omap2420h4.c
+++ b/board/omap2420h4/omap2420h4.c
@@ -36,7 +36,9 @@
 extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
 #endif
 
- void wait_for_command_complete(unsigned int wd_base);
+DECLARE_GLOBAL_DATA_PTR;
+
+void wait_for_command_complete(unsigned int wd_base);
 
 /*******************************************************
  * Routine: delay
@@ -54,8 +56,6 @@ static inline void delay (unsigned long loops)
  *****************************************/
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gpmc_init(); /* in SRAM or SDRM, finish GPMC */
 
 	gd->bd->bi_arch_number = MACH_TYPE_OMAP_H4;		/* board id for linux */
@@ -195,7 +195,6 @@ void ether_init (void)
  **********************************************/
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned int size0=0,size1=0;
 	u32 mtype, btype, rev, cpu;
 	u8 chg_on = 0x5; /* enable charge of back up battery */
diff --git a/board/omap5912osk/omap5912osk.c b/board/omap5912osk/omap5912osk.c
index 1faa084..e9e6b0e 100644
--- a/board/omap5912osk/omap5912osk.c
+++ b/board/omap5912osk/omap5912osk.c
@@ -38,6 +38,8 @@
 #include <./configs/omap1510.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 void flash__init (void);
 void ether__init (void);
 void set_muxconf_regs (void);
@@ -58,8 +60,6 @@ static inline void delay (unsigned long loops)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_arch_number = MACH_TYPE_OMAP_OSK;
 
 	/* adress of boot parameters */
@@ -136,8 +136,6 @@ void ether__init (void)
 ******************************/
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/omap730p2/omap730p2.c b/board/omap730p2/omap730p2.c
index 256c6a6..309d667 100644
--- a/board/omap730p2/omap730p2.c
+++ b/board/omap730p2/omap730p2.c
@@ -34,6 +34,8 @@
 #include <./configs/omap730.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int test_boot_mode(void);
 void spin_up_leds(void);
 void flash__init (void);
@@ -84,8 +86,6 @@ void toggle_backup_led(void)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* arch number of OMAP 730 P2 Board - Same as the Innovator! */
 	gd->bd->bi_arch_number = MACH_TYPE_OMAP_PERSEUS2;
 
@@ -180,8 +180,6 @@ void ether__init (void)
 ******************************/
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/oxc/oxc.c b/board/oxc/oxc.c
index fa7ff02..6cc3cc5 100644
--- a/board/oxc/oxc.c
+++ b/board/oxc/oxc.c
@@ -26,6 +26,8 @@
 #include <pci.h>
 #include <i2c.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int checkboard (void)
 {
 	puts (	"Board: OXC8240\n" );
@@ -184,8 +186,6 @@ int misc_init_r (void)
 
 #ifdef CFG_OXC_GENERATE_IP
 	{
-		DECLARE_GLOBAL_DATA_PTR;
-
 		char str[32];
 		unsigned long ip = CFG_OXC_IPMASK;
 		bd_t *bd = gd->bd;
diff --git a/board/pcippc2/fpga_serial.c b/board/pcippc2/fpga_serial.c
index 579bfc7..5f89d9b 100644
--- a/board/pcippc2/fpga_serial.c
+++ b/board/pcippc2/fpga_serial.c
@@ -29,6 +29,8 @@
 #include "hardware.h"
 #include "pcippc2.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
   /* 8 data, 1 stop, no parity
    */
 #define LCRVAL		0x03
@@ -92,8 +94,6 @@ int fpga_serial_tstc (void)
 
 void fpga_serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int clock_divisor = 115200 / gd->baudrate;
 
 	fpga_serial_wait ();
diff --git a/board/pcippc2/pcippc2.c b/board/pcippc2/pcippc2.c
index 231b505..a216c55 100644
--- a/board/pcippc2/pcippc2.c
+++ b/board/pcippc2/pcippc2.c
@@ -34,6 +34,8 @@
 #include "sconsole.h"
 #include "fpga_serial.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #if defined(CONFIG_WATCHDOG)
 
 static int pcippc2_wdt_init_done = 0;
@@ -108,8 +110,6 @@ int board_early_init_f (void)
 
 void after_reloc (ulong dest_addr)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* Jump to the main U-Boot board init code
 	 */
 	board_init_r ((gd_t *)gd, dest_addr);
diff --git a/board/pcippc2/sconsole.c b/board/pcippc2/sconsole.c
index a9f2b29..3b19069 100644
--- a/board/pcippc2/sconsole.c
+++ b/board/pcippc2/sconsole.c
@@ -26,6 +26,8 @@
 
 #include "sconsole.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 void	(*sconsole_putc) (char) = 0;
 void	(*sconsole_puts) (const char *) = 0;
 int	(*sconsole_getc) (void) = 0;
@@ -34,8 +36,6 @@ void	(*sconsole_setbrg) (void) = 0;
 
 int serial_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	sconsole_buffer_t *sb = SCONSOLE_BUFFER;
 
 	sb->pos  = 0;
@@ -104,8 +104,6 @@ int serial_tstc (void)
 
 void serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	if (sconsole_setbrg) {
 		(*sconsole_setbrg) ();
 	} else {
diff --git a/board/pleb2/pleb2.c b/board/pleb2/pleb2.c
index ce9245c..dc6fac4 100644
--- a/board/pleb2/pleb2.c
+++ b/board/pleb2/pleb2.c
@@ -28,8 +28,7 @@
 #include <common.h>
 #include <asm-arm/mach-types.h>
 
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -37,8 +36,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -61,8 +58,6 @@ int board_late_init(void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
diff --git a/board/pm520/pm520.c b/board/pm520/pm520.c
index d4cc5cb..65c5291 100644
--- a/board/pm520/pm520.c
+++ b/board/pm520/pm520.c
@@ -34,6 +34,8 @@
 #include "mt48lc16m16a2-75.h"
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifndef CFG_RAMBOOT
 static void sdram_start (int hi_addr)
 {
@@ -281,7 +283,6 @@ extern flash_info_t flash_info[];	/* info for FLASH chips */
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	/* adjust flash start */
 	gd->bd->bi_flashstart = flash_info[0].start[0];
 	return (0);
diff --git a/board/pn62/pn62.c b/board/pn62/pn62.c
index 377aaa8..b2f348d 100644
--- a/board/pn62/pn62.c
+++ b/board/pn62/pn62.c
@@ -26,6 +26,7 @@
 
 #include "pn62.h"
 
+DECLARE_GLOBAL_DATA_PTR;
 
 static int get_serial_number (char *string, int size);
 static int get_mac_address (int id, u8 * mac, char *string, int size);
@@ -122,8 +123,6 @@ void pci_init_board (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	char str[20];
 	u8 mac[6];
 
diff --git a/board/prodrive/p3p440/p3p440.c b/board/prodrive/p3p440/p3p440.c
index d42a643..2f28e9d 100644
--- a/board/prodrive/p3p440/p3p440.c
+++ b/board/prodrive/p3p440/p3p440.c
@@ -29,6 +29,8 @@
 
 #include "p3p440.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 void set_led(int color)
 {
 	switch (color) {
@@ -141,8 +143,6 @@ int checkboard(void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/*
 	 * Adjust flash start and offset to detected values
 	 */
@@ -206,8 +206,6 @@ int pci_pre_init(struct pci_controller *hose)
 #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
 void pci_target_init(struct pci_controller *hose)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/*--------------------------------------------------------------------------+
 	 * Disable everything
 	 *--------------------------------------------------------------------------*/
diff --git a/board/pxa255_idp/pxa_idp.c b/board/pxa255_idp/pxa_idp.c
index d5b993a..5765c55 100644
--- a/board/pxa255_idp/pxa_idp.c
+++ b/board/pxa255_idp/pxa_idp.c
@@ -33,8 +33,7 @@
 #include <common.h>
 #include <command.h>
 
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -42,8 +41,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -86,8 +83,6 @@ int board_late_init(void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
diff --git a/board/quantum/quantum.c b/board/quantum/quantum.c
index 2861bc3..afa6e11 100644
--- a/board/quantum/quantum.c
+++ b/board/quantum/quantum.c
@@ -170,14 +170,14 @@ static long int dram_size (long int mamr_value, long int *base,
 	memctl->memc_mamr = mamr_value;
 
 	for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
-		addr = base + cnt;	/* pointer arith! */
+		addr = (volatile ulong *)(base + cnt);	/* pointer arith! */
 
 		save[i++] = *addr;
 		*addr = ~cnt;
 	}
 
 	/* write 0 to base address */
-	addr = base;
+	addr = (volatile ulong *)base;
 	save[i] = *addr;
 	*addr = 0;
 
@@ -194,7 +194,7 @@ static long int dram_size (long int mamr_value, long int *base,
 	}
 
 	for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
-		addr = base + cnt;	/* pointer arith! */
+		addr = (volatile ulong *)(base + cnt);	/* pointer arith! */
 
 		val = *addr;
 		*addr = save[--i];
diff --git a/board/rbc823/kbd.c b/board/rbc823/kbd.c
index c27929d..6d530f6 100644
--- a/board/rbc823/kbd.c
+++ b/board/rbc823/kbd.c
@@ -33,6 +33,8 @@
 #include <devices.h>
 #include <lcd.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define	SMC_INDEX	0
 #define PROFF_SMC	PROFF_SMC1
 #define CPM_CR_CH_SMC	CPM_CR_CH_SMC1
@@ -46,8 +48,6 @@
 
 void smc1_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	volatile immap_t *im = (immap_t *)CFG_IMMR;
 	volatile cpm8xx_t *cp = &(im->im_cpm);
 
diff --git a/board/sacsng/clkinit.c b/board/sacsng/clkinit.c
index ea4c65d..edb775d 100644
--- a/board/sacsng/clkinit.c
+++ b/board/sacsng/clkinit.c
@@ -30,6 +30,8 @@
 
 #include "clkinit.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int Daq64xSampling = 0;
 
 
@@ -257,7 +259,6 @@ void Daq_BRG_Set_ExtClk(uint brg, uint extc)
 
 uint Daq_BRG_Rate(uint brg)
 {
-     DECLARE_GLOBAL_DATA_PTR;
      volatile immap_t *immr = (immap_t *)CFG_IMMR;
      uint *brg_ptr;
      uint brg_cnt;
@@ -295,7 +296,6 @@ uint Daq_Get_SampleRate(void)
 
 void Daq_Init_Clocks(int sample_rate, int sample_64x)
 {
-    DECLARE_GLOBAL_DATA_PTR;
     volatile ioport_t *iopa = ioport_addr((immap_t *)CFG_IMMR, 0 /* port A */);
     uint mclk_divisor; /* MCLK divisor */
     int  flag;         /* Interrupt state */
diff --git a/board/sandburst/common/sb_common.c b/board/sandburst/common/sb_common.c
index 3530416..7816472 100644
--- a/board/sandburst/common/sb_common.c
+++ b/board/sandburst/common/sb_common.c
@@ -29,6 +29,8 @@
 #include "ppc440gx_i2c.h"
 #include "sb_common.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 long int fixed_sdram (void);
 
 /*************************************************************************
@@ -203,7 +205,7 @@ long int initdram (int board_type)
 	long dram_size = 0;
 
 #if defined(CONFIG_SPD_EEPROM)
-	dram_size = spd_sdram (0);
+	dram_size = spd_sdram ();
 #else
 	dram_size = fixed_sdram ();
 #endif
@@ -341,8 +343,6 @@ int pci_pre_init(struct pci_controller * hose )
 #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
 void pci_target_init(struct pci_controller * hose )
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/*--------------------------------------------------------------------------+
 	 * Disable everything
 	 *--------------------------------------------------------------------------*/
diff --git a/board/sbc405/sbc405.c b/board/sbc405/sbc405.c
index cad5873..0ae6d0b 100644
--- a/board/sbc405/sbc405.c
+++ b/board/sbc405/sbc405.c
@@ -98,7 +98,7 @@ int checkboard (void)
 
 long int initdram (int board_type)
 {
-	return  spd_sdram (0);
+	return  spd_sdram ();
 }
 
 /* ------------------------------------------------------------------------- */
diff --git a/board/sbc8240/sbc8240.c b/board/sbc8240/sbc8240.c
index a6d3bab..8a52f67 100644
--- a/board/sbc8240/sbc8240.c
+++ b/board/sbc8240/sbc8240.c
@@ -29,12 +29,12 @@
 #include <asm/processor.h>
 #include <pci.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define BOARD_REV_REG 0xFE80002B
 
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	char  revision = *(volatile char *)(BOARD_REV_REG);
 	char  buf[32];
 
diff --git a/board/sc520_cdp/sc520_cdp.c b/board/sc520_cdp/sc520_cdp.c
index cd52324..b6add59 100644
--- a/board/sc520_cdp/sc520_cdp.c
+++ b/board/sc520_cdp/sc520_cdp.c
@@ -30,6 +30,8 @@
 #include <asm/ic/ali512x.h>
 #include <spi.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #undef SC520_CDP_DEBUG
 
 #ifdef	SC520_CDP_DEBUG
@@ -481,8 +483,6 @@ int pci_enable_legacy_video_ports(struct pci_controller *hose)
 
 int board_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	init_sc520();
 	bus_init();
 	irq_init();
diff --git a/board/sc520_spunk/sc520_spunk.c b/board/sc520_spunk/sc520_spunk.c
index e7a7d51..ed226fd 100644
--- a/board/sc520_spunk/sc520_spunk.c
+++ b/board/sc520_spunk/sc520_spunk.c
@@ -29,9 +29,7 @@
 #include <asm/pci.h>
 #include <asm/ic/sc520.h>
 
-
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Theory:
@@ -483,8 +481,6 @@ int pci_enable_legacy_video_ports(struct pci_controller *hose)
 
 int board_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	init_sc520();
 	bus_init();
 	irq_init();
diff --git a/board/scb9328/scb9328.c b/board/scb9328/scb9328.c
index 3ed8753..3f6831b 100644
--- a/board/scb9328/scb9328.c
+++ b/board/scb9328/scb9328.c
@@ -20,42 +20,41 @@
 
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_SHOW_BOOT_PROGRESS
 # define SHOW_BOOT_PROGRESS(arg)        show_boot_progress(arg)
 #else
 # define SHOW_BOOT_PROGRESS(arg)
 #endif
 
-int board_init( void ){
-  DECLARE_GLOBAL_DATA_PTR;
-
-  gd->bd->bi_arch_number = MACH_TYPE_SCB9328;
-  gd->bd->bi_boot_params = 0x08000100;
+int board_init (void)
+{
+	gd->bd->bi_arch_number = MACH_TYPE_SCB9328;
+	gd->bd->bi_boot_params = 0x08000100;
 
-  return 0;
+	return 0;
 }
 
-int dram_init( void ){
-  DECLARE_GLOBAL_DATA_PTR;
-
+int dram_init (void)
+{
 #if ( CONFIG_NR_DRAM_BANKS > 0 )
-  gd->bd->bi_dram[0].start = SCB9328_SDRAM_1;
-  gd->bd->bi_dram[0].size  = SCB9328_SDRAM_1_SIZE;
+	gd->bd->bi_dram[0].start = SCB9328_SDRAM_1;
+	gd->bd->bi_dram[0].size = SCB9328_SDRAM_1_SIZE;
 #endif
 #if ( CONFIG_NR_DRAM_BANKS > 1 )
-  gd->bd->bi_dram[1].start = SCB9328_SDRAM_2;
-  gd->bd->bi_dram[1].size  = SCB9328_SDRAM_2_SIZE;
+	gd->bd->bi_dram[1].start = SCB9328_SDRAM_2;
+	gd->bd->bi_dram[1].size = SCB9328_SDRAM_2_SIZE;
 #endif
 #if ( CONFIG_NR_DRAM_BANKS > 2 )
-  gd->bd->bi_dram[2].start = SCB9328_SDRAM_3;
-  gd->bd->bi_dram[2].size  = SCB9328_SDRAM_3_SIZE;
+	gd->bd->bi_dram[2].start = SCB9328_SDRAM_3;
+	gd->bd->bi_dram[2].size = SCB9328_SDRAM_3_SIZE;
 #endif
 #if ( CONFIG_NR_DRAM_BANKS > 3 )
-  gd->bd->bi_dram[3].start = SCB9328_SDRAM_4;
-  gd->bd->bi_dram[3].size  = SCB9328_SDRAM_4_SIZE;
+	gd->bd->bi_dram[3].start = SCB9328_SDRAM_4;
+	gd->bd->bi_dram[3].size = SCB9328_SDRAM_4_SIZE;
 #endif
-
-  return 0;
+	return 0;
 }
 
 /**
diff --git a/board/shannon/shannon.c b/board/shannon/shannon.c
index 0d9f146..8cd1fc3 100644
--- a/board/shannon/shannon.c
+++ b/board/shannon/shannon.c
@@ -24,8 +24,7 @@
 
 #include <common.h>
 
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -33,8 +32,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* but if we use InfernoLoader, we must do some inits here */
 
@@ -75,7 +72,6 @@ int dram_init (void)
 {
 #if defined(PHYS_SDRAM_1) || defined(PHYS_SDRAM_2) || \
     defined(PHYS_SDRAM_3) || defined(PHYS_SDRAM_4)
-	DECLARE_GLOBAL_DATA_PTR;
 	bd_t *bd = gd->bd;
 #endif
 
diff --git a/board/siemens/SCM/scm.c b/board/siemens/SCM/scm.c
index d20688d..8783aaf 100644
--- a/board/siemens/SCM/scm.c
+++ b/board/siemens/SCM/scm.c
@@ -27,6 +27,8 @@
 
 #include "scm.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static void config_scoh_cs(void);
 extern int  fpga_init(void);
 
@@ -300,8 +302,6 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
  */
 int power_on_reset (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* Test Reset Status Register */
 	return gd->reset_status & RSR_CSRS ? 0 : 1;
 }
diff --git a/board/sixnet/config.mk b/board/sixnet/config.mk
index 8e73d2f..0cd8f44 100644
--- a/board/sixnet/config.mk
+++ b/board/sixnet/config.mk
@@ -26,6 +26,3 @@
 #
 
 TEXT_BASE = 0xF8000000
-
-# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
-BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/sixnet/sixnet.c b/board/sixnet/sixnet.c
index a25dffd..a4cb4dc 100644
--- a/board/sixnet/sixnet.c
+++ b/board/sixnet/sixnet.c
@@ -38,6 +38,8 @@
 extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define ORMASK(size) ((-size) & OR_AM_MSK)
 
 static long ram_size(ulong *, long);
@@ -256,8 +258,6 @@ int board_postclk_init (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	volatile immap_t     *immap = (immap_t *)CFG_IMMR;
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
 	char* s;
diff --git a/board/smdk2400/smdk2400.c b/board/smdk2400/smdk2400.c
index cb70218..4d1f1a6 100644
--- a/board/smdk2400/smdk2400.c
+++ b/board/smdk2400/smdk2400.c
@@ -28,7 +28,7 @@
 #include <common.h>
 #include <s3c2400.h>
 
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_MODEM_SUPPORT
 static int key_pressed(void);
@@ -45,7 +45,6 @@ extern int do_mdm_init; /* defined in common/main.c */
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
 	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
 
@@ -94,8 +93,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/smdk2410/smdk2410.c b/board/smdk2410/smdk2410.c
index 9623aef..802348d 100644
--- a/board/smdk2410/smdk2410.c
+++ b/board/smdk2410/smdk2410.c
@@ -28,7 +28,7 @@
 #include <common.h>
 #include <s3c2410.h>
 
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
 
 #define FCLK_SPEED 1
 
@@ -67,7 +67,6 @@ static inline void delay (unsigned long loops)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
 	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
 
@@ -117,8 +116,6 @@ int board_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/stamp/stamp.c b/board/stamp/stamp.c
index 3fe0134..7e3af20 100644
--- a/board/stamp/stamp.c
+++ b/board/stamp/stamp.c
@@ -29,6 +29,8 @@
 #include <asm/mem_init.h>
 #include "stamp.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define STATUS_LED_OFF 0
 #define STATUS_LED_ON  1
 
@@ -49,7 +51,6 @@ int checkboard (void)
 
 long int initdram (int board_type)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 #ifdef DEBUG
 	printf ("SDRAM attributes:\n");
 	printf ("  tRCD:%d Cycles; tRP:%d Cycles; tRAS:%d Cycles; tWR:%d Cycles; "
diff --git a/board/sx1/sx1.c b/board/sx1/sx1.c
index e45f6ae..aaef76e 100644
--- a/board/sx1/sx1.c
+++ b/board/sx1/sx1.c
@@ -27,6 +27,8 @@
 
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static void flash__init (void);
 static void ether__init (void);
 
@@ -43,8 +45,6 @@ static inline void delay (unsigned long loops)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* arch number of SX1 Board */
 	gd->bd->bi_arch_number = MACH_TYPE_SX1;
 
@@ -116,8 +116,6 @@ static void ether__init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/tqm834x/tqm834x.c b/board/tqm834x/tqm834x.c
index dada673..b5c12e3 100644
--- a/board/tqm834x/tqm834x.c
+++ b/board/tqm834x/tqm834x.c
@@ -32,6 +32,8 @@
 #include <asm-ppc/mmu.h>
 #include <pci.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define IOSYNC			asm("eieio")
 #define ISYNC			asm("isync")
 #define SYNC			asm("sync")
@@ -142,7 +144,6 @@ int checkboard (void)
 	puts("Board: TQM834x\n");
 
 #ifdef CONFIG_PCI
-	DECLARE_GLOBAL_DATA_PTR;
 	volatile immap_t * immr;
 	u32 w, f;
 
diff --git a/board/tqm85xx/tqm85xx.c b/board/tqm85xx/tqm85xx.c
index c03b60d..69b9101 100644
--- a/board/tqm85xx/tqm85xx.c
+++ b/board/tqm85xx/tqm85xx.c
@@ -36,6 +36,8 @@
 #include <spd.h>
 #include <flash.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 extern flash_info_t flash_info[];	/* FLASH chips info */
 
 void local_bus_init (void);
@@ -257,7 +259,6 @@ int checkboard (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	volatile immap_t    *immap = (immap_t *)CFG_IMMR;
 	volatile ccsr_lbc_t *memctl = &immap->im_lbc;
 
diff --git a/board/tqm8xx/flash.c b/board/tqm8xx/flash.c
index 97bb5c3..ab57ee5 100644
--- a/board/tqm8xx/flash.c
+++ b/board/tqm8xx/flash.c
@@ -31,6 +31,8 @@
 
 #include <asm/processor.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M)
 # ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
 #  define CFG_OR_TIMING_FLASH_AT_50MHZ	(OR_ACS_DIV1  | OR_TRLX | OR_CSNT_SAM | \
@@ -63,8 +65,6 @@ unsigned long flash_init (void)
 #ifdef	CFG_OR_TIMING_FLASH_AT_50MHZ
 	int scy, trlx, flash_or_timing, clk_diff;
 
-	DECLARE_GLOBAL_DATA_PTR;
-
 	scy = (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4;
 	if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) {
 		trlx = OR_TRLX;
diff --git a/board/tqm8xx/tqm8xx.c b/board/tqm8xx/tqm8xx.c
index 017bdf9..520bea8 100644
--- a/board/tqm8xx/tqm8xx.c
+++ b/board/tqm8xx/tqm8xx.c
@@ -31,12 +31,10 @@
 #include <ps2mult.h>
 #endif
 
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
 
 static long int dram_size (long int, long int *, long int);
 
-/* ------------------------------------------------------------------------- */
-
 #define	_NOT_USED_	0xFFFFFFFF
 
 const uint sdram_table[] =
@@ -104,8 +102,6 @@ const uint sdram_table[] =
 
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	char *s = getenv ("serial#");
 
 	puts ("Board: ");
diff --git a/board/trab/memory.c b/board/trab/memory.c
index 9104413..4097892 100644
--- a/board/trab/memory.c
+++ b/board/trab/memory.c
@@ -454,10 +454,11 @@ int memory_post_tests (unsigned long start, unsigned long size)
 }
 
 #if 0
+DECLARE_GLOBAL_DATA_PTR;
+
 int memory_post_test (int flags)
 {
 	int ret = 0;
-	DECLARE_GLOBAL_DATA_PTR;
 	bd_t *bd = gd->bd;
 	unsigned long memsize = (bd->bi_memsize >= 256 << 20 ?
 				 256 << 20 : bd->bi_memsize) - (1 << 20);
diff --git a/board/trab/trab.c b/board/trab/trab.c
index e8dfd2c..868a899 100644
--- a/board/trab/trab.c
+++ b/board/trab/trab.c
@@ -28,7 +28,7 @@
 #include <s3c2400.h>
 #include <command.h>
 
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CFG_BRIGHTNESS
 static void spi_init(void);
@@ -52,8 +52,6 @@ extern int do_mdm_init; /* defined in common/main.c */
 #define KBD_MDELAY	5000
 static void udelay_no_timer (int usec)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int i;
 	int delay = usec * 3;
 
@@ -70,7 +68,6 @@ int board_init ()
 #if defined(CONFIG_VFD)
 	extern int vfd_init_clocks(void);
 #endif
-	DECLARE_GLOBAL_DATA_PTR;
 	S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
 	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
 
@@ -141,8 +138,6 @@ int board_init ()
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	return 0;
diff --git a/board/trab/vfd.c b/board/trab/vfd.c
index f510ee5..cea8b0b 100644
--- a/board/trab/vfd.c
+++ b/board/trab/vfd.c
@@ -39,6 +39,8 @@
 #include <devices.h>
 #include <s3c2400.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_VFD
 
 /************************************************************************/
@@ -86,7 +88,6 @@ unsigned char bit_vfd_table[112][18][2][4][2];
  */
 void init_grid_ctrl(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	ulong adr, grid_cycle;
 	unsigned int bit, display;
 	unsigned char temp, bit_nr;
@@ -172,7 +173,6 @@ void init_grid_ctrl(void)
  */
 void create_vfd_table(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned long vfd_table[112][18][2][4][2];
 	unsigned int x, y, color, display, entry, pixel;
 	unsigned int x_abcdef = 0;
@@ -280,7 +280,6 @@ void set_vfd_pixel(unsigned char x, unsigned char y,
 		   unsigned char color, unsigned char display,
 		   unsigned char value)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	ulong adr;
 	unsigned char bit_nr, temp;
 
@@ -435,8 +434,6 @@ int drv_vfd_init(void)
 	static int vfd_init_done = 0;
 	int vfd_inv_data = 0;
 
-	DECLARE_GLOBAL_DATA_PTR;
-
 	if (vfd_init_done != 0)
 		return (0);
 	vfd_init_done = 1;
diff --git a/board/versatile/versatile.c b/board/versatile/versatile.c
index 0274027..9d1a25e 100644
--- a/board/versatile/versatile.c
+++ b/board/versatile/versatile.c
@@ -35,6 +35,8 @@
 
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 void flash__init (void);
 void ether__init (void);
 void peripheral_power_enable (void);
@@ -61,9 +63,6 @@ static inline void delay (unsigned long loops)
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
-
 	/*
 	 * set clock frequency:
 	 *	VERSATILE_REFCLK is 32KHz
diff --git a/board/voiceblue/voiceblue.c b/board/voiceblue/voiceblue.c
index 7a2d243..04093d1 100644
--- a/board/voiceblue/voiceblue.c
+++ b/board/voiceblue/voiceblue.c
@@ -21,10 +21,10 @@
 
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int board_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	*((volatile unsigned char *) VOICEBLUE_LED_REG) = 0xaa;
 
 	/* arch number of VoiceBlue board */
@@ -39,8 +39,6 @@ int board_init(void)
 
 int dram_init(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	*((volatile unsigned short *) VOICEBLUE_LED_REG) = 0xff;
 
  	/* Take the Ethernet controller out of reset and wait
diff --git a/board/wepep250/wepep250.c b/board/wepep250/wepep250.c
index 56cb855..fe4b6a9 100644
--- a/board/wepep250/wepep250.c
+++ b/board/wepep250/wepep250.c
@@ -23,45 +23,45 @@
 #include <common.h>
 #include <asm/arch/pxa-regs.h>
 
-int board_init( void ){
-  DECLARE_GLOBAL_DATA_PTR;
+DECLARE_GLOBAL_DATA_PTR;
 
-  gd->bd->bi_arch_number = MACH_TYPE_WEP_EP250;
-  gd->bd->bi_boot_params = 0xa0000000;
+int board_init (void)
+{
+	gd->bd->bi_arch_number = MACH_TYPE_WEP_EP250;
+	gd->bd->bi_boot_params = 0xa0000000;
 /*
  * Setup GPIO stuff to get serial working
  */
 #if defined( CONFIG_FFUART )
-  GPDR1   = 0x80;
-  GAFR1_L = 0x8010;
+	GPDR1 = 0x80;
+	GAFR1_L = 0x8010;
 #elif defined( CONFIG_BTUART )
-  GPDR1   = 0x800;
-  GAFR1_L = 0x900000;
+	GPDR1 = 0x800;
+	GAFR1_L = 0x900000;
 #endif
-  PSSR    = 0x20;
+	PSSR = 0x20;
 
-  return 0;
+	return 0;
 }
 
-int dram_init( void ){
-  DECLARE_GLOBAL_DATA_PTR;
-
+int dram_init (void)
+{
 #if ( CONFIG_NR_DRAM_BANKS > 0 )
-  gd->bd->bi_dram[0].start = WEP_SDRAM_1;
-  gd->bd->bi_dram[0].size  = WEP_SDRAM_1_SIZE;
+	gd->bd->bi_dram[0].start = WEP_SDRAM_1;
+	gd->bd->bi_dram[0].size = WEP_SDRAM_1_SIZE;
 #endif
 #if ( CONFIG_NR_DRAM_BANKS > 1 )
-  gd->bd->bi_dram[1].start = WEP_SDRAM_2;
-  gd->bd->bi_dram[1].size  = WEP_SDRAM_2_SIZE;
+	gd->bd->bi_dram[1].start = WEP_SDRAM_2;
+	gd->bd->bi_dram[1].size = WEP_SDRAM_2_SIZE;
 #endif
 #if ( CONFIG_NR_DRAM_BANKS > 2 )
-  gd->bd->bi_dram[2].start = WEP_SDRAM_3;
-  gd->bd->bi_dram[2].size  = WEP_SDRAM_3_SIZE;
+	gd->bd->bi_dram[2].start = WEP_SDRAM_3;
+	gd->bd->bi_dram[2].size = WEP_SDRAM_3_SIZE;
 #endif
 #if ( CONFIG_NR_DRAM_BANKS > 3 )
-  gd->bd->bi_dram[3].start = WEP_SDRAM_4;
-  gd->bd->bi_dram[3].size  = WEP_SDRAM_4_SIZE;
+	gd->bd->bi_dram[3].start = WEP_SDRAM_4;
+	gd->bd->bi_dram[3].size = WEP_SDRAM_4_SIZE;
 #endif
 
-  return 0;
+	return 0;
 }
diff --git a/board/xaeniax/xaeniax.c b/board/xaeniax/xaeniax.c
index 26fb312..9baa457 100644
--- a/board/xaeniax/xaeniax.c
+++ b/board/xaeniax/xaeniax.c
@@ -30,8 +30,7 @@
 
 #include <common.h>
 
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -39,8 +38,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -63,8 +60,6 @@ int board_late_init(void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	/*	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;*/
diff --git a/board/xilinx/ml300/serial.c b/board/xilinx/ml300/serial.c
index 19bcc6f..c204b88 100644
--- a/board/xilinx/ml300/serial.c
+++ b/board/xilinx/ml300/serial.c
@@ -43,6 +43,8 @@
 #include <configs/ml300.h>
 #include "xparameters.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define USE_CHAN1 \
 	((defined XPAR_UARTNS550_0_BASEADDR) && (defined CFG_INIT_CHAN1))
 #define USE_CHAN2 \
@@ -64,7 +66,6 @@ int
 serial_init(void)
 {
 #if USE_CHAN1
-	DECLARE_GLOBAL_DATA_PTR;
 	int clock_divisor;
 
 	clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
@@ -103,7 +104,6 @@ void
 serial_setbrg(void)
 {
 #if USE_CHAN1
-	DECLARE_GLOBAL_DATA_PTR;
 	int clock_divisor;
 
 	clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
diff --git a/board/xm250/xm250.c b/board/xm250/xm250.c
index ef5e9da..528d323 100644
--- a/board/xm250/xm250.c
+++ b/board/xm250/xm250.c
@@ -28,6 +28,8 @@
 #include <asm/arch/pxa-regs.h>
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* ------------------------------------------------------------------------- */
 
 /* local prototypes */
@@ -61,7 +63,6 @@ int
 board_init (void)
 /**********************************************************/
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	/* arch number of MicroSys XM250 */
 	gd->bd->bi_arch_number = MACH_TYPE_XM250;
 
@@ -76,8 +77,6 @@ int
 dram_init (void)
 /**********************************************************/
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index bb36c96..a569b53 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -26,6 +26,8 @@
 #include <spd_sdram.h>
 #include <i2c.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define BOOT_SMALL_FLASH	32	/* 00100000 */
 #define FLASH_ONBD_N		2	/* 00000010 */
 #define FLASH_SRAM_SEL		1	/* 00000001 */
@@ -107,7 +109,7 @@ long int initdram (int board_type)
 	long dram_size = 0;
 
 #if defined(CONFIG_SPD_EEPROM)
-	dram_size = spd_sdram (0);
+	dram_size = spd_sdram ();
 #else
 	dram_size = fixed_sdram ();
 #endif
@@ -238,8 +240,6 @@ int pci_pre_init(struct pci_controller * hose )
 #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
 void pci_target_init(struct pci_controller * hose )
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/*--------------------------------------------------------------------------+
 	 * Disable everything
 	 *--------------------------------------------------------------------------*/
diff --git a/board/xsengine/xsengine.c b/board/xsengine/xsengine.c
index a9919db..23d56c4 100644
--- a/board/xsengine/xsengine.c
+++ b/board/xsengine/xsengine.c
@@ -27,14 +27,14 @@
 
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*
  * Miscelaneous platform dependent initialisations
  */
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -56,8 +56,6 @@ int board_post_init (void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
diff --git a/board/zylonite/zylonite.c b/board/zylonite/zylonite.c
index e618ab9..5829170 100644
--- a/board/zylonite/zylonite.c
+++ b/board/zylonite/zylonite.c
@@ -27,8 +27,7 @@
 
 #include <common.h>
 
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -36,8 +35,6 @@
 
 int board_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	/* memory and cpu-speed are setup before relocation */
 	/* so we do _nothing_ here */
 
@@ -60,8 +57,6 @@ int board_late_init(void)
 
 int dram_init (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
author	Kumar Gala <galak@kernel.crashing.org>	2006-04-20 12:25:10 -0500
committer	Kumar Gala <galak@kernel.crashing.org>	2006-04-20 12:25:10 -0500
commit	b86d7622b33892b1dafe761a7a9eaeeab9f3816b (patch)
tree	56b1b6fc978166abce4afa8e9dee0af94bfc3cd6 /board
parent	f8edca2e9a128f526b1fe6f997f7adb852cf5b3c (diff)
parent	56a4a63c106cc317fc0fe42686a99416fc469f5b (diff)
download	u-boot-imx-b86d7622b33892b1dafe761a7a9eaeeab9f3816b.zip u-boot-imx-b86d7622b33892b1dafe761a7a9eaeeab9f3816b.tar.gz u-boot-imx-b86d7622b33892b1dafe761a7a9eaeeab9f3816b.tar.bz2