diff options
author | Stefan Roese <sr@denx.de> | 2008-01-17 16:04:12 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2008-01-17 16:04:12 +0100 |
commit | 9cfff9e9d4d9dbb9bb428cea3fa2cda3b3e593ad (patch) | |
tree | 7e3e5036eef33672f6c40c5f6aca68f34f5b3a31 /board | |
parent | 3259eeaa4148125a81417477f62c05bd67f60587 (diff) | |
parent | 4c9e98ace78e7de972adf7da7135a46ec0a4ee7e (diff) | |
download | u-boot-imx-9cfff9e9d4d9dbb9bb428cea3fa2cda3b3e593ad.zip u-boot-imx-9cfff9e9d4d9dbb9bb428cea3fa2cda3b3e593ad.tar.gz u-boot-imx-9cfff9e9d4d9dbb9bb428cea3fa2cda3b3e593ad.tar.bz2 |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/common/Makefile | 15 | ||||
-rw-r--r-- | board/freescale/common/fsl_diu_fb.c | 3 | ||||
-rw-r--r-- | board/freescale/common/pixis.c | 218 | ||||
-rw-r--r-- | board/freescale/common/pq-mds-pib.c | 3 | ||||
-rw-r--r-- | board/freescale/common/sys_eeprom.c | 2 | ||||
-rw-r--r-- | board/freescale/mpc8313erdb/Makefile | 2 | ||||
-rw-r--r-- | board/freescale/mpc8315erdb/Makefile | 50 | ||||
-rw-r--r-- | board/freescale/mpc8315erdb/config.mk | 1 | ||||
-rw-r--r-- | board/freescale/mpc8315erdb/mpc8315erdb.c | 132 | ||||
-rw-r--r-- | board/freescale/mpc8315erdb/sdram.c | 120 | ||||
-rw-r--r-- | board/freescale/mpc8349itx/Makefile | 2 | ||||
-rw-r--r-- | board/freescale/mpc8360emds/mpc8360emds.c | 34 | ||||
-rw-r--r-- | board/freescale/mpc837xerdb/Makefile | 50 | ||||
-rw-r--r-- | board/freescale/mpc837xerdb/config.mk | 28 | ||||
-rw-r--r-- | board/freescale/mpc837xerdb/mpc837xerdb.c | 150 | ||||
-rw-r--r-- | board/freescale/mpc837xerdb/pci.c | 59 | ||||
-rw-r--r-- | board/freescale/mpc8610hpcd/Makefile | 12 |
17 files changed, 732 insertions, 149 deletions
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 9cee9f1..6665e7f 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -29,14 +29,13 @@ endif LIB = $(obj)lib$(VENDOR).a -COBJS := sys_eeprom.o \ - pixis.o \ - pq-mds-pib.o \ - fsl_logo_bmp.o \ - fsl_diu_fb.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) +COBJS-${CONFIG_PQ_MDS_PIB} += pq-mds-pib.o +COBJS-${CONFIG_ID_EEPROM} += sys_eeprom.o +COBJS-${CONFIG_FSL_DIU_FB} += fsl_diu_fb.o fsl_logo_bmp.o +COBJS-${CONFIG_FSL_PIXIS} += pixis.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS)) $(LIB): $(obj).depend $(OBJS) diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c index 5a8576e..2336f6b 100644 --- a/board/freescale/common/fsl_diu_fb.c +++ b/board/freescale/common/fsl_diu_fb.c @@ -27,8 +27,6 @@ #include <i2c.h> #include <malloc.h> -#ifdef CONFIG_FSL_DIU_FB - #include "fsl_diu_fb.h" #ifdef DEBUG @@ -615,4 +613,3 @@ void fsl_diu_clear_screen(void) memset(info->screen_base, 0, info->smem_len); } -#endif /* CONFIG_FSL_DIU_FB */ diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index 45dcf4d..bff6a82 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -25,9 +25,8 @@ #include <common.h> #include <command.h> #include <watchdog.h> - -#ifdef CONFIG_FSL_PIXIS #include <asm/cache.h> + #include "pixis.h" @@ -184,7 +183,7 @@ int set_px_corepll(ulong corepll) void read_from_px_regs(int set) { - u8 mask = 0x1C; + u8 mask = 0x1C; /* COREPLL, MPXPLL, SYSCLK controlled by PIXIS */ u8 tmp = in8(PIXIS_BASE + PIXIS_VCFGEN0); if (set) @@ -197,7 +196,7 @@ void read_from_px_regs(int set) void read_from_px_regs_altbank(int set) { - u8 mask = 0x04; + u8 mask = 0x04; /* FLASHBANK and FLASHMAP controlled by PIXIS */ u8 tmp = in8(PIXIS_BASE + PIXIS_VCFGEN1); if (set) @@ -208,15 +207,26 @@ void read_from_px_regs_altbank(int set) } #ifndef CFG_PIXIS_VBOOT_MASK -#define CFG_PIXIS_VBOOT_MASK 0x40 +#define CFG_PIXIS_VBOOT_MASK (0x40) #endif +void clear_altbank(void) +{ + u8 tmp; + + tmp = in8(PIXIS_BASE + PIXIS_VBOOT); + tmp &= ~CFG_PIXIS_VBOOT_MASK; + + out8(PIXIS_BASE + PIXIS_VBOOT, tmp); +} + + void set_altbank(void) { u8 tmp; tmp = in8(PIXIS_BASE + PIXIS_VBOOT); - tmp ^= CFG_PIXIS_VBOOT_MASK; + tmp |= CFG_PIXIS_VBOOT_MASK; out8(PIXIS_BASE + PIXIS_VBOOT, tmp); } @@ -227,11 +237,11 @@ void set_px_go(void) u8 tmp; tmp = in8(PIXIS_BASE + PIXIS_VCTL); - tmp = tmp & 0x1E; + tmp = tmp & 0x1E; /* clear GO bit */ out8(PIXIS_BASE + PIXIS_VCTL, tmp); tmp = in8(PIXIS_BASE + PIXIS_VCTL); - tmp = tmp | 0x01; + tmp = tmp | 0x01; /* set GO bit - start reset sequencer */ out8(PIXIS_BASE + PIXIS_VCTL, tmp); } @@ -293,7 +303,7 @@ static ulong strfractoint(uchar *strptr) * simply create the intarr. */ i = 0; - while (strptr[i] != 46) { + while (strptr[i] != '.') { if (strptr[i] == 0) { no_dec = 1; break; @@ -313,7 +323,7 @@ static ulong strfractoint(uchar *strptr) } else { j = 0; i++; /* Skipping the decimal point */ - while ((strptr[i] > 47) && (strptr[i] < 58)) { + while ((strptr[i] >= '0') && (strptr[i] <= '9')) { decarr[j] = strptr[i]; i++; j++; @@ -340,8 +350,14 @@ static ulong strfractoint(uchar *strptr) int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - ulong val; - ulong corepll; + unsigned int i; + char *p_cf = NULL; + char *p_cf_sysclk = NULL; + char *p_cf_corepll = NULL; + char *p_cf_mpxpll = NULL; + char *p_altbank = NULL; + char *p_wd = NULL; + unsigned int unknown_param = 0; /* * No args is a simple reset request. @@ -351,116 +367,97 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* not reached */ } - if (strcmp(argv[1], "cf") == 0) { + for (i = 1; i < argc; i++) { + if (strcmp(argv[i], "cf") == 0) { + p_cf = argv[i]; + if (i + 3 >= argc) { + break; + } + p_cf_sysclk = argv[i+1]; + p_cf_corepll = argv[i+2]; + p_cf_mpxpll = argv[i+3]; + i += 3; + continue; + } - /* - * Reset with frequency changed: - * cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> - */ - if (argc < 5) { - puts(cmdtp->usage); - return 1; + if (strcmp(argv[i], "altbank") == 0) { + p_altbank = argv[i]; + continue; } - read_from_px_regs(0); - - val = set_px_sysclk(simple_strtoul(argv[2], NULL, 10)); - - corepll = strfractoint((uchar *)argv[3]); - val = val + set_px_corepll(corepll); - val = val + set_px_mpxpll(simple_strtoul(argv[4], NULL, 10)); - if (val == 3) { - puts("Setting registers VCFGEN0 and VCTL\n"); - read_from_px_regs(1); - puts("Resetting board with values from "); - puts("VSPEED0, VSPEED1, VCLKH, and VCLKL \n"); - set_px_go(); - } else { - puts(cmdtp->usage); - return 1; + if (strcmp(argv[i], "wd") == 0) { + p_wd = argv[i]; + continue; } - while (1) ; /* Not reached */ - - } else if (strcmp(argv[1], "altbank") == 0) { - - /* - * Reset using alternate flash bank: - */ - if (argv[2] == 0) { - /* - * Reset from alternate bank without changing - * frequency and without watchdog timer enabled. - * altbank - */ - read_from_px_regs(0); - read_from_px_regs_altbank(0); - if (argc > 2) { - puts(cmdtp->usage); - return 1; - } - puts("Setting registers VCFGNE1, VBOOT, and VCTL\n"); - set_altbank(); - read_from_px_regs_altbank(1); - puts("Resetting board to boot from the other bank.\n"); - set_px_go(); - - } else if (strcmp(argv[2], "cf") == 0) { - /* - * Reset with frequency changed - * altbank cf <SYSCLK freq> <COREPLL ratio> - * <MPXPLL ratio> - */ - read_from_px_regs(0); - read_from_px_regs_altbank(0); - val = set_px_sysclk(simple_strtoul(argv[3], NULL, 10)); - corepll = strfractoint((uchar *)argv[4]); - val = val + set_px_corepll(corepll); - val = val + set_px_mpxpll(simple_strtoul(argv[5], - NULL, 10)); - if (val == 3) { - puts("Setting registers VCFGEN0, VCFGEN1, VBOOT, and VCTL\n"); - set_altbank(); - read_from_px_regs(1); - read_from_px_regs_altbank(1); - puts("Enabling watchdog timer on the FPGA\n"); - puts("Resetting board with values from "); - puts("VSPEED0, VSPEED1, VCLKH and VCLKL "); - puts("to boot from the other bank.\n"); - set_px_go_with_watchdog(); - } else { - puts(cmdtp->usage); - return 1; - } + unknown_param = 1; + } - while (1) ; /* Not reached */ - - } else if (strcmp(argv[2], "wd") == 0) { - /* - * Reset from alternate bank without changing - * frequencies but with watchdog timer enabled: - * altbank wd - */ - read_from_px_regs(0); - read_from_px_regs_altbank(0); - puts("Setting registers VCFGEN1, VBOOT, and VCTL\n"); - set_altbank(); - read_from_px_regs_altbank(1); - puts("Enabling watchdog timer on the FPGA\n"); - puts("Resetting board to boot from the other bank.\n"); - set_px_go_with_watchdog(); - while (1) ; /* Not reached */ - - } else { - puts(cmdtp->usage); + /* + * Check that cf has all required parms + */ + if ((p_cf && !(p_cf_sysclk && p_cf_corepll && p_cf_mpxpll)) + || unknown_param) { + puts(cmdtp->help); + return 1; + } + + /* + * PIXIS seems to be sensitive to the ordering of + * the registers that are touched. + */ + read_from_px_regs(0); + + if (p_altbank) { + read_from_px_regs_altbank(0); + } + clear_altbank(); + + /* + * Clock configuration specified. + */ + if (p_cf) { + unsigned long sysclk; + unsigned long corepll; + unsigned long mpxpll; + + sysclk = simple_strtoul(p_cf_sysclk, NULL, 10); + corepll = strfractoint((uchar *) p_cf_corepll); + mpxpll = simple_strtoul(p_cf_mpxpll, NULL, 10); + + if (!(set_px_sysclk(sysclk) + && set_px_corepll(corepll) + && set_px_mpxpll(mpxpll))) { + puts(cmdtp->help); return 1; } + read_from_px_regs(1); + } + + /* + * Altbank specified + * + * NOTE CHANGE IN BEHAVIOR: previous code would default + * to enabling watchdog if altbank is specified. + * Now the watchdog must be enabled explicitly using 'wd'. + */ + if (p_altbank) { + set_altbank(); + read_from_px_regs_altbank(1); + } + /* + * Reset with watchdog specified. + */ + if (p_wd) { + set_px_go_with_watchdog(); } else { - puts(cmdtp->usage); - return 1; + set_px_go(); } + /* + * Shouldn't be reached. + */ return 0; } @@ -474,4 +471,3 @@ U_BOOT_CMD( " pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n" " pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n" ); -#endif /* CONFIG_FSL_PIXIS */ diff --git a/board/freescale/common/pq-mds-pib.c b/board/freescale/common/pq-mds-pib.c index e4f96e8..6c72aa1 100644 --- a/board/freescale/common/pq-mds-pib.c +++ b/board/freescale/common/pq-mds-pib.c @@ -12,8 +12,6 @@ #include <i2c.h> #include <asm/io.h> -#ifdef CONFIG_PQ_MDS_PIB - #include "pq-mds-pib.h" int pib_init(void) @@ -102,4 +100,3 @@ int pib_init(void) i2c_set_bus_num(orig_i2c_bus); return 0; } -#endif /* CONFIG_PQ_MDS_PIB */ diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 7bc663b..bb91e67 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -27,7 +27,6 @@ #include <i2c.h> #include <linux/ctype.h> -#ifdef CFG_ID_EEPROM typedef struct { unsigned char id[4]; /* 0x0000 - 0x0003 */ unsigned char sn[12]; /* 0x0004 - 0x000F */ @@ -253,4 +252,3 @@ int mac_read_from_eeprom(void) } return 0; } -#endif /* CFG_ID_EEPROM */ diff --git a/board/freescale/mpc8313erdb/Makefile b/board/freescale/mpc8313erdb/Makefile index a987e510..e97ba81 100644 --- a/board/freescale/mpc8313erdb/Makefile +++ b/board/freescale/mpc8313erdb/Makefile @@ -32,7 +32,7 @@ OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) $(LIB): $(obj).depend $(OBJS) - $(AR) crv $@ $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/freescale/mpc8315erdb/Makefile b/board/freescale/mpc8315erdb/Makefile new file mode 100644 index 0000000..e97ba81 --- /dev/null +++ b/board/freescale/mpc8315erdb/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o sdram.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/freescale/mpc8315erdb/config.mk b/board/freescale/mpc8315erdb/config.mk new file mode 100644 index 0000000..f768264 --- /dev/null +++ b/board/freescale/mpc8315erdb/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0xFE000000 diff --git a/board/freescale/mpc8315erdb/mpc8315erdb.c b/board/freescale/mpc8315erdb/mpc8315erdb.c new file mode 100644 index 0000000..7af36dd --- /dev/null +++ b/board/freescale/mpc8315erdb/mpc8315erdb.c @@ -0,0 +1,132 @@ +/* + * Copyright (C) 2007 Freescale Semiconductor, Inc. + * + * Author: Scott Wood <scottwood@freescale.com> + * Dave Liu <daveliu@freescale.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <i2c.h> +#if defined(CONFIG_OF_LIBFDT) +#include <libfdt.h> +#endif +#include <pci.h> +#include <mpc83xx.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + volatile immap_t *im = (immap_t *)CFG_IMMR; + + if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) + gd->flags |= GD_FLG_SILENT; + + return 0; +} + +static u8 read_board_info(void) +{ + u8 val8; + i2c_set_bus_num(0); + + if (i2c_read(CFG_I2C_PCF8574A_ADDR, 0, 0, &val8, 1) == 0) + return val8; + else + return 0; +} + +int checkboard(void) +{ + static const char * const rev_str[] = { + "0.0", + "0.1", + "1.0", + "1.1", + "<unknown>", + }; + u8 info; + int i; + + info = read_board_info(); + i = (!info) ? 4: info & 0x03; + + printf("Board: Freescale MPC8315ERDB Rev %s\n", rev_str[i]); + + return 0; +} + +static struct pci_region pci_regions[] = { + { + bus_start: CFG_PCI_MEM_BASE, + phys_start: CFG_PCI_MEM_PHYS, + size: CFG_PCI_MEM_SIZE, + flags: PCI_REGION_MEM | PCI_REGION_PREFETCH + }, + { + bus_start: CFG_PCI_MMIO_BASE, + phys_start: CFG_PCI_MMIO_PHYS, + size: CFG_PCI_MMIO_SIZE, + flags: PCI_REGION_MEM + }, + { + bus_start: CFG_PCI_IO_BASE, + phys_start: CFG_PCI_IO_PHYS, + size: CFG_PCI_IO_SIZE, + flags: PCI_REGION_IO + } +}; + +void pci_init_board(void) +{ + volatile immap_t *immr = (volatile immap_t *)CFG_IMMR; + volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; + volatile law83xx_t *pci_law = immr->sysconf.pcilaw; + struct pci_region *reg[] = { pci_regions }; + int warmboot; + + /* Enable all 3 PCI_CLK_OUTPUTs. */ + clk->occr |= 0xe0000000; + + /* + * Configure PCI Local Access Windows + */ + pci_law[0].bar = CFG_PCI_MEM_PHYS & LAWBAR_BAR; + pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB; + + pci_law[1].bar = CFG_PCI_IO_PHYS & LAWBAR_BAR; + pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB; + + warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM; + warmboot |= immr->pmc.pmccr1 & PMCCR1_POWER_OFF; + + mpc83xx_pci_init(1, reg, warmboot); +} + +#if defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); +#ifdef CONFIG_PCI + ft_pci_setup(blob, bd); +#endif +} +#endif diff --git a/board/freescale/mpc8315erdb/sdram.c b/board/freescale/mpc8315erdb/sdram.c new file mode 100644 index 0000000..f97e3c7 --- /dev/null +++ b/board/freescale/mpc8315erdb/sdram.c @@ -0,0 +1,120 @@ +/* + * Copyright (C) 2007 Freescale Semiconductor, Inc. + * + * Authors: Nick.Spence@freescale.com + * Wilson.Lo@freescale.com + * scottwood@freescale.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc83xx.h> +#include <spd_sdram.h> + +#include <asm/bitops.h> +#include <asm/io.h> + +#include <asm/processor.h> + +DECLARE_GLOBAL_DATA_PTR; + +static void resume_from_sleep(void) +{ + u32 magic = *(u32 *)0; + + typedef void (*func_t)(void); + func_t resume = *(func_t *)4; + + if (magic == 0xf5153ae5) + resume(); + + gd->flags &= ~GD_FLG_SILENT; + puts("\nResume from sleep failed: bad magic word\n"); +} + +/* Fixed sdram init -- doesn't use serial presence detect. + * + * This is useful for faster booting in configs where the RAM is unlikely + * to be changed, or for things like NAND booting where space is tight. + */ +static long fixed_sdram(void) +{ + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; + u32 msize = CFG_DDR_SIZE * 1024 * 1024; + u32 msize_log2 = __ilog2(msize); + + im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12; + im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); + im->sysconf.ddrcdr = CFG_DDRCDR_VALUE; + + /* + * Erratum DDR3 requires a 50ms delay after clearing DDRCDR[DDR_cfg], + * or the DDR2 controller may fail to initialize correctly. + */ + udelay(50000); + + im->ddr.csbnds[0].csbnds = (msize - 1) >> 24; + im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG; + + /* Currently we use only one CS, so disable the other bank. */ + im->ddr.cs_config[1] = 0; + + im->ddr.sdram_clk_cntl = CFG_DDR_SDRAM_CLK_CNTL; + im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3; + im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1; + im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2; + im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0; + + if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) + im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG | SDRAM_CFG_BI; + else + im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG; + + im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2; + im->ddr.sdram_mode = CFG_DDR_MODE; + im->ddr.sdram_mode2 = CFG_DDR_MODE2; + + im->ddr.sdram_interval = CFG_DDR_INTERVAL; + sync(); + + /* enable DDR controller */ + im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN; + sync(); + + return msize; +} + +long int initdram(int board_type) +{ + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; + u32 msize; + + if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) + return -1; + + /* DDR SDRAM */ + msize = fixed_sdram(); + + if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) + resume_from_sleep(); + + /* return total bus SDRAM size(bytes) -- DDR */ + return msize; +} diff --git a/board/freescale/mpc8349itx/Makefile b/board/freescale/mpc8349itx/Makefile index 31bcdb8..265e341 100644 --- a/board/freescale/mpc8349itx/Makefile +++ b/board/freescale/mpc8349itx/Makefile @@ -31,7 +31,7 @@ OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) $(LIB): $(obj).depend $(OBJS) - $(AR) crv $@ $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c index 2fcef8b..f909a33 100644 --- a/board/freescale/mpc8360emds/mpc8360emds.c +++ b/board/freescale/mpc8360emds/mpc8360emds.c @@ -316,30 +316,36 @@ void ft_board_setup(void *blob, bd_t *bd) immr->sysconf.spridr == SPR_8360E_REV21) { int nodeoffset; const char *prop; - const char *path; + int path; - nodeoffset = fdt_path_offset(fdt, "/aliases"); + nodeoffset = fdt_path_offset(blob, "/aliases"); if (nodeoffset >= 0) { #if defined(CONFIG_HAS_ETH0) /* fixup UCC 1 if using rgmii-id mode */ - path = fdt_getprop(blob, nodeoffset, "ethernet0", NULL); - if (path) { - prop = fdt_getprop(blob, nodeoffset, - "phy-connection-type", 0); + prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL); + if (prop) { + path = fdt_path_offset(blob, prop); + prop = fdt_getprop(blob, path, + "phy-connection-type", 0); if (prop && (strcmp(prop, "rgmii-id") == 0)) - fdt_setprop(blob, nodeoffset, "phy-connection-type", - "rgmii-rxid", sizeof("rgmii-rxid")); + fdt_setprop(blob, path, + "phy-connection-type", + "rgmii-rxid", + sizeof("rgmii-rxid")); } #endif #if defined(CONFIG_HAS_ETH1) /* fixup UCC 2 if using rgmii-id mode */ - path = fdt_getprop(blob, nodeoffset, "ethernet1", NULL); - if (path) { - prop = fdt_getprop(blob, nodeoffset, - "phy-connection-type", 0); + prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL); + if (prop) { + path = fdt_path_offset(blob, prop); + prop = fdt_getprop(blob, path, + "phy-connection-type", 0); if (prop && (strcmp(prop, "rgmii-id") == 0)) - fdt_setprop(blob, nodeoffset, "phy-connection-type", - "rgmii-rxid", sizeof("rgmii-rxid")); + fdt_setprop(blob, path, + "phy-connection-type", + "rgmii-rxid", + sizeof("rgmii-rxid")); } #endif } diff --git a/board/freescale/mpc837xerdb/Makefile b/board/freescale/mpc837xerdb/Makefile new file mode 100644 index 0000000..5ec7a87 --- /dev/null +++ b/board/freescale/mpc837xerdb/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o pci.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/freescale/mpc837xerdb/config.mk b/board/freescale/mpc837xerdb/config.mk new file mode 100644 index 0000000..5675f81 --- /dev/null +++ b/board/freescale/mpc837xerdb/config.mk @@ -0,0 +1,28 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# MPC837xERDB +# + +TEXT_BASE = 0xFE000000 diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c new file mode 100644 index 0000000..2d42595 --- /dev/null +++ b/board/freescale/mpc837xerdb/mpc837xerdb.c @@ -0,0 +1,150 @@ +/* + * Copyright (C) 2007 Freescale Semiconductor, Inc. + * Kevin Lam <kevin.lam@freescale.com> + * Joe D'Abbraccio <joe.d'abbraccio@freescale.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include <common.h> +#include <i2c.h> +#include <spd.h> +#include <asm/io.h> +#if defined(CONFIG_SPD_EEPROM) +#include <spd_sdram.h> +#endif + +#if defined(CFG_DRAM_TEST) +int +testdram(void) +{ + uint *pstart = (uint *) CFG_MEMTEST_START; + uint *pend = (uint *) CFG_MEMTEST_END; + uint *p; + + printf("Testing DRAM from 0x%08x to 0x%08x\n", + CFG_MEMTEST_START, + CFG_MEMTEST_END); + + printf("DRAM test phase 1:\n"); + for (p = pstart; p < pend; p++) + *p = 0xaaaaaaaa; + + for (p = pstart; p < pend; p++) { + if (*p != 0xaaaaaaaa) { + printf("DRAM test fails at: %08x\n", (uint) p); + return 1; + } + } + + printf("DRAM test phase 2:\n"); + for (p = pstart; p < pend; p++) + *p = 0x55555555; + + for (p = pstart; p < pend; p++) { + if (*p != 0x55555555) { + printf("DRAM test fails at: %08x\n", (uint) p); + return 1; + } + } + + printf("DRAM test passed.\n"); + return 0; +} +#endif + +int board_early_init_f(void) +{ + return 0; +} + +#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC) +void ddr_enable_ecc(unsigned int dram_size); +#endif +int fixed_sdram(void); + +long int initdram(int board_type) +{ + immap_t *im = (immap_t *) CFG_IMMR; + u32 msize = 0; + + if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) + return -1; + +#if defined(CONFIG_SPD_EEPROM) + msize = spd_sdram(); +#else + msize = fixed_sdram(); +#endif + +#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC) + /* Initialize DDR ECC byte */ + ddr_enable_ecc(msize * 1024 * 1024); +#endif + /* return total bus DDR size(bytes) */ + return (msize * 1024 * 1024); +} + +#if !defined(CONFIG_SPD_EEPROM) +/************************************************************************* + * fixed sdram init -- doesn't use serial presence detect. + ************************************************************************/ +int fixed_sdram(void) +{ + immap_t *im = (immap_t *) CFG_IMMR; + u32 msize = CFG_DDR_SIZE * 1024 * 1024; + u32 msize_log2 = __ilog2(msize); + + im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12; + im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); + + im->sysconf.ddrcdr = CFG_DDRCDR_VALUE; + udelay(50000); + + im->ddr.sdram_clk_cntl = CFG_DDR_SDRAM_CLK_CNTL; + udelay(1000); + + im->ddr.csbnds[0].csbnds = CFG_DDR_CS0_BNDS; + im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG; + udelay(1000); + + im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0; + im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1; + im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2; + im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3; + im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG; + im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2; + im->ddr.sdram_mode = CFG_DDR_MODE; + im->ddr.sdram_mode2 = CFG_DDR_MODE2; + im->ddr.sdram_interval = CFG_DDR_INTERVAL; + sync(); + udelay(1000); + + im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN; + udelay(2000); + return CFG_DDR_SIZE; +} +#endif /*!CFG_SPD_EEPROM */ + +int checkboard(void) +{ + puts("Board: Freescale MPC837xERDB\n"); + return 0; +} + +#if defined(CONFIG_OF_BOARD_SETUP) + +void ft_board_setup(void *blob, bd_t *bd) +{ +#ifdef CONFIG_PCI + ft_pci_setup(blob, bd); +#endif + ft_cpu_setup(blob, bd); +} +#endif /* CONFIG_OF_BOARD_SETUP */ diff --git a/board/freescale/mpc837xerdb/pci.c b/board/freescale/mpc837xerdb/pci.c new file mode 100644 index 0000000..26e7320 --- /dev/null +++ b/board/freescale/mpc837xerdb/pci.c @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2007 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include <common.h> +#include <mpc83xx.h> +#include <pci.h> + +#if defined(CONFIG_PCI) +static struct pci_region pci_regions[] = { + { + bus_start: CFG_PCI_MEM_BASE, + phys_start: CFG_PCI_MEM_PHYS, + size: CFG_PCI_MEM_SIZE, + flags: PCI_REGION_MEM | PCI_REGION_PREFETCH + }, + { + bus_start: CFG_PCI_MMIO_BASE, + phys_start: CFG_PCI_MMIO_PHYS, + size: CFG_PCI_MMIO_SIZE, + flags: PCI_REGION_MEM + }, + { + bus_start: CFG_PCI_IO_BASE, + phys_start: CFG_PCI_IO_PHYS, + size: CFG_PCI_IO_SIZE, + flags: PCI_REGION_IO + } +}; + +void pci_init_board(void) +{ + volatile immap_t *immr = (volatile immap_t *)CFG_IMMR; + volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; + volatile law83xx_t *pci_law = immr->sysconf.pcilaw; + struct pci_region *reg[] = { pci_regions }; + + /* Enable all 5 PCI_CLK_OUTPUTS */ + clk->occr |= 0xf8000000; + udelay(2000); + + /* Configure PCI Local Access Windows */ + pci_law[0].bar = CFG_PCI_MEM_PHYS & LAWBAR_BAR; + pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB; + + pci_law[1].bar = CFG_PCI_IO_PHYS & LAWBAR_BAR; + pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB; + + mpc83xx_pci_init(1, reg, 0); +} +#endif /* CONFIG_PCI */ diff --git a/board/freescale/mpc8610hpcd/Makefile b/board/freescale/mpc8610hpcd/Makefile index 76087c1..12a92ae 100644 --- a/board/freescale/mpc8610hpcd/Makefile +++ b/board/freescale/mpc8610hpcd/Makefile @@ -27,14 +27,14 @@ endif LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o \ - ../common/sys_eeprom.o \ - ../common/pixis.o \ - mpc8610hpcd_diu.o \ - ../common/fsl_diu_fb.o - SOBJS := init.o +COBJS := $(BOARD).o + +COBJS-${CONFIG_FSL_DIU_FB} += mpc8610hpcd_diu.o + +COBJS += ${COBJS-y} + SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) |