Merged MPC8349ADS and MPC8349EMDS ports into MPC8349EMDS port:

  - Removed MPC8349ADS port
  - Added PCI support to MPC8349ADS
  - reworked memory map to allow mapping of all regions with BATs
  Patch by Kumar Gala 20 Apr 2006

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

6 files changed, 10 insertions, 474 deletions

diff --git a/board/mpc8349ads/Makefile b/board/mpc8349ads/Makefile
deleted file mode 100644
index f865f9c..0000000
--- a/board/mpc8349ads/Makefile
+++ /dev/null
@@ -1,45 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= lib$(BOARD).a
-
-OBJS	:= $(BOARD).o pci.o
-
-$(LIB):	$(OBJS) $(SOBJS)
-	$(AR) crv $@ $(OBJS)
-
-clean:
-	rm -f $(SOBJS) $(OBJS)
-
-distclean:	clean
-	rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
-		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/mpc8349ads/config.mk b/board/mpc8349ads/config.mk
deleted file mode 100644
index 4602169..0000000
--- a/board/mpc8349ads/config.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC83xxADS
-#
-
-TEXT_BASE  =   0xFE700000
diff --git a/board/mpc8349ads/mpc8349ads.c b/board/mpc8349ads/mpc8349ads.c
deleted file mode 100644
index 9841298..0000000
--- a/board/mpc8349ads/mpc8349ads.c
+++ /dev/null
@@ -1,235 +0,0 @@
-/*
- * Copyright Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Change log:
- * 20050101: Eran Liberty (liberty@freescale.com)
- *           Initial file creating (porting from 85XX & 8260)
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc83xx.h>
-#include <asm/mpc8349_pci.h>
-#include <i2c.h>
-#include <spd.h>
-#include <miiphy.h>
-#if defined(CONFIG_PCI)
-#include <pci.h>
-#endif
-#if defined(CONFIG_SPD_EEPROM)
-#include <spd_sdram.h>
-#endif
-int fixed_sdram(void);
-void sdram_init(void);
-
-int board_early_init_f (void)
-{
-	volatile u8* bcsr = (volatile u8*)CFG_BCSR;
-
-	/* Enable flash write */
-	bcsr[1] &= ~0x01;
-
-	return 0;
-}
-
-
-#define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1)
-
-long int initdram (int board_type)
-{
-	volatile immap_t *im = (immap_t *)CFG_IMMRBAR;
-	u32 msize = 0;
-
-	if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
-		return -1;
-
-	/* DDR SDRAM - Main SODIMM */
-	im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
-#if defined(CONFIG_SPD_EEPROM)
-	msize = spd_sdram();
-#else
-	msize = fixed_sdram();
-#endif
-	/*
-	 * Initialize SDRAM if it is on local bus.
-	 */
-	sdram_init();
-	puts("   DDR RAM: ");
-	/* return total bus SDRAM size(bytes)  -- DDR */
-	return (msize * 1024 * 1024);
-}
-
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- *  fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-int fixed_sdram(void)
-{
-	volatile immap_t *im = (immap_t *)CFG_IMMRBAR;
-	u32 msize = 0;
-	u32 ddr_size;
-	u32 ddr_size_log2;
-
-	msize = CFG_DDR_SIZE;
-	for (ddr_size = msize << 20, ddr_size_log2 = 0;
-	     (ddr_size > 1);
-	     ddr_size = ddr_size>>1, ddr_size_log2++) {
-		if (ddr_size & 1) {
-			return -1;
-		}
-	}
-	im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
-#if (CFG_DDR_SIZE != 256)
-#warning Currenly any ddr size other than 256 is not supported
-#endif
-
-	im->ddr.csbnds[0].csbnds = 0x00100017;
-	im->ddr.csbnds[1].csbnds = 0x0018001f;
-	im->ddr.csbnds[2].csbnds = 0x00000007;
-	im->ddr.csbnds[3].csbnds = 0x0008000f;
-	im->ddr.cs_config[0] = CFG_DDR_CONFIG;
-	im->ddr.cs_config[1] = CFG_DDR_CONFIG;
-	im->ddr.cs_config[2] = CFG_DDR_CONFIG;
-	im->ddr.cs_config[3] = CFG_DDR_CONFIG;
-	im->ddr.timing_cfg_1 =
-		3 << TIMING_CFG1_PRETOACT_SHIFT |
-		7 << TIMING_CFG1_ACTTOPRE_SHIFT |
-		3 << TIMING_CFG1_ACTTORW_SHIFT  |
-		4 << TIMING_CFG1_CASLAT_SHIFT   |
-		3 << TIMING_CFG1_REFREC_SHIFT   |
-		3 << TIMING_CFG1_WRREC_SHIFT    |
-		2 << TIMING_CFG1_ACTTOACT_SHIFT |
-		1 << TIMING_CFG1_WRTORD_SHIFT;
-	im->ddr.timing_cfg_2 = 2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT;
-	im->ddr.sdram_cfg =
-		SDRAM_CFG_SREN
-#if defined(CONFIG_DDR_2T_TIMING)
-		| SDRAM_CFG_2T_EN
-#endif
-		| 2 << SDRAM_CFG_SDRAM_TYPE_SHIFT;
-	im->ddr.sdram_mode =
-		0x2000 << SDRAM_MODE_ESD_SHIFT |
-		0x0162 << SDRAM_MODE_SD_SHIFT;
-
-	im->ddr.sdram_interval = 0x045B << SDRAM_INTERVAL_REFINT_SHIFT |
-		0x0100 << SDRAM_INTERVAL_BSTOPRE_SHIFT;
-	udelay(200);
-
-	im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
-
-	return msize;
-}
-#endif/*!CFG_SPD_EEPROM*/
-
-
-int checkboard (void)
-{
-	puts("Board: Freescale MPC8349ADS\n");
-	return 0;
-}
-
-/*
- * if MPC8349ADS is soldered with SDRAM
- */
-#if defined(CFG_BR2_PRELIM)  \
-	&& defined(CFG_OR2_PRELIM) \
-	&& defined(CFG_LBLAWBAR2_PRELIM) \
-	&& defined(CFG_LBLAWAR2_PRELIM)
-/*
- * Initialize SDRAM memory on the Local Bus.
- */
-
-void
-sdram_init(void)
-{
-	volatile immap_t *immap = (immap_t *)CFG_IMMRBAR;
-	volatile lbus8349_t *lbc= &immap->lbus;
-	uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
-
-	puts("\n   SDRAM on Local Bus: ");
-	print_size (CFG_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
-
-	/*
-	 * Setup SDRAM Base and Option Registers, already done in cpu_init.c
-	 */
-
-	/*setup mtrpt, lsrt and lbcr for LB bus*/
-	lbc->lbcr = CFG_LBC_LBCR;
-	lbc->mrtpr = CFG_LBC_MRTPR;
-	lbc->lsrt = CFG_LBC_LSRT;
-	asm("sync");
-
-	/*
-	 * Configure the SDRAM controller Machine Mode Register.
-	 */
-	lbc->lsdmr = CFG_LBC_LSDMR_5; /* 0x40636733; normal operation*/
-
-	lbc->lsdmr = CFG_LBC_LSDMR_1; /*0x68636733;precharge all the banks*/
-	asm("sync");
-	*sdram_addr = 0xff;
-	udelay(100);
-
-	lbc->lsdmr = CFG_LBC_LSDMR_2;/*0x48636733;auto refresh*/
-	asm("sync");
-	/*1 times*/
-	*sdram_addr = 0xff;
-	udelay(100);
-	/*2 times*/
-	*sdram_addr = 0xff;
-	udelay(100);
-	/*3 times*/
-	*sdram_addr = 0xff;
-	udelay(100);
-	/*4 times*/
-	*sdram_addr = 0xff;
-	udelay(100);
-	/*5 times*/
-	*sdram_addr = 0xff;
-	udelay(100);
-	/*6 times*/
-	*sdram_addr = 0xff;
-	udelay(100);
-	/*7 times*/
-	*sdram_addr = 0xff;
-	udelay(100);
-	/*8 times*/
-	*sdram_addr = 0xff;
-	udelay(100);
-
-	/* 0x58636733;mode register write operation */
-	lbc->lsdmr = CFG_LBC_LSDMR_4;
-	asm("sync");
-	*sdram_addr = 0xff;
-	udelay(100);
-
-	lbc->lsdmr = CFG_LBC_LSDMR_5; /*0x40636733;normal operation*/
-	asm("sync");
-	*sdram_addr = 0xff;
-	udelay(100);
-}
-#else
-void
-sdram_init(void)
-{
-	put("SDRAM on Local Bus is NOT available!\n");
-}
-#endif
diff --git a/board/mpc8349ads/u-boot.lds b/board/mpc8349ads/u-boot.lds
deleted file mode 100644
index 020cfa6..0000000
--- a/board/mpc8349ads/u-boot.lds
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    cpu/mpc83xx/start.o	(.text)
-    *(.text)
-    *(.fixup)
-    *(.got1)
-    . = ALIGN(16);
-    *(.rodata)
-    *(.rodata1)
-    *(.rodata.str1.4)
-    *(.eh_frame)
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x0FFF) & 0xFFFFF000;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
-  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(4096);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(4096);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
-  _end = . ;
-  PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/mpc8349emds/mpc8349emds.c b/board/mpc8349emds/mpc8349emds.c
index 7ece7db..b5ccb53 100644
--- a/board/mpc8349emds/mpc8349emds.c
+++ b/board/mpc8349emds/mpc8349emds.c
@@ -30,9 +30,6 @@
 #include <spd.h>
 #include <miiphy.h>
 #include <command.h>
-#if defined(CONFIG_PCI)
-#include <pci.h>
-#endif
 #if defined(CONFIG_SPD_EEPROM)
 #include <spd_sdram.h>
 #endif
@@ -50,6 +47,11 @@ int board_early_init_f (void)
 	/* Enable flash write */
 	bcsr[1] &= ~0x01;
 
+#ifdef CFG_USE_MPC834XSYS_USB_PHY
+	/* Use USB PHY on SYS board */
+	bcsr[5] |= 0x02;
+#endif
+
 	return 0;
 }
 
@@ -152,44 +154,6 @@ int checkboard (void)
 	return 0;
 }
 
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI Devices, report devices found
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc8349emds_config_table[] = {
-	{PCI_ANY_ID,PCI_ANY_ID,PCI_ANY_ID,PCI_ANY_ID,
-	pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
-				    PCI_ENET0_MEMADDR,
-				    PCI_COMMON_MEMORY | PCI_COMMAND_MASTER
-	} },
-	{}
-}
-#endif
-
-volatile static struct pci_controller hose[] = {
-	{
-#ifndef CONFIG_PCI_PNP
-	config_table:pci_mpc8349emds_config_table,
-#endif
-	},
-	{
-#ifndef CONFIG_PCI_PNP
-	config_table:pci_mpc8349emds_config_table,
-#endif
-	}
-};
-#endif /* CONFIG_PCI */
-
-void pci_init_board(void)
-{
-#ifdef CONFIG_PCI
-	extern void pci_mpc83xx_init(volatile struct pci_controller *hose);
-
-	pci_mpc83xx_init(hose);
-#endif /* CONFIG_PCI */
-}
-
 /*
  * if MPC8349EMDS is soldered with SDRAM
  */
diff --git a/board/mpc8349ads/pci.c b/board/mpc8349emds/pci.c
index 319e35c..63e4405 100644
--- a/board/mpc8349ads/pci.c
+++ b/board/mpc8349emds/pci.c
@@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CONFIG_PCI_SYS_MEM_PHYS	CFG_SDRAM_BASE
 
 #ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc83xxads_config_table[] = {
+static struct pci_config_table pci_mpc8349emds_config_table[] = {
 	{PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
 	 PCI_IDSEL_NUMBER, PCI_ANY_ID,
  	 pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
@@ -50,12 +50,12 @@ static struct pci_config_table pci_mpc83xxads_config_table[] = {
 static struct pci_controller pci_hose[] = {
        {
 #ifndef CONFIG_PCI_PNP
-       config_table:pci_mpc83xxads_config_table,
+       config_table:pci_mpc8349emds_config_table,
 #endif
        },
        {
 #ifndef CONFIG_PCI_PNP
-       config_table:pci_mpc83xxads_config_table,
+       config_table:pci_mpc8349emds_config_table,
 #endif
        }
 };
@@ -188,7 +188,7 @@ pci_init_board(void)
 	pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
 
 	pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
-	pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_32M;
+	pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
 
 	/*
 	 * Configure PCI Outbound Translation Windows
@@ -378,4 +378,5 @@ pci_init_board(void)
 #endif
 
 }
+
 #endif /* CONFIG_PCI */