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authorRobin Gong <B38343@freescale.com>2012-11-16 09:21:51 +0800
committerRobin Gong <B38343@freescale.com>2012-11-16 14:08:52 +0800
commit3263f7d0a7963bffaeac296ef8a73def3a585627 (patch)
tree54caeba54ef5e4e5193cc41963f1039fe6e742ee /board
parent06e8a025d0d05414eff285a47a31eb8d8a548f68 (diff)
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ENGR00233881 Camera mx6q_sabresd:swap VGEN5&VGEN3 to fix camera streaks issue
On mx6q_sabresd RevC board, there is camera streaks issue, after HW check, they think there is current limit risk because VDDHIGH_IN and camera 2.8V power share the same VGEN5, they suggest seprate them, so we use VGEN5 as VDDHIGH_IN and use VGEN3 as camera 2.8V power supply. Also increase VDDHIG_IN from 2.8V to 3.0V to align with latest datasheet Signed-off-by: Robin Gong <B38343@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/mx6q_sabresd/mx6q_sabresd.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/board/freescale/mx6q_sabresd/mx6q_sabresd.c b/board/freescale/mx6q_sabresd/mx6q_sabresd.c
index 3fa3976..d6b4062 100644
--- a/board/freescale/mx6q_sabresd/mx6q_sabresd.c
+++ b/board/freescale/mx6q_sabresd/mx6q_sabresd.c
@@ -777,6 +777,33 @@ static int setup_pmic_voltages(void)
return -1;
}
printf("Found PFUZE100! deviceid=%x,revid=%x\n", value, rev_id);
+ /*For camera streaks issue,swap VGEN5 and VGEN3 to power camera.
+ *sperate VDDHIGH_IN and camera 2.8V power supply, after switch:
+ *VGEN5 for VDDHIGH_IN and increase to 3V to align with datasheet
+ *VGEN3 for camera 2.8V power supply
+ */
+ /*increase VGEN3 from 2.5 to 2.8V*/
+ if (i2c_read(0x8, 0x6e, 1, &value, 1)) {
+ printf("Read VGEN3 error!\n");
+ return -1;
+ }
+ value &= ~0xf;
+ value |= 0xa;
+ if (i2c_write(0x8, 0x6e, 1, &value, 1)) {
+ printf("Set VGEN3 error!\n");
+ return -1;
+ }
+ /*increase VGEN5 from 2.8 to 3V*/
+ if (i2c_read(0x8, 0x70, 1, &value, 1)) {
+ printf("Read VGEN5 error!\n");
+ return -1;
+ }
+ value &= ~0xf;
+ value |= 0xc;
+ if (i2c_write(0x8, 0x70, 1, &value, 1)) {
+ printf("Set VGEN5 error!\n");
+ return -1;
+ }
#if CONFIG_MX6_INTER_LDO_BYPASS
/*VDDCORE 1.1V@800Mhz: SW1AB*/