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authorLokesh Vutla <lokeshvutla@ti.com>2016-03-04 10:36:41 -0600
committerTom Rini <trini@konsulko.com>2016-03-14 19:18:44 -0400
commitef76ebb1ef7b9b4c72c71b003c6617187e4cd7d9 (patch)
treea09633f36b04fd5b492c7ad3cc8d677fef540801 /board
parent5cd1f6bd7a44e8c3c62a548257bc5ceff61d1691 (diff)
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ARM: keystone2: K2G: Add support for different arm/device speeds
The maximum device and arm speeds can be determined by reading EFUSE_BOOTROM register. As there is already a framework for reading this register, adding support for all possible speeds on k2g devices. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board')
-rw-r--r--board/ti/ks2_evm/board_k2g.c50
1 files changed, 46 insertions, 4 deletions
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index cdeb056..b62c412 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -23,22 +23,64 @@ unsigned int external_clk[ext_clk_count] = {
[uart_clk] = SYS_CLK,
};
-static struct pll_init_data main_pll_config = {MAIN_PLL, 100, 1, 4};
-static struct pll_init_data tetris_pll_config = {TETRIS_PLL, 100, 1, 4};
+static int arm_speeds[DEVSPEED_NUMSPDS] = {
+ SPD400,
+ SPD600,
+ SPD800,
+ SPD900,
+ SPD1000,
+ SPD900,
+ SPD800,
+ SPD600,
+ SPD400,
+ SPD200,
+};
+
+static int dev_speeds[DEVSPEED_NUMSPDS] = {
+ SPD600,
+ SPD800,
+ SPD900,
+ SPD1000,
+ SPD900,
+ SPD800,
+ SPD600,
+ SPD400,
+};
+
+static struct pll_init_data main_pll_config[NUM_SPDS] = {
+ [SPD400] = {MAIN_PLL, 100, 3, 2},
+ [SPD600] = {MAIN_PLL, 300, 6, 2},
+ [SPD800] = {MAIN_PLL, 200, 3, 2},
+ [SPD900] = {TETRIS_PLL, 75, 1, 2},
+ [SPD1000] = {TETRIS_PLL, 250, 3, 2},
+};
+
+static struct pll_init_data tetris_pll_config[NUM_SPDS] = {
+ [SPD200] = {TETRIS_PLL, 250, 3, 10},
+ [SPD400] = {TETRIS_PLL, 100, 1, 6},
+ [SPD600] = {TETRIS_PLL, 100, 1, 4},
+ [SPD800] = {TETRIS_PLL, 400, 3, 4},
+ [SPD900] = {TETRIS_PLL, 75, 1, 2},
+ [SPD1000] = {TETRIS_PLL, 250, 3, 2},
+};
+
static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};
static struct pll_init_data nss_pll_config = {NSS_PLL, 250, 3, 2};
static struct pll_init_data ddr3_pll_config = {DDR3A_PLL, 250, 3, 10};
struct pll_init_data *get_pll_init_data(int pll)
{
+ int speed;
struct pll_init_data *data = NULL;
switch (pll) {
case MAIN_PLL:
- data = &main_pll_config;
+ speed = get_max_dev_speed(dev_speeds);
+ data = &main_pll_config[speed];
break;
case TETRIS_PLL:
- data = &tetris_pll_config;
+ speed = get_max_arm_speed(arm_speeds);
+ data = &tetris_pll_config[speed];
break;
case NSS_PLL:
data = &nss_pll_config;