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| author | Ian Campbell <ijc@hellion.org.uk> | 2014-05-05 11:52:28 +0100 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-05-25 16:25:12 +0200 |
| commit | 5835823da3a357468bc90c2b74bad3193555b918 (patch) | |
| tree | 64be8d3ae9e0dd8e0d69935130ddda0e422e4c96 /board | |
| parent | 7d20d7eb1334706546708acd966c0c7f807726e8 (diff) | |
| download | u-boot-imx-5835823da3a357468bc90c2b74bad3193555b918.zip u-boot-imx-5835823da3a357468bc90c2b74bad3193555b918.tar.gz u-boot-imx-5835823da3a357468bc90c2b74bad3193555b918.tar.bz2 | |
sunxi: add gmac Ethernet support
Add support for the GMAC Ethernet controller on Allwinner A20 (sun7i)
processors. Enable for the Cubietruck.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/sunxi/Makefile | 1 | ||||
| -rw-r--r-- | board/sunxi/gmac.c | 32 |
2 files changed, 33 insertions, 0 deletions
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile index 18b1e11..cbf8f08 100644 --- a/board/sunxi/Makefile +++ b/board/sunxi/Makefile @@ -9,4 +9,5 @@ # SPDX-License-Identifier: GPL-2.0+ # obj-y += board.o +obj-$(CONFIG_SUNXI_GMAC) += gmac.o obj-$(CONFIG_CUBIETRUCK) += dram_cubietruck.o diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c new file mode 100644 index 0000000..e48328d --- /dev/null +++ b/board/sunxi/gmac.c @@ -0,0 +1,32 @@ +#include <common.h> +#include <netdev.h> +#include <miiphy.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/gpio.h> + +int sunxi_gmac_initialize(bd_t *bis) +{ + int pin; + struct sunxi_ccm_reg *const ccm = + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + + /* Set up clock gating */ + setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC); + + /* Set MII clock */ + setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII | + CCM_GMAC_CTRL_GPIT_RGMII); + + /* Configure pin mux settings for GMAC */ + for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) { + /* skip unused pins in RGMII mode */ + if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14)) + continue; + sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC); + sunxi_gpio_set_drv(pin, 3); + } + + return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII); +} |