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authorSimon Glass <sjg@chromium.org>2015-03-02 12:40:54 -0700
committerSimon Glass <sjg@chromium.org>2015-04-16 19:27:40 -0600
commit51e9dad29675384becb0d31b1aa7388dc77d34aa (patch)
tree3d52fcd844c0238071582a73f44ecf4152eb3dd4 /board
parentcc285c565aad1c25612ddfc4690ff201970a68f0 (diff)
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x86: Add support for panther (Asus Chromebox)
Support running U-Boot as a coreboot payload. Tested peripherals include: - Video (HDMI and DisplayPort) - SATA disk - Gigabit Ethernet - SPI flash USB3 does not work. This may be a problem with the USB3 PCI driver or something in the USB3 stack and has not been investigated So far this is disabled. The SD card slot also does not work. For video, coreboot will need to run the OPROM to set this up. With this board, bare support (running without coreboot) is not available as yet. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board')
-rw-r--r--board/google/chromebox_panther/Kconfig34
-rw-r--r--board/google/chromebox_panther/MAINTAINERS6
-rw-r--r--board/google/chromebox_panther/Makefile7
-rw-r--r--board/google/chromebox_panther/panther.c22
4 files changed, 69 insertions, 0 deletions
diff --git a/board/google/chromebox_panther/Kconfig b/board/google/chromebox_panther/Kconfig
new file mode 100644
index 0000000..11df55a
--- /dev/null
+++ b/board/google/chromebox_panther/Kconfig
@@ -0,0 +1,34 @@
+if TARGET_CHROMEBOX_PANTHER
+
+config SYS_BOARD
+ default "chromebox_panther"
+
+config SYS_VENDOR
+ default "google"
+
+config SYS_SOC
+ default "ivybridge"
+
+config SYS_CONFIG_NAME
+ default "chromebox_panther"
+
+# Panther actually uses haswell, not ivybridge, so this is just a placeholder
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select X86_RESET_VECTOR
+ select CPU_INTEL_SOCKET_RPGA989
+ select NORTHBRIDGE_INTEL_IVYBRIDGE
+ select SOUTHBRIDGE_INTEL_C216
+ select HAVE_ACPI_RESUME
+ select MARK_GRAPHICS_MEM_WRCOMB
+ select BOARD_ROMSIZE_KB_8192
+
+config SYS_CAR_ADDR
+ hex
+ default 0xff7e0000
+
+config SYS_CAR_SIZE
+ hex
+ default 0x20000
+
+endif
diff --git a/board/google/chromebox_panther/MAINTAINERS b/board/google/chromebox_panther/MAINTAINERS
new file mode 100644
index 0000000..c88774b
--- /dev/null
+++ b/board/google/chromebox_panther/MAINTAINERS
@@ -0,0 +1,6 @@
+CHROMEBOX PANTHER BOARD
+M: Simon Glass <sjg@chromium.org>
+S: Maintained
+F: board/google/chromebook_panther/
+F: include/configs/chromebox_panther.h
+F: configs/chromebox_panther_defconfig
diff --git a/board/google/chromebox_panther/Makefile b/board/google/chromebox_panther/Makefile
new file mode 100644
index 0000000..ce8820f
--- /dev/null
+++ b/board/google/chromebox_panther/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2015 Google, Inc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += panther.o
diff --git a/board/google/chromebox_panther/panther.c b/board/google/chromebox_panther/panther.c
new file mode 100644
index 0000000..d492a03
--- /dev/null
+++ b/board/google/chromebox_panther/panther.c
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/pch.h>
+
+int arch_early_init_r(void)
+{
+ return 0;
+}
+
+int board_early_init_f(void)
+{
+ return 0;
+}
+
+void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio)
+{
+}