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| author | Ye Li <ye.li@nxp.com> | 2016-04-21 14:26:22 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2016-04-22 10:41:29 +0800 |
| commit | 519bc30d20c53ca3a1b7309299964e4cf3f5b976 (patch) | |
| tree | 594b8e00033aec9c2eaabca881ab0b1f48820dc7 /board | |
| parent | 0a99e3714bb4073e6c31ab89607cc7fc3fba6513 (diff) | |
| download | u-boot-imx-519bc30d20c53ca3a1b7309299964e4cf3f5b976.zip u-boot-imx-519bc30d20c53ca3a1b7309299964e4cf3f5b976.tar.gz u-boot-imx-519bc30d20c53ca3a1b7309299964e4cf3f5b976.tar.bz2 | |
MLK-12694 mx6ullarm2: Remove the CD detection of SD2
Since the CD pin of SD2 is DNP on the mx6ull arm2 board, this will cause
SD2 access problem even the card is inserted. Hard code the CD result to
1 to assume the card is always on.
The SD driver will return other errors if the card does not exist.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 47efe2fda62297ab1da8594828cd7bd928ecbda7)
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c b/board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c index b477a18..5b8369e 100644 --- a/board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c +++ b/board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c @@ -382,7 +382,6 @@ static struct fsl_esdhc_cfg usdhc_cfg[2] = { #define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) #define USDHC1_PWR_GPIO IMX_GPIO_NR(1, 9) #define USDHC1_VSELECT IMX_GPIO_NR(1, 5) -#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 19) #define USDHC2_PWR_GPIO IMX_GPIO_NR(4, 10) int board_mmc_get_env_dev(int devno) @@ -410,7 +409,7 @@ int board_mmc_getcd(struct mmc *mmc) break; #if !defined(CONFIG_SYS_USE_NAND) && !defined(CONFIG_MX6ULL_DDR3_ARM2_QSPIB_REWORK) case USDHC2_BASE_ADDR: - ret = !gpio_get_value(USDHC2_CD_GPIO); + ret = 1; break; #endif } @@ -448,7 +447,6 @@ int board_mmc_init(bd_t *bis) case 1: imx_iomux_v3_setup_multiple_pads( usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - gpio_direction_input(USDHC2_CD_GPIO); gpio_direction_output(USDHC2_PWR_GPIO, 1); usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); break; |