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author | Tom Rini <trini@ti.com> | 2015-02-17 22:11:36 -0500 |
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committer | Tom Rini <trini@ti.com> | 2015-02-17 22:11:36 -0500 |
commit | 9ec84f103b3f3e770043b06042e5d2d6f2339e39 (patch) | |
tree | 693381b5c55d2a2e1d98707ff39a59ced75d66ef /board | |
parent | 1e7b357a4ebf9a99a6258a0bbedf4e318a5263e0 (diff) | |
parent | 5c98d7ffb0b11c9e3909f56ec5ce9dff682f1e30 (diff) | |
download | u-boot-imx-9ec84f103b3f3e770043b06042e5d2d6f2339e39.zip u-boot-imx-9ec84f103b3f3e770043b06042e5d2d6f2339e39.tar.gz u-boot-imx-9ec84f103b3f3e770043b06042e5d2d6f2339e39.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-avr32
Diffstat (limited to 'board')
-rw-r--r-- | board/atmel/atngw100/atngw100.c | 32 | ||||
-rw-r--r-- | board/atmel/atngw100mkii/atngw100mkii.c | 39 | ||||
-rw-r--r-- | board/atmel/atstk1000/atstk1000.c | 33 | ||||
-rw-r--r-- | board/earthlcd/favr-32-ezkit/favr-32-ezkit.c | 33 | ||||
-rw-r--r-- | board/in-circuit/grasshopper/grasshopper.c | 32 | ||||
-rw-r--r-- | board/mimc/mimc200/mimc200.c | 38 | ||||
-rw-r--r-- | board/miromico/hammerhead/hammerhead.c | 32 |
7 files changed, 65 insertions, 174 deletions
diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c index 03d767a..dacd427 100644 --- a/board/atmel/atngw100/atngw100.c +++ b/board/atmel/atngw100/atngw100.c @@ -18,14 +18,14 @@ DECLARE_GLOBAL_DATA_PTR; struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; @@ -52,6 +52,8 @@ int board_early_init_f(void) hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH); + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart1(PORTMUX_DRIVE_MIN); #if defined(CONFIG_MACB) @@ -68,24 +70,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x01; diff --git a/board/atmel/atngw100mkii/atngw100mkii.c b/board/atmel/atngw100mkii/atngw100mkii.c index 72d19e4..8e215d5 100644 --- a/board/atmel/atngw100mkii/atngw100mkii.c +++ b/board/atmel/atngw100mkii/atngw100mkii.c @@ -23,21 +23,21 @@ DECLARE_GLOBAL_DATA_PTR; struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { /* Atmel AT49BV640D 8 MiB x16 NOR flash on NCS0 */ - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { /* Micron MT29F2G16AAD 256 MiB x16 NAND flash on NCS3 */ - .virt_pgno = EBI_SRAM_CS3_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SRAM_CS3_SIZE >> PAGE_SHIFT, - .phys = (EBI_SRAM_CS3_BASE >> PAGE_SHIFT) + .virt_pgno = EBI_SRAM_CS3_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SRAM_CS3_SIZE >> MMU_PAGE_SHIFT, + .phys = (EBI_SRAM_CS3_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { /* 2x16-bit ISSI IS42S16320B 64 MiB SDRAM (128 MiB total) */ - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; @@ -69,6 +69,9 @@ int board_early_init_f(void) portmux_select_gpio(PORTMUX_PORT_E, 1 << 23, PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH | PORTMUX_DRIVE_MIN); + + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart1(PORTMUX_DRIVE_MIN); #if defined(CONFIG_MACB) @@ -85,24 +88,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x01; diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c index 4b6b90f..fd4363b 100644 --- a/board/atmel/atstk1000/atstk1000.c +++ b/board/atmel/atstk1000/atstk1000.c @@ -17,14 +17,14 @@ DECLARE_GLOBAL_DATA_PTR; struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; @@ -78,7 +78,10 @@ int board_early_init_f(void) hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); portmux_enable_ebi(sdram_config.data_bits, 23, 0, PORTMUX_DRIVE_HIGH); + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart1(PORTMUX_DRIVE_MIN); + #if defined(CONFIG_MACB) portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW); portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW); @@ -90,24 +93,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x10; diff --git a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c index a74547b..f9ac330 100644 --- a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c +++ b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c @@ -17,14 +17,14 @@ DECLARE_GLOBAL_DATA_PTR; struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; @@ -52,6 +52,9 @@ int board_early_init_f(void) hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH); + + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart3(PORTMUX_DRIVE_MIN); #if defined(CONFIG_MACB) portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH); @@ -63,24 +66,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x01; diff --git a/board/in-circuit/grasshopper/grasshopper.c b/board/in-circuit/grasshopper/grasshopper.c index 340b713..91b4116 100644 --- a/board/in-circuit/grasshopper/grasshopper.c +++ b/board/in-circuit/grasshopper/grasshopper.c @@ -18,14 +18,14 @@ DECLARE_GLOBAL_DATA_PTR; struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; @@ -53,6 +53,8 @@ int board_early_init_f(void) hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); portmux_enable_ebi(SDRAM_DATA_32BIT, 23, 0, PORTMUX_DRIVE_HIGH); + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart0(PORTMUX_DRIVE_MIN); portmux_enable_usart1(PORTMUX_DRIVE_MIN); #if defined(CONFIG_MACB) @@ -69,24 +71,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x00; diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c index 2ad53ec..f078295 100644 --- a/board/mimc/mimc200/mimc200.c +++ b/board/mimc/mimc200/mimc200.c @@ -20,19 +20,19 @@ struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = EBI_SRAM_CS2_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SRAM_CS2_SIZE >> PAGE_SHIFT, - .phys = (EBI_SRAM_CS2_BASE >> PAGE_SHIFT) + .virt_pgno = EBI_SRAM_CS2_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SRAM_CS2_SIZE >> MMU_PAGE_SHIFT, + .phys = (EBI_SRAM_CS2_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; @@ -91,6 +91,8 @@ int board_early_init_f(void) /* Enable 26 address bits and NCS2 */ portmux_enable_ebi(16, 26, PORTMUX_EBI_CS(2), PORTMUX_DRIVE_HIGH); + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart1(PORTMUX_DRIVE_MIN); /* de-assert "force sys reset" pin */ @@ -151,24 +153,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x01; diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c index d82fee7..a0c7d3b 100644 --- a/board/miromico/hammerhead/hammerhead.c +++ b/board/miromico/hammerhead/hammerhead.c @@ -21,14 +21,14 @@ DECLARE_GLOBAL_DATA_PTR; struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { { - .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, - .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_NONE, }, { - .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, - .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, - .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT) | MMU_VMR_CACHE_WRBACK, }, }; @@ -63,6 +63,8 @@ int board_early_init_f(void) hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH); + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart1(PORTMUX_DRIVE_MIN); #if defined(CONFIG_MACB) @@ -74,24 +76,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x01; |