x86: Remove eNET boards

These are no longer used and should be removed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>

6 files changed, 0 insertions, 617 deletions

diff --git a/board/eNET/Makefile b/board/eNET/Makefile
deleted file mode 100644
index ad1c5b1..0000000
--- a/board/eNET/Makefile
+++ /dev/null
@@ -1,52 +0,0 @@
-#
-# (C) Copyright 2008
-# Graeme Russ, graeme.russ@gmail.com.
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2002
-# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS-y	+= eNET.o
-COBJS-$(CONFIG_PCI) += eNET_pci.o
-SOBJS-y	+= eNET_start16.o
-SOBJS-y	+= eNET_start.o
-
-SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/eNET/eNET.c b/board/eNET/eNET.c
deleted file mode 100644
index 2f26470..0000000
--- a/board/eNET/eNET.c
+++ /dev/null
@@ -1,284 +0,0 @@
-/*
- * (C) Copyright 2008
- * Graeme Russ, graeme.russ@gmail.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/sc520.h>
-#include <net.h>
-#include <netdev.h>
-
-#ifdef CONFIG_HW_WATCHDOG
-#include <watchdog.h>
-#endif
-
-#include "hardware.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
-
-static void enet_timer_isr(void);
-static void enet_toggle_run_led(void);
-static void enet_setup_pars(void);
-
-/*
- * Miscellaneous platform dependent initializations
- */
-int board_early_init_f(void)
-{
-	u16 pio_out_cfg = 0x0000;
-
-	/* Configure General Purpose Bus timing */
-	writeb(CONFIG_SYS_SC520_GPCSRT, &sc520_mmcr->gpcsrt);
-	writeb(CONFIG_SYS_SC520_GPCSPW, &sc520_mmcr->gpcspw);
-	writeb(CONFIG_SYS_SC520_GPCSOFF, &sc520_mmcr->gpcsoff);
-	writeb(CONFIG_SYS_SC520_GPRDW, &sc520_mmcr->gprdw);
-	writeb(CONFIG_SYS_SC520_GPRDOFF, &sc520_mmcr->gprdoff);
-	writeb(CONFIG_SYS_SC520_GPWRW, &sc520_mmcr->gpwrw);
-	writeb(CONFIG_SYS_SC520_GPWROFF, &sc520_mmcr->gpwroff);
-
-	/* Configure Programmable Input/Output Pins */
-	writew(CONFIG_SYS_SC520_PIODIR15_0, &sc520_mmcr->piodir15_0);
-	writew(CONFIG_SYS_SC520_PIODIR31_16, &sc520_mmcr->piodir31_16);
-	writew(CONFIG_SYS_SC520_PIOPFS31_16, &sc520_mmcr->piopfs31_16);
-	writew(CONFIG_SYS_SC520_PIOPFS15_0, &sc520_mmcr->piopfs15_0);
-	writeb(CONFIG_SYS_SC520_CSPFS, &sc520_mmcr->cspfs);
-	writeb(CONFIG_SYS_SC520_CLKSEL, &sc520_mmcr->clksel);
-
-	/*
-	 * Turn off top board
-	 * Set StrataFlash chips to 16-bit width
-	 * Set StrataFlash chips to normal (non reset/power down) mode
-	 */
-	pio_out_cfg |= CONFIG_SYS_ENET_TOP_BRD_PWR;
-	pio_out_cfg |= CONFIG_SYS_ENET_SF_WIDTH;
-	pio_out_cfg |= CONFIG_SYS_ENET_SF1_MODE;
-	pio_out_cfg |= CONFIG_SYS_ENET_SF2_MODE;
-	writew(pio_out_cfg, &sc520_mmcr->pioset15_0);
-
-	/* Turn off auxiliary power output */
-	writew(CONFIG_SYS_ENET_AUX_PWR, &sc520_mmcr->pioclr15_0);
-
-	/* Clear FPGA program mode */
-	writew(CONFIG_SYS_ENET_FPGA_PROG, &sc520_mmcr->pioset31_16);
-
-	enet_setup_pars();
-
-	/* Disable Watchdog */
-	writew(0x3333, &sc520_mmcr->wdtmrctl);
-	writew(0xcccc, &sc520_mmcr->wdtmrctl);
-	writew(0x0000, &sc520_mmcr->wdtmrctl);
-
-	/* Chip Select Configuration */
-	writew(CONFIG_SYS_SC520_BOOTCS_CTRL, &sc520_mmcr->bootcsctl);
-	writew(CONFIG_SYS_SC520_ROMCS1_CTRL, &sc520_mmcr->romcs1ctl);
-	writew(CONFIG_SYS_SC520_ROMCS2_CTRL, &sc520_mmcr->romcs2ctl);
-
-	writeb(CONFIG_SYS_SC520_ADDDECCTL, &sc520_mmcr->adddecctl);
-	writeb(CONFIG_SYS_SC520_UART1CTL, &sc520_mmcr->uart1ctl);
-	writeb(CONFIG_SYS_SC520_UART2CTL, &sc520_mmcr->uart2ctl);
-
-	writeb(CONFIG_SYS_SC520_SYSARBCTL, &sc520_mmcr->sysarbctl);
-	writew(CONFIG_SYS_SC520_SYSARBMENB, &sc520_mmcr->sysarbmenb);
-
-	/* enable posted-writes */
-	writeb(CONFIG_SYS_SC520_HBCTL, &sc520_mmcr->hbctl);
-
-	return 0;
-}
-
-static void enet_setup_pars(void)
-{
-	/*
-	 * PARs 11 and 12 are 2MB SRAM @ 0x19000000
-	 *
-	 * These are setup now because older version of U-Boot have them
-	 * mapped to a different PAR which gets clobbered which prevents
-	 * using SRAM for warm-booting a new image
-	 */
-	writel(CONFIG_SYS_SC520_SRAM1_PAR, &sc520_mmcr->par[11]);
-	writel(CONFIG_SYS_SC520_SRAM2_PAR, &sc520_mmcr->par[12]);
-
-	/* PARs 0 and 1 are Compact Flash slots (4kB each) */
-	writel(CONFIG_SYS_SC520_CF1_PAR, &sc520_mmcr->par[0]);
-	writel(CONFIG_SYS_SC520_CF2_PAR, &sc520_mmcr->par[1]);
-
-	/* PAR 2 is used for Cache-As-RAM */
-
-	/*
-	 * PARs 5 through 8 are additional NS16550 UARTS
-	 * 8 bytes each @ 0x013f8, 0x012f8, 0x011f8 and 0x010f8
-	 */
-	writel(CONFIG_SYS_SC520_UARTA_PAR, &sc520_mmcr->par[5]);
-	writel(CONFIG_SYS_SC520_UARTB_PAR, &sc520_mmcr->par[6]);
-	writel(CONFIG_SYS_SC520_UARTC_PAR, &sc520_mmcr->par[7]);
-	writel(CONFIG_SYS_SC520_UARTD_PAR, &sc520_mmcr->par[8]);
-
-	/* PARs 9 and 10 are 32MB StrataFlash @ 0x10000000 */
-	writel(CONFIG_SYS_SC520_SF1_PAR, &sc520_mmcr->par[9]);
-	writel(CONFIG_SYS_SC520_SF2_PAR, &sc520_mmcr->par[10]);
-
-	/* PAR 13 is 4kB DPRAM @ 0x18100000 (implemented in FPGA) */
-	writel(CONFIG_SYS_SC520_DPRAM_PAR, &sc520_mmcr->par[13]);
-
-	/*
-	 * PAR 14 is Low Level I/O (LEDs, Hex Switches etc)
-	 * Already configured in board_init16 (eNET_start16.S)
-	 *
-	 * PAR 15 is Boot ROM
-	 * Already configured in board_init16 (eNET_start16.S)
-	 */
-}
-
-
-int board_early_init_r(void)
-{
-	/* CPU Speed to 100MHz */
-	gd->cpu_clk = 100000000;
-
-	/* Crystal is 33.000MHz */
-	gd->bus_clk = 33000000;
-
-	return 0;
-}
-
-void show_boot_progress(int val)
-{
-	uchar led_mask;
-
-	led_mask = 0x00;
-
-	if (val < 0)
-		led_mask |= LED_ERR_BITMASK;
-
-	led_mask |= (uchar)(val & 0x001f);
-	outb(led_mask, LED_LATCH_ADDRESS);
-}
-
-
-int last_stage_init(void)
-{
-	outb(0x00, LED_LATCH_ADDRESS);
-
-	register_timer_isr(enet_timer_isr);
-
-	printf("Serck Controls eNET\n");
-
-	return 0;
-}
-
-ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
-{
-	if (banknum == 0) {	/* non-CFI boot flash */
-		info->portwidth = FLASH_CFI_8BIT;
-		info->chipwidth = FLASH_CFI_BY8;
-		info->interface = FLASH_CFI_X8;
-		return 1;
-	} else {
-		return 0;
-	}
-}
-
-int board_eth_init(bd_t *bis)
-{
-	return pci_eth_init(bis);
-}
-
-void setup_pcat_compatibility()
-{
-	/* disable global interrupt mode */
-	writeb(0x40, &sc520_mmcr->picicr);
-
-	/* set all irqs to edge */
-	writeb(0x00, &sc520_mmcr->pic_mode[0]);
-	writeb(0x00, &sc520_mmcr->pic_mode[1]);
-	writeb(0x00, &sc520_mmcr->pic_mode[2]);
-
-	/*
-	 *  active low polarity on PIC interrupt pins,
-	 *  active high polarity on all other irq pins
-	 */
-	writew(0x0000, &sc520_mmcr->intpinpol);
-
-	/*
-	 * PIT 0 -> IRQ0
-	 * RTC -> IRQ8
-	 * FP error -> IRQ13
-	 * UART1 -> IRQ4
-	 * UART2 -> IRQ3
-	 */
-	writeb(SC520_IRQ0, &sc520_mmcr->pit_int_map[0]);
-	writeb(SC520_IRQ8, &sc520_mmcr->rtcmap);
-	writeb(SC520_IRQ13, &sc520_mmcr->ferrmap);
-	writeb(SC520_IRQ4, &sc520_mmcr->uart_int_map[0]);
-	writeb(SC520_IRQ3, &sc520_mmcr->uart_int_map[1]);
-
-	/* Disable all other interrupt sources */
-	writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[0]);
-	writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[1]);
-	writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[2]);
-	writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pit_int_map[1]);
-	writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pit_int_map[2]);
-	writeb(SC520_IRQ_DISABLED, &sc520_mmcr->ssimap);
-	writeb(SC520_IRQ_DISABLED, &sc520_mmcr->wdtmap);
-	writeb(SC520_IRQ_DISABLED, &sc520_mmcr->wpvmap);
-	writeb(SC520_IRQ_DISABLED, &sc520_mmcr->icemap);
-}
-
-void enet_timer_isr(void)
-{
-	static long enet_ticks;
-
-	enet_ticks++;
-
-	/* Toggle Watchdog every 100ms */
-	if ((enet_ticks % 100) == 0)
-		hw_watchdog_reset();
-
-	/* Toggle Run LED every 500ms */
-	if ((enet_ticks % 500) == 0)
-		enet_toggle_run_led();
-}
-
-void hw_watchdog_reset(void)
-{
-	/* Watchdog Reset must be atomic */
-	long flag = disable_interrupts();
-
-	if (sc520_mmcr->piodata15_0 & WATCHDOG_PIO_BIT)
-		sc520_mmcr->pioclr15_0 = WATCHDOG_PIO_BIT;
-	else
-		sc520_mmcr->pioset15_0 = WATCHDOG_PIO_BIT;
-
-	if (flag)
-		enable_interrupts();
-}
-
-void enet_toggle_run_led(void)
-{
-	unsigned char leds_state = inb(LED_LATCH_ADDRESS);
-	if (leds_state & LED_RUN_BITMASK)
-		outb(leds_state & ~LED_RUN_BITMASK, LED_LATCH_ADDRESS);
-	else
-		outb(leds_state | LED_RUN_BITMASK, LED_LATCH_ADDRESS);
-}
diff --git a/board/eNET/eNET_pci.c b/board/eNET/eNET_pci.c
deleted file mode 100644
index 5af4ef7..0000000
--- a/board/eNET/eNET_pci.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * (C) Copyright 2008,2009
- * Graeme Russ, <graeme.russ@gmail.com>
- *
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/pci.h>
-#include <asm/arch/pci.h>
-
-static void pci_enet_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
-{
-	/* a configurable lists of IRQs to steal when we need one */
-	static int irq_list[] = {
-		CONFIG_SYS_FIRST_PCI_IRQ,
-		CONFIG_SYS_SECOND_PCI_IRQ,
-		CONFIG_SYS_THIRD_PCI_IRQ,
-		CONFIG_SYS_FORTH_PCI_IRQ
-	};
-	static int next_irq_index;
-
-	uchar tmp_pin;
-	int pin;
-
-	pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin);
-	pin = tmp_pin;
-
-	pin -= 1; /* PCI config space use 1-based numbering */
-	if (pin == -1)
-		return; /* device use no irq */
-
-	/* map device number +  pin to a pin on the sc520 */
-	switch (PCI_DEV(dev)) {
-	case 12:	/* First Ethernet Chip */
-		pin += SC520_PCI_INTA;
-		break;
-
-	case 13:	/* Second Ethernet Chip */
-		pin += SC520_PCI_INTB;
-		break;
-
-	default:
-		return;
-	}
-
-	pin &= 3; /* wrap around */
-
-	if (sc520_pci_ints[pin] == -1) {
-		/* re-route one interrupt for us */
-		if (next_irq_index > 3)
-			return;
-
-		if (pci_sc520_set_irq(pin, irq_list[next_irq_index]))
-			return;
-
-		next_irq_index++;
-	}
-
-	if (-1 != sc520_pci_ints[pin])
-		pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE,
-					   sc520_pci_ints[pin]);
-
-	printf("fixup_irq: device %d pin %c irq %d\n",
-	       PCI_DEV(dev), 'A' + pin, sc520_pci_ints[pin]);
-}
-
-static struct pci_controller enet_hose = {
-	fixup_irq: pci_enet_fixup_irq,
-};
-
-void pci_init_board(void)
-{
-	pci_sc520_init(&enet_hose);
-}
-
-int pci_set_regions(struct pci_controller *hose)
-{
-	/* System memory space */
-	pci_set_region(hose->regions + 0,
-		       SC520_PCI_MEMORY_BUS,
-		       SC520_PCI_MEMORY_PHYS,
-		       SC520_PCI_MEMORY_SIZE,
-		       PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-
-	/* ISA/PCI memory space */
-	pci_set_region(hose->regions + 1,
-		       SC520_ISA_MEM_BUS,
-		       SC520_ISA_MEM_PHYS,
-		       SC520_ISA_MEM_SIZE,
-		       PCI_REGION_MEM);
-
-	/* PCI I/O space */
-	pci_set_region(hose->regions + 2,
-		       SC520_PCI_IO_BUS,
-		       SC520_PCI_IO_PHYS,
-		       SC520_PCI_IO_SIZE,
-		       PCI_REGION_IO);
-
-	/* ISA/PCI I/O space */
-	pci_set_region(hose->regions + 3,
-		       SC520_ISA_IO_BUS,
-		       SC520_ISA_IO_PHYS,
-		       SC520_ISA_IO_SIZE,
-		       PCI_REGION_IO);
-
-	return 4;
-}
diff --git a/board/eNET/eNET_start.S b/board/eNET/eNET_start.S
deleted file mode 100644
index 0dec7ea..0000000
--- a/board/eNET/eNET_start.S
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * (C) Copyright 2008
- * Graeme Russ, graeme.russ@gmail.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include "hardware.h"
-
-/* board early intialization */
-.globl early_board_init
-early_board_init:
-	/* No 32-bit board specific initialisation */
-	jmp	early_board_init_ret
diff --git a/board/eNET/eNET_start16.S b/board/eNET/eNET_start16.S
deleted file mode 100644
index 5e3f44c..0000000
--- a/board/eNET/eNET_start16.S
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * (C) Copyright 2008
- * Graeme Russ, graeme.russ@gmail.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * 16bit initialization code.
- * This code have to map the area of the boot flash
- * that is used by U-boot to its final destination.
- */
-
-#include "config.h"
-#include "hardware.h"
-#include <asm/arch/sc520.h>
-#include <generated/asm-offsets.h>
-
-.text
-.section .start16, "ax"
-.code16
-.globl board_init16
-board_init16:
-	/* Alias MMCR to 0xdf000 */
-	movw	$0xfffc, %dx
-	movl	$0x800df0cb, %eax
-	outl	%eax, %dx
-
-	/* Set ds to point to MMCR alias */
-	movw	$0xdf00, %ax
-	movw	%ax, %ds
-
-	/* Map PAR for Boot Flash (BOOTCS, 512kB @ 0x380000000) */
-	movl    $GENERATED_SC520_PAR14, %edi
-	movl	$CONFIG_SYS_SC520_BOOTCS_PAR, %eax
-	movl	%eax, (%di)
-
-	/* Map PAR for LED, Hex Switches (GPCS6, 20 Bytes @ 0x1000) */
-	movl    $GENERATED_SC520_PAR15, %edi
-	movl	$CONFIG_SYS_SC520_LLIO_PAR, %eax
-	movl	%eax, (%di)
-
-	/* Disabe MMCR alias */
-	movw	$0xfffc, %dx
-	movl	$0x000000cb, %eax
-	outl	%eax, %dx
-
-	jmp	board_init16_ret
-
-.section .bios, "ax"
-.code16
-.globl realmode_reset
-.hidden realmode_reset
-.type realmode_reset, @function
-realmode_reset:
-	/* Alias MMCR to 0xdf000 */
-	movw	$0xfffc, %dx
-	movl	$0x800df0cb, %eax
-	outl	%eax, %dx
-
-	/* Set ds to point to MMCR alias */
-	movw	$0xdf00, %ax
-	movw	%ax, %ds
-
-	/* issue software reset thorugh MMCR */
-	movl    $0xd72, %edi
-	movb	$0x01, %al
-	movb	%al, (%di)
-
-1:	hlt
-	jmp	1
diff --git a/board/eNET/hardware.h b/board/eNET/hardware.h
deleted file mode 100644
index dec2cd8..0000000
--- a/board/eNET/hardware.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * (C) Copyright 2008
- * Graeme Russ, graeme.russ@gmail.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef HARDWARE_H_
-#define HARDWARE_H_
-
-#define LED_LATCH_ADDRESS	0x1002
-#define LED_RUN_BITMASK		0x01
-#define LED_1_BITMASK		0x02
-#define LED_2_BITMASK		0x04
-#define LED_RX_BITMASK		0x08
-#define LED_TX_BITMASK		0x10
-#define LED_ERR_BITMASK		0x20
-#define WATCHDOG_PIO_BIT	0x8000
-
-#endif /* HARDWARE_H_ */