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authorJon Loeliger <jdl@freescale.com>2005-08-01 13:20:47 -0500
committerJon Loeliger <jdl@freescale.com>2005-08-01 13:20:47 -0500
commitde1d0a69956a63cea6a62043ae5d5afb584efe93 (patch)
tree1914348ff43c309890deb6ecad206e37b2bc3a51 /board
parentb0e32949239c7870d409ca687a2dfc1261a3d838 (diff)
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Fix style issues primarily in 85xx and 83xx boards.
- C++ comments - Trailing white space - Indentation not by TAB - Excessive amount of empty lines - Trailing empty lines
Diffstat (limited to 'board')
-rw-r--r--board/mpc8349ads/mpc8349ads.c28
-rw-r--r--board/mpc8540eval/mpc8540eval.c40
2 files changed, 23 insertions, 45 deletions
diff --git a/board/mpc8349ads/mpc8349ads.c b/board/mpc8349ads/mpc8349ads.c
index 40400f3..da8d3d7 100644
--- a/board/mpc8349ads/mpc8349ads.c
+++ b/board/mpc8349ads/mpc8349ads.c
@@ -53,7 +53,6 @@ int board_early_init_f (void)
#define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1)
-
long int initdram (int board_type)
{
volatile immap_t *im = (immap_t *)CFG_IMMRBAR;
@@ -148,7 +147,7 @@ int checkboard (void)
return 0;
}
-#if defined(CONFIG_PCI) //copy from mpc85xx
+#if defined(CONFIG_PCI)
/*
* Initialize PCI Devices, report devices found
*/
@@ -190,8 +189,8 @@ pci_init_board(void)
}
/*
-if MPC8349ADS is soldered with SDRAM
-*/
+ * if MPC8349ADS is soldered with SDRAM
+ */
#if defined(CFG_BR2_PRELIM) \
&& defined(CFG_OR2_PRELIM) \
&& defined(CFG_LBLAWBAR2_PRELIM) \
@@ -207,7 +206,6 @@ sdram_init(void)
volatile lbus8349_t *lbc= &immap->lbus;
uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
-
puts("\n SDRAM on Local Bus: ");
print_size (CFG_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
@@ -233,32 +231,33 @@ sdram_init(void)
lbc->lsdmr = CFG_LBC_LSDMR_2;/*0x48636733;auto refresh*/
asm("sync");
-/*1 times*/
+ /*1 times*/
*sdram_addr = 0xff;
udelay(100);
-/*2 times*/
+ /*2 times*/
*sdram_addr = 0xff;
udelay(100);
-/*3 times*/
+ /*3 times*/
*sdram_addr = 0xff;
udelay(100);
-/*4 times*/
+ /*4 times*/
*sdram_addr = 0xff;
udelay(100);
-/*5 times*/
+ /*5 times*/
*sdram_addr = 0xff;
udelay(100);
-/*6 times*/
+ /*6 times*/
*sdram_addr = 0xff;
udelay(100);
-/*7 times*/
+ /*7 times*/
*sdram_addr = 0xff;
udelay(100);
-/*8 times*/
+ /*8 times*/
*sdram_addr = 0xff;
udelay(100);
- lbc->lsdmr = CFG_LBC_LSDMR_4; /*0x58636733;mode register write operation*/
+ /* 0x58636733;mode register write operation */
+ lbc->lsdmr = CFG_LBC_LSDMR_4;
asm("sync");
*sdram_addr = 0xff;
udelay(100);
@@ -275,4 +274,3 @@ sdram_init(void)
put("SDRAM on Local Bus is NOT available!\n");
}
#endif
-
diff --git a/board/mpc8540eval/mpc8540eval.c b/board/mpc8540eval/mpc8540eval.c
index c90dbc7..3b3c8ed 100644
--- a/board/mpc8540eval/mpc8540eval.c
+++ b/board/mpc8540eval/mpc8540eval.c
@@ -23,34 +23,15 @@
* MA 02111-1307 USA
*/
-
-extern long int spd_sdram (void);
-
#include <common.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <spd.h>
-
+extern long int spd_sdram (void);
long int fixed_sdram (void);
-/* MPC8540ADS Board Status & Control Registers */
-#if 0
-typedef struct bscr_ {
- unsigned long bcsr0;
- unsigned long bcsr1;
- unsigned long bcsr2;
- unsigned long bcsr3;
- unsigned long bcsr4;
- unsigned long bcsr5;
- unsigned long bcsr6;
- unsigned long bcsr7;
-} bcsr_t;
-#endif
-
-
-
int board_pre_init (void)
{
#if defined(CONFIG_PCI)
@@ -74,7 +55,8 @@ int checkboard (void)
printf ("\tDDR: %lu MHz\n", sysinfo.freqSystemBus / 2000000);
if((CFG_LBC_LCRR & 0x0f) == 2 || (CFG_LBC_LCRR & 0x0f) == 4 \
|| (CFG_LBC_LCRR & 0x0f) == 8) {
- printf ("\tLBC: %lu MHz\n", sysinfo.freqSystemBus / 1000000 /(CFG_LBC_LCRR & 0x0f));
+ printf ("\tLBC: %lu MHz\n",
+ sysinfo.freqSystemBus / 1000000/(CFG_LBC_LCRR & 0x0f));
} else {
printf("\tLBC: unknown\n");
}
@@ -199,7 +181,6 @@ long int initdram (int board_type)
return dram_size;
}
-
#if defined(CFG_DRAM_TEST)
int testdram (void)
{
@@ -234,14 +215,13 @@ int testdram (void)
}
#endif
-
#if !defined(CONFIG_SPD_EEPROM)
/*************************************************************************
* fixed sdram init -- doesn't use serial presence detect.
************************************************************************/
long int fixed_sdram (void)
{
- #ifndef CFG_RAMBOOT
+#ifndef CFG_RAMBOOT
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_ddr_t *ddr= &immap->im_ddr;
@@ -251,21 +231,21 @@ long int fixed_sdram (void)
ddr->timing_cfg_2 = CFG_DDR_TIMING_2;
ddr->sdram_mode = CFG_DDR_MODE;
ddr->sdram_interval = CFG_DDR_INTERVAL;
- #if defined (CONFIG_DDR_ECC)
+#if defined (CONFIG_DDR_ECC)
ddr->err_disable = 0x0000000D;
ddr->err_sbe = 0x00ff0000;
- #endif
+#endif
asm("sync;isync;msync");
udelay(500);
- #if defined (CONFIG_DDR_ECC)
+#if defined (CONFIG_DDR_ECC)
/* Enable ECC checking */
ddr->sdram_cfg = (CFG_DDR_CONTROL | 0x20000000);
- #else
+#else
ddr->sdram_cfg = CFG_DDR_CONTROL;
- #endif
+#endif
asm("sync; isync; msync");
udelay(500);
- #endif
+#endif
return (CFG_SDRAM_SIZE * 1024 * 1024);
}
#endif /* !defined(CONFIG_SPD_EEPROM) */