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authorFelix Radensky <felix@embedded-sol.com>2011-01-02 11:07:34 +0200
committerStefan Roese <sr@denx.de>2011-01-10 12:50:29 +0100
commitda7d3dffacbd30942c8c63dc2cef5c1c7854cde5 (patch)
tree3af726456f023ad0d5559b15d325457fb16c3310 /board
parent9813420e2dfc8e53601aa3bbd71a0d71773319e5 (diff)
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PPC4xx: Reduce NAND TLB window size on Canyonlands
16MiB NAND TLB window is way too big. Reduce it to 1KiB. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board')
-rw-r--r--board/amcc/canyonlands/init.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/amcc/canyonlands/init.S b/board/amcc/canyonlands/init.S
index 680feaa..8b7bfce 100644
--- a/board/amcc/canyonlands/init.S
+++ b/board/amcc/canyonlands/init.S
@@ -80,7 +80,7 @@ tlbtab:
#if !defined(CONFIG_ARCHES)
/* TLB-entry for NAND */
- tlbentry(CONFIG_SYS_NAND_ADDR, SZ_16M, CONFIG_SYS_NAND_ADDR, 4, AC_RWX | SA_IG)
+ tlbentry(CONFIG_SYS_NAND_ADDR, SZ_1K, CONFIG_SYS_NAND_ADDR, 4, AC_RWX | SA_IG)
/* TLB-entry for CPLD */
tlbentry(CONFIG_SYS_BCSR_BASE, SZ_1K, CONFIG_SYS_BCSR_BASE, 4, AC_RW | SA_IG)