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authorSimon Glass <sjg@chromium.org>2011-11-05 04:46:49 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-24 10:23:31 +0100
commitcb93481268904df3447fbe8b0ccb2862967efc26 (patch)
tree9df6b1370a3c55b7720d442f9b9324f590663cf0 /board
parent9dd79fdb6cfed5c62aa5adeaa7d5f758114e105c (diff)
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tegra2: Implement SPI / UART GPIO switch
The Tegra2 Seaboard has the unfortunate feature that SPI and the console UART are multiplexed on the same pins. We need to switch between one and the other during SPI and console activity. This new file implements a switch and keeps track of which peripheral owns the pins. It also flips over the controlling GPIO as needed Since we are adding a second file to board/nvidia/common, we create a proper Makefile there and remove the direct board.o include from board/nvidia/seaboard/Makefile Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board')
-rw-r--r--board/nvidia/common/Makefile47
-rw-r--r--board/nvidia/common/uart-spi-switch.c138
-rw-r--r--board/nvidia/seaboard/Makefile1
3 files changed, 185 insertions, 1 deletions
diff --git a/board/nvidia/common/Makefile b/board/nvidia/common/Makefile
new file mode 100644
index 0000000..3e748fd
--- /dev/null
+++ b/board/nvidia/common/Makefile
@@ -0,0 +1,47 @@
+# Copyright (c) 2011 The Chromium OS Authors.
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+
+include $(TOPDIR)/config.mk
+
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)board/$(VENDOR)/common)
+endif
+
+LIB = $(obj)lib$(VENDOR).o
+
+COBJS-y += board.o
+COBJS-$(CONFIG_SPI_UART_SWITCH) += uart-spi-switch.o
+
+COBJS := $(COBJS-y)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+all: $(LIB)
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/nvidia/common/uart-spi-switch.c b/board/nvidia/common/uart-spi-switch.c
new file mode 100644
index 0000000..23aa0b9
--- /dev/null
+++ b/board/nvidia/common/uart-spi-switch.c
@@ -0,0 +1,138 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ns16550.h>
+#include <asm/gpio.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/uart-spi-switch.h>
+#include <asm/arch/tegra2.h>
+#include <asm/arch/tegra2_spi.h>
+
+
+/* position of the UART/SPI select switch */
+enum spi_uart_switch {
+ SWITCH_UNKNOWN,
+ SWITCH_SPI,
+ SWITCH_UART,
+ SWITCH_BOTH
+};
+
+/* Information about the spi/uart switch */
+struct spi_uart {
+ int gpio; /* GPIO to control switch */
+ NS16550_t regs; /* Address of UART affected */
+ u32 port; /* Port number of UART affected */
+};
+
+static struct spi_uart local;
+static enum spi_uart_switch switch_pos; /* Current switch position */
+
+
+static void get_config(struct spi_uart *config)
+{
+#if defined CONFIG_SPI_CORRUPTS_UART
+ config->gpio = CONFIG_UART_DISABLE_GPIO;
+ config->regs = (NS16550_t)CONFIG_SPI_CORRUPTS_UART;
+ config->port = CONFIG_SPI_CORRUPTS_UART_NR;
+#else
+ config->gpio = -1;
+#endif
+}
+
+/*
+ * Init the UART / SPI switch. This can be called before relocation so we must
+ * not access BSS.
+ */
+void gpio_early_init_uart(void)
+{
+ struct spi_uart config;
+
+ get_config(&config);
+ if (config.gpio != -1) {
+ /* Cannot provide a label prior to relocation */
+ gpio_request(config.gpio, NULL);
+ gpio_direction_output(config.gpio, 0);
+ }
+}
+
+/*
+ * Configure the UART / SPI switch.
+ */
+void gpio_config_uart(void)
+{
+ get_config(&local);
+ if (local.gpio != -1) {
+ gpio_direction_output(local.gpio, 0);
+ switch_pos = SWITCH_UART;
+ } else {
+ /*
+ * If we're here we don't have a SPI switch; go ahead and
+ * enable the SPI now. We didn't in spi_init() so we wouldn't
+ * kill the UART.
+ */
+ pinmux_set_func(PINGRP_GMC, PMUX_FUNC_SFLASH);
+ switch_pos = SWITCH_BOTH;
+ }
+}
+
+static void spi_uart_switch(struct spi_uart *config,
+ enum spi_uart_switch new_pos)
+{
+ if (switch_pos == SWITCH_BOTH || new_pos == switch_pos)
+ return;
+
+ /* if the UART was selected, allow it to drain */
+ if (switch_pos == SWITCH_UART)
+ NS16550_drain(config->regs, config->port);
+
+ /* We need to dynamically change the pinmux, shared w/UART RXD/CTS */
+ pinmux_set_func(PINGRP_GMC, new_pos == SWITCH_SPI ?
+ PMUX_FUNC_SFLASH : PMUX_FUNC_UARTD);
+
+ /*
+ * On Seaboard, MOSI/MISO are shared w/UART.
+ * Use GPIO I3 (UART_DISABLE) to tristate UART during SPI activity.
+ * Enable UART later (cs_deactivate) so we can use it for U-Boot comms.
+ */
+ gpio_direction_output(config->gpio, new_pos == SWITCH_SPI);
+ switch_pos = new_pos;
+
+ /* if the SPI was selected, clear any junk bytes in the UART */
+ if (switch_pos == SWITCH_UART) {
+ /* TODO: What if it is part-way through clocking in junk? */
+ udelay(100);
+ NS16550_clear(config->regs, config->port);
+ }
+}
+
+void pinmux_select_uart(NS16550_t regs)
+{
+ /* Also prevents calling spi_uart_switch() before relocation */
+ if (regs == local.regs)
+ spi_uart_switch(&local, SWITCH_UART);
+}
+
+void pinmux_select_spi(void)
+{
+ spi_uart_switch(&local, SWITCH_SPI);
+}
diff --git a/board/nvidia/seaboard/Makefile b/board/nvidia/seaboard/Makefile
index f6599de..b6efa1c 100644
--- a/board/nvidia/seaboard/Makefile
+++ b/board/nvidia/seaboard/Makefile
@@ -31,7 +31,6 @@ endif
LIB = $(obj)lib$(BOARD).o
COBJS := $(BOARD).o
-COBJS += ../common/board.o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))