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authorAnatolij Gustschin <agust@denx.de>2013-02-08 00:03:44 +0000
committerWolfgang Denk <wd@denx.de>2013-03-09 08:21:46 +0100
commit676c66918a41f32b768abe1cb9fcb5f475682935 (patch)
treea4dfee66e0e8fe9e0774caa251fc63aa2812f28a /board
parentb84d6d27fc32cb0a069b861147d182655e22c302 (diff)
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mpc512x: use common code for CSx configuration
Remove CSx configurations from board code and only define required CSx macros in the board config file to configure chip select windows and parameters. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Cc: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board')
-rw-r--r--board/davedenx/aria/aria.c31
-rw-r--r--board/esd/mecp5123/mecp5123.c31
-rw-r--r--board/freescale/mpc5121ads/mpc5121ads.c21
-rw-r--r--board/pdm360ng/pdm360ng.c26
4 files changed, 0 insertions, 109 deletions
diff --git a/board/davedenx/aria/aria.c b/board/davedenx/aria/aria.c
index 31b079b..04912b8 100644
--- a/board/davedenx/aria/aria.c
+++ b/board/davedenx/aria/aria.c
@@ -55,37 +55,6 @@ DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void)
{
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
- u32 spridr;
-
- /*
- * Initialize Local Window for the On Board FPGA access
- */
- out_be32(&im->sysconf.lpcs2aw,
- CSAW_START(CONFIG_SYS_ARIA_FPGA_BASE) |
- CSAW_STOP(CONFIG_SYS_ARIA_FPGA_BASE, CONFIG_SYS_ARIA_FPGA_SIZE)
- );
- out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG);
- sync_law(&im->sysconf.lpcs2aw);
-
- /*
- * Initialize Local Window for the On Board SRAM access
- */
- out_be32(&im->sysconf.lpcs6aw,
- CSAW_START(CONFIG_SYS_ARIA_SRAM_BASE) |
- CSAW_STOP(CONFIG_SYS_ARIA_SRAM_BASE, CONFIG_SYS_ARIA_SRAM_SIZE)
- );
- out_be32(&im->lpc.cs_cfg[6], CONFIG_SYS_CS6_CFG);
- sync_law(&im->sysconf.lpcs6aw);
-
- /*
- * Configure Flash Speed
- */
- out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
-
- spridr = in_be32(&im->sysconf.spridr);
-
- if (SVR_MJREV(spridr) >= 2)
- out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
/*
* Enable clocks
diff --git a/board/esd/mecp5123/mecp5123.c b/board/esd/mecp5123/mecp5123.c
index 748ad7c..19e6e1f 100644
--- a/board/esd/mecp5123/mecp5123.c
+++ b/board/esd/mecp5123/mecp5123.c
@@ -65,18 +65,9 @@ int eeprom_write_enable(unsigned dev_addr, int state)
int board_early_init_f(void)
{
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
- u32 spridr;
int i;
/*
- * Initialize Local Window for NOR FLASH access
- */
- out_be32(&im->sysconf.lpcs0aw,
- CSAW_START(CONFIG_SYS_FLASH_BASE) |
- CSAW_STOP(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE));
- sync_law(&im->sysconf.lpcs0aw);
-
- /*
* Initialize Local Window for boot access
*/
out_be32(&im->sysconf.lpbaw,
@@ -84,28 +75,6 @@ int board_early_init_f(void)
sync_law(&im->sysconf.lpbaw);
/*
- * Initialize Local Window for VPC3 access
- */
- out_be32(&im->sysconf.lpcs1aw,
- CSAW_START(CONFIG_SYS_VPC3_BASE) |
- CSAW_STOP(CONFIG_SYS_VPC3_BASE, CONFIG_SYS_VPC3_SIZE));
- sync_law(&im->sysconf.lpcs1aw);
-
- /*
- * Configure Flash Speed
- */
- out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
-
- /*
- * Configure VPC3 Speed
- */
- out_be32(&im->lpc.cs_cfg[1], CONFIG_SYS_CS1_CFG);
-
- spridr = in_be32(&im->sysconf.spridr);
- if (SVR_MJREV(spridr) >= 2)
- out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
-
- /*
* Enable clocks
*/
out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN);
diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c
index 97eeab3..4b58dbc 100644
--- a/board/freescale/mpc5121ads/mpc5121ads.c
+++ b/board/freescale/mpc5121ads/mpc5121ads.c
@@ -84,18 +84,6 @@ void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
int board_early_init_f(void)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
- u32 spridr;
-
- /*
- * Initialize Local Window for the CPLD registers access (CS2 selects
- * the CPLD chip)
- */
- out_be32(&im->sysconf.lpcs2aw,
- CSAW_START(CONFIG_SYS_CPLD_BASE) |
- CSAW_STOP(CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_SIZE)
- );
- out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG);
- sync_law(&im->sysconf.lpcs2aw);
/*
* Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control
@@ -114,15 +102,6 @@ int board_early_init_f(void)
out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0x32);
}
#endif
- /*
- * Configure Flash Speed
- */
- out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
-
- spridr = in_be32(&im->sysconf.spridr);
-
- if (SVR_MJREV (spridr) >= 2)
- out_be32 (&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
/*
* Enable clocks
diff --git a/board/pdm360ng/pdm360ng.c b/board/pdm360ng/pdm360ng.c
index a2a1323..9a164ee 100644
--- a/board/pdm360ng/pdm360ng.c
+++ b/board/pdm360ng/pdm360ng.c
@@ -64,32 +64,6 @@ int board_early_init_f(void)
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
/*
- * Initialize Local Window for FLASH-Bank1 access (CS1)
- */
- out_be32(&im->sysconf.lpcs1aw,
- CSAW_START(CONFIG_SYS_FLASH1_BASE) |
- CSAW_STOP(CONFIG_SYS_FLASH1_BASE, CONFIG_SYS_FLASH_SIZE)
- );
- out_be32(&im->lpc.cs_cfg[1], CONFIG_SYS_CS1_CFG);
-
- /*
- * Local Window for MRAM access (CS2)
- */
- out_be32(&im->sysconf.lpcs2aw,
- CSAW_START(CONFIG_SYS_MRAM_BASE) |
- CSAW_STOP(CONFIG_SYS_MRAM_BASE, CONFIG_SYS_MRAM_SIZE)
- );
- out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG);
-
- sync_law(&im->sysconf.lpcs2aw);
-
- /*
- * Configure Flash Speed
- */
- out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
- out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
-
- /*
* Enable clocks
*/
out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN);