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authorThierry Reding <thierry.reding@avionic-design.de>2013-04-03 04:52:42 +0000
committerTom Warren <twarren@nvidia.com>2013-04-15 11:01:37 -0700
commit3408a34823a982af7d34075b77ac0803f6db9d00 (patch)
tree896b442d386ca55d8c12649967696153fb4fe24e /board
parent3ebbbfe4c78089db47599fc7b57ad016e247dd52 (diff)
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Tegra: All Tamonten-derived boards use onboard NAND
Move the nand-controller node to the tegra20-tamonten.dtsi so that it can be shared between all derived boards. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'board')
-rw-r--r--board/avionic-design/dts/tegra20-tamonten.dtsi11
-rw-r--r--board/avionic-design/dts/tegra20-tec.dts11
2 files changed, 11 insertions, 11 deletions
diff --git a/board/avionic-design/dts/tegra20-tamonten.dtsi b/board/avionic-design/dts/tegra20-tamonten.dtsi
index 86c7bab..f379622 100644
--- a/board/avionic-design/dts/tegra20-tamonten.dtsi
+++ b/board/avionic-design/dts/tegra20-tamonten.dtsi
@@ -279,6 +279,17 @@
status = "okay";
};
+ nand-controller@70008000 {
+ nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
+ nvidia,width = <8>;
+ nvidia,timing = <26 100 20 80 20 10 12 10 70>;
+
+ nand@0 {
+ reg = <0>;
+ compatible = "hynix,hy27uf4g2b", "nand-flash";
+ };
+ };
+
i2c@7000c000 {
clock-frequency = <400000>;
status = "okay";
diff --git a/board/avionic-design/dts/tegra20-tec.dts b/board/avionic-design/dts/tegra20-tec.dts
index 1d7cf89..4c1b08d 100644
--- a/board/avionic-design/dts/tegra20-tec.dts
+++ b/board/avionic-design/dts/tegra20-tec.dts
@@ -32,17 +32,6 @@
clock-frequency = <216000000>;
};
- nand-controller@70008000 {
- nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
- nvidia,width = <8>;
- nvidia,timing = <26 100 20 80 20 10 12 10 70>;
-
- nand@0 {
- reg = <0>;
- compatible = "hynix,hy27uf4g2b", "nand-flash";
- };
- };
-
i2c@7000c000 {
status = "disabled";
};