diff options
author | Tom Rini <trini@ti.com> | 2014-10-06 15:17:13 -0400 |
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committer | Tom Rini <trini@ti.com> | 2014-10-06 15:17:13 -0400 |
commit | 04de09f89bbc647d5b72db3512d1af1475a13bbd (patch) | |
tree | 601e5dbe3def2dee6f7b3dfee680b3aee372d35f /board | |
parent | 91693055995733e268874ae75568ae316233e116 (diff) | |
parent | 2f210639c4f003b0d5310273979441f1bfc88eae (diff) | |
download | u-boot-imx-04de09f89bbc647d5b72db3512d1af1475a13bbd.zip u-boot-imx-04de09f89bbc647d5b72db3512d1af1475a13bbd.tar.gz u-boot-imx-04de09f89bbc647d5b72db3512d1af1475a13bbd.tar.bz2 |
Merge branch 'topic/arm/socfpga-20141006' of git://git.denx.de/u-boot-socfpga
Fix a trivial conflict in dw_mmc.c after talking with Marek.
Conflicts:
drivers/mmc/dw_mmc.c
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'board')
-rw-r--r-- | board/altera/socfpga/pll_config.h | 3 | ||||
-rw-r--r-- | board/altera/socfpga/socfpga_cyclone5.c | 6 |
2 files changed, 7 insertions, 2 deletions
diff --git a/board/altera/socfpga/pll_config.h b/board/altera/socfpga/pll_config.h index 9bd0442..f0f59a9 100644 --- a/board/altera/socfpga/pll_config.h +++ b/board/altera/socfpga/pll_config.h @@ -94,6 +94,9 @@ /* Info for driver */ #define CONFIG_HPS_CLK_OSC1_HZ (25000000) +#define CONFIG_HPS_CLK_OSC2_HZ 0 +#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ 0 +#define CONFIG_HPS_CLK_F2S_PER_REF_HZ 0 #define CONFIG_HPS_CLK_MAINVCO_HZ (1600000000) #define CONFIG_HPS_CLK_PERVCO_HZ (1000000000) #ifdef CONFIG_SOCFPGA_ARRIA5 diff --git a/board/altera/socfpga/socfpga_cyclone5.c b/board/altera/socfpga/socfpga_cyclone5.c index fb92852..0f81d89 100644 --- a/board/altera/socfpga/socfpga_cyclone5.c +++ b/board/altera/socfpga/socfpga_cyclone5.c @@ -17,7 +17,7 @@ DECLARE_GLOBAL_DATA_PTR; */ int checkboard(void) { - puts("BOARD : Altera SOCFPGA Cyclone5 Board\n"); + puts("BOARD: Altera SoCFPGA Cyclone5 Board\n"); return 0; } @@ -34,6 +34,8 @@ int board_early_init_f(void) */ int board_init(void) { - icache_enable(); + /* Address of boot parameters for ATAG (if ATAG is used) */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + return 0; } |