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authorSimon Glass <sjg@chromium.org>2012-02-29 07:31:27 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-03-29 08:12:50 +0200
commit3682cc3d2c3af73dd8e343dd41c5b860a658ac46 (patch)
tree0d2ca79df38f657cf6593995e9fa983d20706ee8 /board
parent905fe99b9f7f63f33cb4e669708d29f83ba9676f (diff)
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tegra: i2c: Select I2C ordering for Seaboard
Select the port ordering for I2C on Seaboard. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board')
-rw-r--r--board/nvidia/dts/tegra2-seaboard.dts18
1 files changed, 18 insertions, 0 deletions
diff --git a/board/nvidia/dts/tegra2-seaboard.dts b/board/nvidia/dts/tegra2-seaboard.dts
index ad8169a..6ba3ec4 100644
--- a/board/nvidia/dts/tegra2-seaboard.dts
+++ b/board/nvidia/dts/tegra2-seaboard.dts
@@ -15,6 +15,11 @@
/* This defines the order of our USB ports */
usb0 = "/usb@c5008000";
usb1 = "/usb@c5000000";
+
+ i2c0 = "/i2c@7000d000";
+ i2c1 = "/i2c@7000c000";
+ i2c2 = "/i2c@7000c400";
+ i2c3 = "/i2c@7000c500";
};
memory {
@@ -24,6 +29,7 @@
/* This is not used in U-Boot, but is expected to be in kernel .dts */
i2c@7000d000 {
+ clock-frequency = <100000>;
pmic@34 {
compatible = "ti,tps6586x";
reg = <0x34>;
@@ -71,4 +77,16 @@
usb@c5004000 {
status = "disabled";
};
+
+ i2c@7000c000 {
+ clock-frequency = <100000>;
+ };
+
+ i2c@7000c400 {
+ status = "disabled";
+ };
+
+ i2c@7000c500 {
+ clock-frequency = <100000>;
+ };
};