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authorTom Rini <trini@ti.com>2015-02-13 13:11:33 -0500
committerTom Rini <trini@ti.com>2015-02-13 13:11:33 -0500
commiteca99c02566534940b95ee77b6ea1f098da93adc (patch)
tree9c3361fbc93d02c01a8717d345d25b2c17b192aa /board
parent757566d1567a98f5c331c14f088001dbfe187191 (diff)
parent2e82e9252695a612ab0cbf40fa0c7368515f6506 (diff)
downloadu-boot-imx-eca99c02566534940b95ee77b6ea1f098da93adc.zip
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Merge git://git.denx.de/u-boot-samsung
Diffstat (limited to 'board')
-rw-r--r--board/samsung/common/board.c28
-rw-r--r--board/samsung/odroid/odroid.c12
2 files changed, 30 insertions, 10 deletions
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 8b4c8e9..da2245f 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -355,3 +355,31 @@ int misc_init_r(void)
return 0;
}
#endif
+
+void reset_misc(void)
+{
+ struct gpio_desc gpio = {};
+ int node;
+
+ node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
+ "samsung,emmc-reset");
+ if (node < 0)
+ return;
+
+ gpio_request_by_name_nodev(gd->fdt_blob, node, "reset-gpio", 0, &gpio,
+ GPIOD_IS_OUT);
+
+ if (dm_gpio_is_valid(&gpio)) {
+ /*
+ * Reset eMMC
+ *
+ * FIXME: Need to optimize delay time. Minimum 1usec pulse is
+ * required by 'JEDEC Standard No.84-A441' (eMMC)
+ * document but real delay time is expected to greater
+ * than 1usec.
+ */
+ dm_gpio_set_value(&gpio, 0);
+ mdelay(10);
+ dm_gpio_set_value(&gpio, 1);
+ }
+}
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
index e3517f2..bff6ac9 100644
--- a/board/samsung/odroid/odroid.c
+++ b/board/samsung/odroid/odroid.c
@@ -248,12 +248,12 @@ static void board_clock_init(void)
* MOUTc2c = 800 Mhz
* MOUTpwi = 108 MHz
*
- * sclk_g2d_acp = MOUTg2d / (ratio + 1) = 400 (1)
+ * sclk_g2d_acp = MOUTg2d / (ratio + 1) = 200 (3)
* sclk_c2c = MOUTc2c / (ratio + 1) = 400 (1)
* aclk_c2c = sclk_c2c / (ratio + 1) = 200 (1)
* sclk_pwi = MOUTpwi / (ratio + 1) = 18 (5)
*/
- set = G2D_ACP_RATIO(1) | C2C_RATIO(1) | PWI_RATIO(5) |
+ set = G2D_ACP_RATIO(3) | C2C_RATIO(1) | PWI_RATIO(5) |
C2C_ACLK_RATIO(1) | DVSEM_RATIO(1) | DPM_RATIO(1);
clrsetbits_le32(&clk->div_dmc1, clr, set);
@@ -503,11 +503,3 @@ int board_usb_init(int index, enum usb_init_type init)
return s3c_udc_probe(&s5pc210_otg_data);
}
#endif
-
-void reset_misc(void)
-{
- /* Reset eMMC*/
- gpio_set_value(EXYNOS4X12_GPIO_K12, 0);
- mdelay(10);
- gpio_set_value(EXYNOS4X12_GPIO_K12, 1);
-}