Merge branch 'rmobile' of git://git.denx.de/u-boot-sh

9 files changed, 113 insertions, 103 deletions

diff --git a/board/renesas/alt/Makefile b/board/renesas/alt/Makefile
index 9ed12bd..6904e39 100644
--- a/board/renesas/alt/Makefile
+++ b/board/renesas/alt/Makefile
@@ -6,4 +6,4 @@
 # SPDX-License-Identifier: GPL-2.0
 #
 
-obj-y	:= alt.o qos.o
+obj-y	:= alt.o qos.o ../rcar-gen2-common/common.o
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index 523c5f1..8cc17e9 100644
--- a/board/renesas/alt/alt.c
+++ b/board/renesas/alt/alt.c
@@ -15,6 +15,8 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
 #include <asm/arch/rmobile.h>
+#include <asm/arch/rcar-mstp.h>
+#include <asm/arch/mmc.h>
 #include <netdev.h>
 #include <miiphy.h>
 #include <i2c.h>
@@ -37,30 +39,11 @@ void s_init(void)
 	qos_init();
 }
 
-#define MSTPSR1		0xE6150038
-#define SMSTPCR1	0xE6150134
 #define TMU0_MSTP125	(1 << 25)
-
-#define MSTPSR7		0xE61501C4
-#define SMSTPCR7	0xE615014C
 #define SCIF2_MSTP719	(1 << 19)
-
-#define MSTPSR8		0xE61509A0
-#define SMSTPCR8	0xE6150990
 #define ETHER_MSTP813	(1 << 13)
-
-#define MSTPSR3		0xE6150048
-#define SMSTPCR3	0xE615013C
 #define IIC1_MSTP323	(1 << 23)
-
-#define mstp_setbits(type, addr, saddr, set) \
-	out_##type((saddr), in_##type(addr) | (set))
-#define mstp_clrbits(type, addr, saddr, clear) \
-	out_##type((saddr), in_##type(addr) & ~(clear))
-#define mstp_setbits_le32(addr, saddr, set) \
-	mstp_setbits(le32, addr, saddr, set)
-#define mstp_clrbits_le32(addr, saddr, clear)   \
-	mstp_clrbits(le32, addr, saddr, clear)
+#define MMC0_MSTP315	(1 << 15)
 
 int board_early_init_f(void)
 {
@@ -76,15 +59,13 @@ int board_early_init_f(void)
 	/* IIC1 / sh-i2c ch1 */
 	mstp_clrbits_le32(MSTPSR3, SMSTPCR3, IIC1_MSTP323);
 
+#ifdef CONFIG_SH_MMCIF
+	/* MMC */
+	mstp_clrbits_le32(MSTPSR3, SMSTPCR3, MMC0_MSTP315);
+#endif
 	return 0;
 }
 
-void arch_preboot_os(void)
-{
-	/* Disable TMU0 */
-	mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
-}
-
 int board_init(void)
 {
 	/* adress of boot parameters */
@@ -145,6 +126,19 @@ int board_eth_init(bd_t *bis)
 #endif
 }
 
+int board_mmc_init(bd_t *bis)
+{
+	int ret = 0;
+
+#ifdef CONFIG_SH_MMCIF
+	gpio_request(GPIO_GP_4_31, NULL);
+	gpio_set_value(GPIO_GP_4_31, 1);
+
+	ret = mmcif_mmc_init();
+#endif
+	return ret;
+}
+
 int dram_init(void)
 {
 	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
diff --git a/board/renesas/gose/Makefile b/board/renesas/gose/Makefile
index a4fb6cc..2dac748 100644
--- a/board/renesas/gose/Makefile
+++ b/board/renesas/gose/Makefile
@@ -6,4 +6,4 @@
 # SPDX-License-Identifier: GPL-2.0
 #
 
-obj-y	:= gose.o qos.o
+obj-y	:= gose.o qos.o ../rcar-gen2-common/common.o
diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c
index 715fba0..677b976 100644
--- a/board/renesas/gose/gose.c
+++ b/board/renesas/gose/gose.c
@@ -15,6 +15,7 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
 #include <asm/arch/rmobile.h>
+#include <asm/arch/rcar-mstp.h>
 #include <netdev.h>
 #include <miiphy.h>
 #include <i2c.h>
@@ -41,27 +42,10 @@ void s_init(void)
 	qos_init();
 }
 
-#define MSTPSR1		0xE6150038
-#define SMSTPCR1	0xE6150134
 #define TMU0_MSTP125	(1 << 25)
-
-#define MSTPSR7		0xE61501C4
-#define SMSTPCR7	0xE615014C
 #define SCIF0_MSTP721	(1 << 21)
-
-#define MSTPSR8		0xE61509A0
-#define SMSTPCR8	0xE6150990
 #define ETHER_MSTP813	(1 << 13)
 
-#define mstp_setbits(type, addr, saddr, set) \
-	out_##type((saddr), in_##type(addr) | (set))
-#define mstp_clrbits(type, addr, saddr, clear) \
-	out_##type((saddr), in_##type(addr) & ~(clear))
-#define mstp_setbits_le32(addr, saddr, set) \
-	mstp_setbits(le32, addr, saddr, set)
-#define mstp_clrbits_le32(addr, saddr, clear) \
-	mstp_clrbits(le32, addr, saddr, clear)
-
 int board_early_init_f(void)
 {
 	/* TMU0 */
@@ -76,16 +60,6 @@ int board_early_init_f(void)
 	return 0;
 }
 
-#define TSTR0		0x04
-#define TSTR0_STR0	0x01
-void arch_preboot_os(void)
-{
-	/* stop TMU0 */
-	mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0);
-	/* Disable TMU0 */
-	mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
-}
-
 #define PUPR5		0xE6060114
 #define PUPR5_ETH	0x3FFC0000
 #define PUPR5_ETH_MAGIC	(1 << 27)
diff --git a/board/renesas/koelsch/Makefile b/board/renesas/koelsch/Makefile
index b4d0183..c10bba5 100644
--- a/board/renesas/koelsch/Makefile
+++ b/board/renesas/koelsch/Makefile
@@ -6,4 +6,4 @@
 # SPDX-License-Identifier: GPL-2.0
 #
 
-obj-y	:= koelsch.o qos.o
+obj-y	:= koelsch.o qos.o ../rcar-gen2-common/common.o
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c
index 244bc58..10fa571 100644
--- a/board/renesas/koelsch/koelsch.c
+++ b/board/renesas/koelsch/koelsch.c
@@ -16,6 +16,7 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
 #include <asm/arch/rmobile.h>
+#include <asm/arch/rcar-mstp.h>
 #include <netdev.h>
 #include <miiphy.h>
 #include <i2c.h>
@@ -43,27 +44,10 @@ void s_init(void)
 	qos_init();
 }
 
-#define MSTPSR1		0xE6150038
-#define SMSTPCR1	0xE6150134
 #define TMU0_MSTP125	(1 << 25)
-
-#define MSTPSR7		0xE61501C4
-#define SMSTPCR7	0xE615014C
 #define SCIF0_MSTP721	(1 << 21)
-
-#define MSTPSR8		0xE61509A0
-#define SMSTPCR8	0xE6150990
 #define ETHER_MSTP813	(1 << 13)
 
-#define mstp_setbits(type, addr, saddr, set) \
-	out_##type((saddr), in_##type(addr) | (set))
-#define mstp_clrbits(type, addr, saddr, clear) \
-	out_##type((saddr), in_##type(addr) & ~(clear))
-#define mstp_setbits_le32(addr, saddr, set) \
-	mstp_setbits(le32, addr, saddr, set)
-#define mstp_clrbits_le32(addr, saddr, clear)   \
-	mstp_clrbits(le32, addr, saddr, clear)
-
 int board_early_init_f(void)
 {
 	mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
@@ -77,12 +61,6 @@ int board_early_init_f(void)
 	return 0;
 }
 
-void arch_preboot_os(void)
-{
-	/* Disable TMU0 */
-	mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
-}
-
 /* LSI pin pull-up control */
 #define PUPR5 0xe6060114
 #define PUPR5_ETH 0x3FFC0000
diff --git a/board/renesas/lager/Makefile b/board/renesas/lager/Makefile
index 034c6f8..8d03461 100644
--- a/board/renesas/lager/Makefile
+++ b/board/renesas/lager/Makefile
@@ -6,4 +6,4 @@
 # SPDX-License-Identifier: GPL-2.0
 #
 
-obj-y	:= lager.o qos.o
+obj-y	:= lager.o qos.o ../rcar-gen2-common/common.o
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index 93273b2..d1e29d2 100644
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -18,8 +18,11 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
 #include <asm/arch/rmobile.h>
+#include <asm/arch/rcar-mstp.h>
+#include <asm/arch/mmc.h>
 #include <miiphy.h>
 #include <i2c.h>
+#include <mmc.h>
 #include "qos.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -50,26 +53,10 @@ void s_init(void)
 	qos_init();
 }
 
-#define MSTPSR1	0xE6150038
-#define SMSTPCR1	0xE6150134
 #define TMU0_MSTP125	(1 << 25)
-
-#define MSTPSR7	0xE61501C4
-#define SMSTPCR7	0xE615014C
 #define SCIF0_MSTP721	(1 << 21)
-
-#define MSTPSR8	0xE61509A0
-#define SMSTPCR8	0xE6150990
 #define ETHER_MSTP813	(1 << 13)
-
-#define mstp_setbits(type, addr, saddr, set) \
-	out_##type((saddr), in_##type(addr) | (set))
-#define mstp_clrbits(type, addr, saddr, clear) \
-	out_##type((saddr), in_##type(addr) & ~(clear))
-#define mstp_setbits_le32(addr, saddr, set)	\
-		mstp_setbits(le32, addr, saddr, set)
-#define mstp_clrbits_le32(addr, saddr, clear)	\
-		mstp_clrbits(le32, addr, saddr, clear)
+#define MMC1_MSTP305    (1 << 5)
 
 int board_early_init_f(void)
 {
@@ -79,16 +66,12 @@ int board_early_init_f(void)
 	mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721);
 	/* ETHER */
 	mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813);
+	/* eMMC */
+	mstp_clrbits_le32(MSTPSR3, SMSTPCR3, MMC1_MSTP305);
 
 	return 0;
 }
 
-void arch_preboot_os(void)
-{
-	/* Disable TMU0 */
-	mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
-}
-
 DECLARE_GLOBAL_DATA_PTR;
 int board_init(void)
 {
@@ -163,6 +146,28 @@ int board_phy_config(struct phy_device *phydev)
 	return 0;
 }
 
+int board_mmc_init(bd_t *bis)
+{
+	int ret = 0;
+
+#ifdef CONFIG_SH_MMCIF
+	gpio_request(GPIO_FN_MMC1_D0, NULL);
+	gpio_request(GPIO_FN_MMC1_D1, NULL);
+	gpio_request(GPIO_FN_MMC1_D2, NULL);
+	gpio_request(GPIO_FN_MMC1_D3, NULL);
+	gpio_request(GPIO_FN_MMC1_D4, NULL);
+	gpio_request(GPIO_FN_MMC1_D5, NULL);
+	gpio_request(GPIO_FN_MMC1_D6, NULL);
+	gpio_request(GPIO_FN_MMC1_D7, NULL);
+	gpio_request(GPIO_FN_MMC1_CLK, NULL);
+	gpio_request(GPIO_FN_MMC1_CMD, NULL);
+
+	ret = mmcif_mmc_init();
+#endif
+	return ret;
+}
+
+
 int dram_init(void)
 {
 	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
diff --git a/board/renesas/rcar-gen2-common/common.c b/board/renesas/rcar-gen2-common/common.c
new file mode 100644
index 0000000..0103f42
--- /dev/null
+++ b/board/renesas/rcar-gen2-common/common.c
@@ -0,0 +1,59 @@
+/*
+ * board/renesas/rcar-gen2-common/common.c
+ *
+ * Copyright (C) 2013 Renesas Electronics Corporation
+ * Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/rmobile.h>
+#include <asm/arch/rcar-mstp.h>
+
+#define TSTR0		0x04
+#define TSTR0_STR0	0x01
+
+static struct mstp_ctl mstptbl[] = {
+	{ SMSTPCR0, MSTP0_BITS, CONFIG_SMSTP0_ENA,
+		RMSTPCR0, MSTP0_BITS, CONFIG_RMSTP0_ENA },
+	{ SMSTPCR1, MSTP1_BITS, CONFIG_SMSTP1_ENA,
+		RMSTPCR1, MSTP1_BITS, CONFIG_RMSTP1_ENA },
+	{ SMSTPCR2, MSTP2_BITS, CONFIG_SMSTP2_ENA,
+		RMSTPCR2, MSTP2_BITS, CONFIG_RMSTP2_ENA },
+	{ SMSTPCR3, MSTP3_BITS, CONFIG_SMSTP3_ENA,
+		RMSTPCR3, MSTP3_BITS, CONFIG_RMSTP3_ENA },
+	{ SMSTPCR4, MSTP4_BITS, CONFIG_SMSTP4_ENA,
+		RMSTPCR4, MSTP4_BITS, CONFIG_RMSTP4_ENA },
+	{ SMSTPCR5, MSTP5_BITS, CONFIG_SMSTP5_ENA,
+		RMSTPCR5, MSTP5_BITS, CONFIG_RMSTP5_ENA },
+	/* No MSTP6 */
+	{ SMSTPCR7, MSTP7_BITS, CONFIG_SMSTP7_ENA,
+		RMSTPCR7, MSTP7_BITS, CONFIG_RMSTP7_ENA },
+	{ SMSTPCR8, MSTP8_BITS, CONFIG_SMSTP8_ENA,
+		RMSTPCR8, MSTP8_BITS, CONFIG_RMSTP8_ENA },
+	{ SMSTPCR9, MSTP9_BITS, CONFIG_SMSTP9_ENA,
+		RMSTPCR9, MSTP9_BITS, CONFIG_RMSTP9_ENA },
+	{ SMSTPCR10, MSTP10_BITS, CONFIG_SMSTP10_ENA,
+		 RMSTPCR10, MSTP10_BITS, CONFIG_RMSTP10_ENA },
+	{ SMSTPCR11, MSTP11_BITS, CONFIG_SMSTP1_ENA,
+		 RMSTPCR11, MSTP11_BITS, CONFIG_RMSTP11_ENA },
+};
+
+void arch_preboot_os(void)
+{
+	int i;
+
+	/* stop TMU0 */
+	mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0);
+
+	/* Stop module clock */
+	for (i = 0; i < ARRAY_SIZE(mstptbl); i++) {
+		mstp_setclrbits_le32(mstptbl[i].s_addr, mstptbl[i].s_dis,
+				     mstptbl[i].s_ena);
+		mstp_setclrbits_le32(mstptbl[i].r_addr, mstptbl[i].r_dis,
+				     mstptbl[i].r_ena);
+	}
+}