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authorTom Rini <trini@ti.com>2014-11-04 07:00:48 -0500
committerTom Rini <trini@ti.com>2014-11-04 07:00:48 -0500
commitccc39d66c3c8381690fcfffb794768c55c909460 (patch)
tree70249376d64f734ab928734640001e6aa4596e9f /board
parent4dc949266da6f55ef221e53c637150252b6ac35a (diff)
parent4aa97312f7147b68b8b7c731d7bb01cff8dda2d6 (diff)
downloadu-boot-imx-ccc39d66c3c8381690fcfffb794768c55c909460.zip
u-boot-imx-ccc39d66c3c8381690fcfffb794768c55c909460.tar.gz
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Merge branch 'master' of git://git.denx.de/u-boot-samsung
Diffstat (limited to 'board')
-rw-r--r--board/samsung/odroid/odroid.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
index 5edb250..33003ee 100644
--- a/board/samsung/odroid/odroid.c
+++ b/board/samsung/odroid/odroid.c
@@ -356,21 +356,29 @@ static void board_clock_init(void)
static void board_gpio_init(void)
{
/* eMMC Reset Pin */
+ gpio_request(EXYNOS4X12_GPIO_K12, "eMMC Reset");
+
gpio_cfg_pin(EXYNOS4X12_GPIO_K12, S5P_GPIO_FUNC(0x1));
gpio_set_pull(EXYNOS4X12_GPIO_K12, S5P_GPIO_PULL_NONE);
gpio_set_drv(EXYNOS4X12_GPIO_K12, S5P_GPIO_DRV_4X);
/* Enable FAN (Odroid U3) */
+ gpio_request(EXYNOS4X12_GPIO_D00, "FAN Control");
+
gpio_set_pull(EXYNOS4X12_GPIO_D00, S5P_GPIO_PULL_UP);
gpio_set_drv(EXYNOS4X12_GPIO_D00, S5P_GPIO_DRV_4X);
gpio_direction_output(EXYNOS4X12_GPIO_D00, 1);
/* OTG Vbus output (Odroid U3+) */
+ gpio_request(EXYNOS4X12_GPIO_L20, "OTG Vbus");
+
gpio_set_pull(EXYNOS4X12_GPIO_L20, S5P_GPIO_PULL_NONE);
gpio_set_drv(EXYNOS4X12_GPIO_L20, S5P_GPIO_DRV_4X);
gpio_direction_output(EXYNOS4X12_GPIO_L20, 0);
/* OTG INT (Odroid U3+) */
+ gpio_request(EXYNOS4X12_GPIO_X31, "OTG INT");
+
gpio_set_pull(EXYNOS4X12_GPIO_X31, S5P_GPIO_PULL_UP);
gpio_set_drv(EXYNOS4X12_GPIO_X31, S5P_GPIO_DRV_4X);
gpio_direction_input(EXYNOS4X12_GPIO_X31);
@@ -403,7 +411,6 @@ static void board_init_i2c(void)
int exynos_early_init_f(void)
{
board_clock_init();
- board_gpio_init();
return 0;
}
@@ -414,6 +421,8 @@ int exynos_init(void)
gd->ram_size -= SZ_1M;
gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= SZ_1M;
+ board_gpio_init();
+
return 0;
}