summaryrefslogtreecommitdiff
path: root/board
diff options
context:
space:
mode:
authorIan Campbell <ijc@hellion.org.uk>2014-07-18 20:38:41 +0100
committerHans de Goede <hdegoede@redhat.com>2014-07-31 15:37:22 +0200
commita6e50a88d8d3724fc75f1c6959b80a6c7c69cbad (patch)
tree820888fa2425b2cb4a3fa8dee2cae624ed4702af /board
parent25b4adbba018633b943a99322bfb2fb819c0bafb (diff)
downloadu-boot-imx-a6e50a88d8d3724fc75f1c6959b80a6c7c69cbad.zip
u-boot-imx-a6e50a88d8d3724fc75f1c6959b80a6c7c69cbad.tar.gz
u-boot-imx-a6e50a88d8d3724fc75f1c6959b80a6c7c69cbad.tar.bz2
ahci: provide sunxi SATA driver using AHCI platform framework
This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done for sun7i only since I don't have access to any other sunxi platforms with sata included. The PHY setup is derived from the Alwinner releases and Linux, but is mostly undocumented. The Allwinner AHCI controller also requires some magic (and, again, undocumented) DMA initialisation when starting a port. This is added under a suitable ifdef. This option is enabled for Cubieboard, Cubieboard2 and Cubietruck based on contents of Linux DTS files, including SATA power pin config taken from the DTS. All build tested, but runtime tested on Cubieboard2 and Cubietruck only. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'board')
-rw-r--r--board/sunxi/Makefile1
-rw-r--r--board/sunxi/ahci.c84
2 files changed, 85 insertions, 0 deletions
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index 62acb8f..03f55cc 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -10,6 +10,7 @@
#
obj-y += board.o
obj-$(CONFIG_SUNXI_GMAC) += gmac.o
+obj-$(CONFIG_SUNXI_AHCI) += ahci.o
obj-$(CONFIG_A13_OLINUXINOM) += dram_a13_oli_micro.o
obj-$(CONFIG_CUBIEBOARD) += dram_cubieboard.o
obj-$(CONFIG_CUBIEBOARD2) += dram_cubieboard2.o
diff --git a/board/sunxi/ahci.c b/board/sunxi/ahci.c
new file mode 100644
index 0000000..0c262ea
--- /dev/null
+++ b/board/sunxi/ahci.c
@@ -0,0 +1,84 @@
+#include <common.h>
+#include <ahci.h>
+#include <scsi.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+#define AHCI_PHYCS0R 0x00c0
+#define AHCI_PHYCS1R 0x00c4
+#define AHCI_PHYCS2R 0x00c8
+#define AHCI_RWCR 0x00fc
+
+/* This magic PHY initialisation was taken from the Allwinner releases
+ * and Linux driver, but is completely undocumented.
+ */
+static int sunxi_ahci_phy_init(u32 base)
+{
+ u8 *reg_base = (u8 *)base;
+ u32 reg_val;
+ int timeout;
+
+ writel(0, reg_base + AHCI_RWCR);
+ mdelay(5);
+
+ setbits_le32(reg_base + AHCI_PHYCS1R, 0x1 << 19);
+ clrsetbits_le32(reg_base + AHCI_PHYCS0R,
+ (0x7 << 24),
+ (0x5 << 24) | (0x1 << 23) | (0x1 << 18));
+ clrsetbits_le32(reg_base + AHCI_PHYCS1R,
+ (0x3 << 16) | (0x1f << 8) | (0x3 << 6),
+ (0x2 << 16) | (0x6 << 8) | (0x2 << 6));
+ setbits_le32(reg_base + AHCI_PHYCS1R, (0x1 << 28) | (0x1 << 15));
+ clrbits_le32(reg_base + AHCI_PHYCS1R, (0x1 << 19));
+ clrsetbits_le32(reg_base + AHCI_PHYCS0R, (0x7 << 20), (0x3 << 20));
+ clrsetbits_le32(reg_base + AHCI_PHYCS2R, (0x1f << 5), (0x19 << 5));
+ mdelay(5);
+
+ setbits_le32(reg_base + AHCI_PHYCS0R, (0x1 << 19));
+
+ timeout = 250; /* Power up takes approx 50 us */
+ for (;;) {
+ reg_val = readl(reg_base + AHCI_PHYCS0R) & (0x7 << 28);
+ if (reg_val == (0x2 << 28))
+ break;
+ if (--timeout == 0) {
+ printf("AHCI PHY power up failed.\n");
+ return -EIO;
+ }
+ udelay(1);
+ };
+
+ setbits_le32(reg_base + AHCI_PHYCS2R, (0x1 << 24));
+
+ timeout = 100; /* Calibration takes approx 10 us */
+ for (;;) {
+ reg_val = readl(reg_base + AHCI_PHYCS2R) & (0x1 << 24);
+ if (reg_val == 0x0)
+ break;
+ if (--timeout == 0) {
+ printf("AHCI PHY calibration failed.\n");
+ return -EIO;
+ }
+ udelay(1);
+ }
+
+ mdelay(15);
+
+ writel(0x7, reg_base + AHCI_RWCR);
+
+ return 0;
+}
+
+void scsi_init(void)
+{
+ printf("SUNXI SCSI INIT\n");
+#ifdef CONFIG_SATAPWR
+ gpio_direction_output(CONFIG_SATAPWR, 1);
+#endif
+
+ if (sunxi_ahci_phy_init(SUNXI_SATA_BASE) < 0)
+ return;
+
+ ahci_init(SUNXI_SATA_BASE);
+}