Merge git://www.denx.de/git/u-boot

Conflicts:

	drivers/Makefile

56 files changed, 619 insertions, 197 deletions

diff --git a/board/ads5121/u-boot.lds b/board/ads5121/u-boot.lds
index 34ceb0f..038d849 100644
--- a/board/ads5121/u-boot.lds
+++ b/board/ads5121/u-boot.lds
@@ -51,6 +51,7 @@ SECTIONS
   {
     cpu/mpc512x/start.o	(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)
diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
index 7b16f8a..0067ce0 100644
--- a/board/amcc/luan/luan.c
+++ b/board/amcc/luan/luan.c
@@ -39,8 +39,6 @@ extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  ************************************************************************/
 int board_early_init_f(void)
 {
-	volatile epld_t *x = (epld_t *) CFG_EPLD_BASE;
-
 	mtebc( pb0ap,  0x03800000 );	/* set chip selects */
 	mtebc( pb0cr,  0xffc58000 );	/* ebc0_b0cr, 4MB at 0xffc00000 CS0 */
 	mtebc( pb1ap,  0x03800000 );
@@ -66,8 +64,6 @@ int board_early_init_f(void)
 	mtdcr( uic0sr, 0x00000000 );	/* clear all interrupts */
 	mtdcr( uic0sr, 0xffffffff );
 
-	x->ethuart &= ~EPLD2_RESET_ETH_N; /* put Ethernet+PHY in reset */
-
 	return  0;
 }
 
@@ -79,7 +75,18 @@ int board_early_init_f(void)
 int misc_init_r(void)
 {
 	volatile epld_t *x = (epld_t *) CFG_EPLD_BASE;
-	x->ethuart |= EPLD2_RESET_ETH_N; /* take Ethernet+PHY out of reset */
+
+	/* set modes of operation */
+	x->ethuart |= EPLD2_ETH_MODE_10 | EPLD2_ETH_MODE_100 |
+		EPLD2_ETH_MODE_1000 | EPLD2_ETH_DUPLEX_MODE;
+	/* clear ETHERNET_AUTO_NEGO bit to turn on autonegotiation */
+	x->ethuart &= ~EPLD2_ETH_AUTO_NEGO;
+
+	/* put Ethernet+PHY in reset */
+	x->ethuart &= ~EPLD2_RESET_ETH_N;
+	udelay(10000);
+	/* take Ethernet+PHY out of reset */
+	x->ethuart |= EPLD2_RESET_ETH_N;
 
 	return  0;
 }
diff --git a/board/amcc/sequoia/cmd_sequoia.c b/board/amcc/sequoia/cmd_sequoia.c
index f3803c0..6b9043a 100644
--- a/board/amcc/sequoia/cmd_sequoia.c
+++ b/board/amcc/sequoia/cmd_sequoia.c
@@ -25,6 +25,7 @@
 #include <common.h>
 #include <command.h>
 #include <i2c.h>
+#include <asm/io.h>
 
 /*
  * There are 2 versions of production Sequoia & Rainier platforms.
@@ -39,7 +40,7 @@
  * All Sequoias & Rainiers select from two possible EEPROMs in Boot
  * Config F. One for 33MHz PCI, one for 66MHz PCI. The following
  * values are for the 33MHz PCI configuration. Byte 5 (0 base) is
- * the only  value affected for a 66MHz PCI and simply needs a +0x10.
+ * the only value affected for a 33MHz PCI and simply needs a | 0x08.
  */
 
 #define NAND_COMPATIBLE	0x01
@@ -56,6 +57,7 @@ static char *config_labels[] = {
 	"CPU: 416 PLB: 166 OPB: 83 EBC: 55",
 	"CPU: 500 PLB: 166 OPB: 83 EBC: 55",
 	"CPU: 533 PLB: 133 OPB: 66 EBC: 66",
+	"CPU: 667 PLB: 133 OPB: 66 EBC: 66",
 	"CPU: 667 PLB: 166 OPB: 83 EBC: 55",
 	NULL
 };
@@ -97,6 +99,11 @@ static u8 boot_configs[][17] = {
 		0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
 	},
 	{
+		(NOR_COMPATIBLE),
+		0x87, 0x78, 0xa2, 0x56, 0x09, 0x57, 0xa0, 0x30, 0x40,
+		0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+	},
+	{
 		(NAND_COMPATIBLE | NOR_COMPATIBLE),
 		0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30, 0x40,
 		0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
@@ -200,8 +207,12 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	}
 
 	/* check CPLD register +5 for PCI 66MHz flag */
-	if (in8(CFG_BCSR_BASE + 5) & 0x01)
-		buf[5] += 0x10;
+	if ((in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN) == 0)
+		/*
+		 * PLB-to-PCI divisor = 3 for 33MHz sync PCI
+		 * instead of 2 for 66MHz systems
+		 */
+		buf[5] |= 0x08;
 
 	if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0)
 		printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR);
diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c
index f823117..4e47ab3 100644
--- a/board/amcc/sequoia/sequoia.c
+++ b/board/amcc/sequoia/sequoia.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2006
+ * (C) Copyright 2006-2007
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * (C) Copyright 2006
@@ -24,6 +24,7 @@
 
 #include <common.h>
 #include <asm/processor.h>
+#include <asm/io.h>
 #include <ppc440.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -362,8 +363,8 @@ int checkboard(void)
 	printf("Board: Rainier - AMCC PPC440GRx Evaluation Board");
 #endif
 
-	rev = in8(CFG_BCSR_BASE + 0);
-	val = in8(CFG_BCSR_BASE + 5) & 0x01;
+	rev = in_8((void *)(CFG_BCSR_BASE + 0));
+	val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN;
 	printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33);
 
 	if (s != NULL) {
diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c
index 912f09e..6ec922a 100644
--- a/board/amcc/yosemite/yosemite.c
+++ b/board/amcc/yosemite/yosemite.c
@@ -1,4 +1,6 @@
 /*
+ * (C) Copyright 2006-2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -22,6 +24,7 @@
 #include <common.h>
 #include <ppc4xx.h>
 #include <asm/processor.h>
+#include <asm/io.h>
 #include <spd_sdram.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -181,8 +184,8 @@ int checkboard(void)
 	printf("Board: Yellowstone - AMCC PPC440GR Evaluation Board");
 #endif
 
-	rev = *(u8 *)(CFG_CPLD + 0);
-	val = *(u8 *)(CFG_CPLD + 5) & 0x01;
+	rev = in_8((void *)(CFG_BCSR_BASE + 0));
+	val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN;
 	printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33);
 
 	if (s != NULL) {
diff --git a/board/at91rm9200dk/led.c b/board/at91rm9200dk/led.c
index 0518918..47a3bfc 100644
--- a/board/at91rm9200dk/led.c
+++ b/board/at91rm9200dk/led.c
@@ -66,7 +66,7 @@ void	red_LED_off(void)
 }
 
 
-void LED_init (void)
+void coloured_LED_init (void)
 {
 	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
 	AT91PS_PMC	PMC	= AT91C_BASE_PMC;
diff --git a/board/atmel/atstk1000/flash.c b/board/atmel/atstk1000/flash.c
index 958f4dc..93d790f 100644
--- a/board/atmel/atstk1000/flash.c
+++ b/board/atmel/atstk1000/flash.c
@@ -55,10 +55,6 @@ unsigned long flash_init(void)
 	unsigned long addr;
 	unsigned int i;
 
-	gd->bd->bi_flashstart = CFG_FLASH_BASE;
-	gd->bd->bi_flashsize = CFG_FLASH_SIZE;
-	gd->bd->bi_flashoffset = _edata - _text;
-
 	flash_info[0].size = CFG_FLASH_SIZE;
 	flash_info[0].sector_count = 135;
 
diff --git a/board/cds/common/ft_board.c b/board/cds/common/ft_board.c
index 9d97905..3eda100 100644
--- a/board/cds/common/ft_board.c
+++ b/board/cds/common/ft_board.c
@@ -37,17 +37,24 @@ static void cds_pci_fixup(void *blob)
 
 	map = ft_get_prop(blob, "/" OF_SOC "/pci@8000/interrupt-map", &len);
 
-	len /= sizeof(u32);
+	if (!map)
+		map = ft_get_prop(blob, "/" OF_PCI "/interrupt-map", &len);
 
-	slot = get_pci_slot();
+	if (map) {
+		len /= sizeof(u32);
 
-	for (i=0;i<len;i+=7) {
-		/* We rotate the interrupt pins so that the mapping
-		 * changes depending on the slot the carrier card is in.
-		 */
-		map[3] = ((map[3] + slot - 2) % 4) + 1;
+		slot = get_pci_slot();
 
-		map+=7;
+		for (i=0;i<len;i+=7) {
+			/* We rotate the interrupt pins so that the mapping
+			 * changes depending on the slot the carrier card is in.
+			 */
+			map[3] = ((map[3] + slot - 2) % 4) + 1;
+
+			map+=7;
+		}
+	} else {
+		printf("*** Warning - No PCI node found\n");
 	}
 }
 #endif
diff --git a/board/cm5200/cm5200.c b/board/cm5200/cm5200.c
index b74ac08..e2ab5b8 100644
--- a/board/cm5200/cm5200.c
+++ b/board/cm5200/cm5200.c
@@ -397,6 +397,7 @@ int misc_init_r(void)
 					"operational\n");
 
 	/* set the hostname appropriate to the module we're running on */
+	hostname[0] = 0x00;
 	compose_hostname(hw_id, hostname);
 	setenv("hostname", hostname);
 
diff --git a/board/cogent/u-boot.lds b/board/cogent/u-boot.lds
index d87a39b..5ce2694 100644
--- a/board/cogent/u-boot.lds
+++ b/board/cogent/u-boot.lds
@@ -55,6 +55,7 @@ SECTIONS
   {
     *(.text)
     common/environment.o(.text)
+    *(.fixup)
     *(.got1)
   }
   _etext = .;
diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c
index d29e8d5..a13eeeb 100644
--- a/board/dbau1x00/dbau1x00.c
+++ b/board/dbau1x00/dbau1x00.c
@@ -25,6 +25,7 @@
 #include <command.h>
 #include <asm/au1x00.h>
 #include <asm/mipsregs.h>
+#include <asm/io.h>
 
 long int initdram(int board_type)
 {
@@ -77,6 +78,9 @@ int checkboard (void)
 	default:
 		printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
 	}
+
+	set_io_port_base(0);
+
 #ifdef CONFIG_IDE_PCMCIA
 	/* Enable 3.3 V on slot 0 ( VCC )
 	   No 5V */
diff --git a/board/dbau1x00/u-boot.lds b/board/dbau1x00/u-boot.lds
index 10c9917..8618732 100644
--- a/board/dbau1x00/u-boot.lds
+++ b/board/dbau1x00/u-boot.lds
@@ -43,21 +43,22 @@ SECTIONS
 	. = ALIGN(4);
 	.data  : { *(.data) }
 
-	. = ALIGN(4);
-	.sdata  : { *(.sdata) }
-
-	_gp = ALIGN(16);
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
 
-	__got_start = .;
-	.got  : { *(.got) }
-	__got_end = .;
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
 
 	.sdata  : { *(.sdata) }
 
-	. = .;
-	__u_boot_cmd_start = .;
-	.u_boot_cmd : { *(.u_boot_cmd) }
-	__u_boot_cmd_end = .;
+	.u_boot_cmd : {
+	  __u_boot_cmd_start = .;
+	  *(.u_boot_cmd)
+	  __u_boot_cmd_end = .;
+	}
 
 	uboot_end_data = .;
 	num_got_entries = (__got_end - __got_start) >> 2;
diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c
index fd99a93..45dcf4d 100644
--- a/board/freescale/common/pixis.c
+++ b/board/freescale/common/pixis.c
@@ -207,13 +207,16 @@ void read_from_px_regs_altbank(int set)
 	out8(PIXIS_BASE + PIXIS_VCFGEN1, tmp);
 }
 
+#ifndef CFG_PIXIS_VBOOT_MASK
+#define CFG_PIXIS_VBOOT_MASK	0x40
+#endif
 
 void set_altbank(void)
 {
 	u8 tmp;
 
 	tmp = in8(PIXIS_BASE + PIXIS_VBOOT);
-	tmp ^= 0x40;
+	tmp ^= CFG_PIXIS_VBOOT_MASK;
 
 	out8(PIXIS_BASE + PIXIS_VBOOT, tmp);
 }
diff --git a/board/freescale/common/pq-mds-pib.c b/board/freescale/common/pq-mds-pib.c
index d79f2eb..e4f96e8 100644
--- a/board/freescale/common/pq-mds-pib.c
+++ b/board/freescale/common/pq-mds-pib.c
@@ -79,19 +79,19 @@ int pib_init(void)
 
 	printf("QOC3 ATM card on PMC0\n");
 #elif defined(CONFIG_MPC832XEMDS)
-	val = 0;
-	i2c_write(0x26, 0x7, 1, &val, 1);
-	val = 0xf7;
-	i2c_write(0x26, 0x3, 1, &val, 1);
-
-	val = 0;
-	i2c_write(0x21, 0x6, 1, &val, 1);
-	i2c_write(0x21, 0x7, 1, &val, 1);
-
-	val = 0xdf;
-	i2c_write(0x21, 0x2, 1, &val, 1);
-	val = 0xef;
-	i2c_write(0x21, 0x3, 1, &val, 1);
+	val8 = 0;
+	i2c_write(0x26, 0x7, 1, &val8, 1);
+	val8 = 0xf7;
+	i2c_write(0x26, 0x3, 1, &val8, 1);
+
+	val8 = 0;
+	i2c_write(0x21, 0x6, 1, &val8, 1);
+	i2c_write(0x21, 0x7, 1, &val8, 1);
+
+	val8 = 0xdf;
+	i2c_write(0x21, 0x2, 1, &val8, 1);
+	val8 = 0xef;
+	i2c_write(0x21, 0x3, 1, &val8, 1);
 
 	eieio();
 
diff --git a/board/freescale/m54455evb/config.mk b/board/freescale/m54455evb/config.mk
index ce014ed..b42fcc9 100644
--- a/board/freescale/m54455evb/config.mk
+++ b/board/freescale/m54455evb/config.mk
@@ -22,4 +22,6 @@
 # MA 02111-1307 USA
 #
 
-TEXT_BASE = 0
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/freescale/m54455evb/u-boot.atm b/board/freescale/m54455evb/u-boot.atm
new file mode 100644
index 0000000..bda68e4
--- /dev/null
+++ b/board/freescale/m54455evb/u-boot.atm
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mcf5445x/start.o		(.text)
+    lib_m68k/traps.o		(.text)
+    lib_m68k/interrupts.o	(.text)
+    common/dlmalloc.o		(.text)
+    lib_generic/zlib.o		(.text)
+
+    . = DEFINED(env_offset) ? env_offset : .;
+    common/environment.o	(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+
+  .reloc   :
+  {
+    __got_start = .;
+    *(.got)
+    __got_end = .;
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   _sbss = .;
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+   . = ALIGN(4);
+   _ebss = .;
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
diff --git a/board/freescale/m54455evb/u-boot.int b/board/freescale/m54455evb/u-boot.int
new file mode 100644
index 0000000..e480c29
--- /dev/null
+++ b/board/freescale/m54455evb/u-boot.int
@@ -0,0 +1,141 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mcf5445x/start.o		(.text)
+    lib_m68k/traps.o		(.text)
+    lib_m68k/interrupts.o	(.text)
+    common/dlmalloc.o		(.text)
+    lib_generic/zlib.o		(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+
+  .reloc   :
+  {
+    __got_start = .;
+    *(.got)
+    __got_end = .;
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   _sbss = .;
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+   . = ALIGN(4);
+   _ebss = .;
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 76d9091..b6c9e93 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -227,7 +227,7 @@ pci_init_board(void)
 		 * Activate ULI1575 legacy chip by performing a fake
 		 * memory access.  Needed to make ULI RTC work.
 		 */
-		in_be32(CFG_PCIE3_MEM_BASE);
+		in_be32((u32 *)CFG_PCIE3_MEM_BASE);
 	} else {
 		printf ("    PCIE3: disabled\n");
 	}
diff --git a/board/gth2/gth2.c b/board/gth2/gth2.c
index ffeaf58..6da80dc 100644
--- a/board/gth2/gth2.c
+++ b/board/gth2/gth2.c
@@ -26,14 +26,13 @@
 #include <asm/au1x00.h>
 #include <asm/addrspace.h>
 #include <asm/mipsregs.h>
+#include <asm/io.h>
 #include <watchdog.h>
 
 #include "ee_access.h"
 
 static int wdi_status = 0;
 
-unsigned long mips_io_port_base = 0;
-
 #define SDRAM_SIZE ((64*1024*1024)-(12*4096))
 
 
@@ -147,6 +146,9 @@ int checkboard (void)
 	default:
 		printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
 	}
+
+	set_io_port_base(0);
+
 #ifdef CONFIG_IDE_PCMCIA
 	/* PCMCIA is on a 36 bit physical address.
 	   We need to map it into a 32 bit addresses */
@@ -429,7 +431,7 @@ int misc_init_r(void){
 	    (Rx[8] != ':') | (Rx[11] != ':') | (Rx[14] != ':')) {
 		printf ("*** ethernet addr invalid, using default ***\n");
 	} else {
-		setenv ("ethaddr", Rx);
+		setenv ("ethaddr", (char *)Rx);
 	}
 	return (0);
 }
diff --git a/board/gth2/lowlevel_init.S b/board/gth2/lowlevel_init.S
index 983ff70..eea378a 100644
--- a/board/gth2/lowlevel_init.S
+++ b/board/gth2/lowlevel_init.S
@@ -413,7 +413,9 @@ noCacheJump:
 	j clearmem
 	nop
 
+#if 0
 	.globl	memtest
+#endif
 memtest:
 	/* Fill memory with address */
 	li	t0, 0x80000000
@@ -434,7 +436,9 @@ mt1:	lw	t2, 0(t0)
 	bne	t1, zero, mt1
 	nop
 	nop
+#if 0
 	.globl	clearmem
+#endif
 clearmem:
 		/* Clear memory */
 	li	t0, 0x80000000
diff --git a/board/gth2/u-boot.lds b/board/gth2/u-boot.lds
index 8ba0b6d..ce53d9d 100644
--- a/board/gth2/u-boot.lds
+++ b/board/gth2/u-boot.lds
@@ -43,20 +43,22 @@ SECTIONS
 	. = ALIGN(4);
 	.data  : { *(.data) }
 
-	. = ALIGN(4);
-	.sdata  : { *(.sdata) }
-
-	_gp = ALIGN(16);
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
 
-	__got_start = .;
-	.got  : { *(.got) }
-	__got_end = .;
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
 
 	.sdata  : { *(.sdata) }
 
-	__u_boot_cmd_start = .;
-	.u_boot_cmd : { *(.u_boot_cmd) }
-	__u_boot_cmd_end = .;
+	.u_boot_cmd : {
+	  __u_boot_cmd_start = .;
+	  *(.u_boot_cmd)
+	  __u_boot_cmd_end = .;
+	}
 
 	uboot_end_data = .;
 	num_got_entries = (__got_end - __got_start) >> 2;
diff --git a/board/hymod/u-boot.lds b/board/hymod/u-boot.lds
index 9bf0f09..337a395 100644
--- a/board/hymod/u-boot.lds
+++ b/board/hymod/u-boot.lds
@@ -69,6 +69,7 @@ SECTIONS
     common/environment.o(.text)
 
     *(.text)
+    *(.fixup)
     *(.got1)
   }
   _etext = .;
diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c
index 19823a4..b05424d 100644
--- a/board/ids8247/ids8247.c
+++ b/board/ids8247/ids8247.c
@@ -25,6 +25,12 @@
 #include <ioports.h>
 #include <mpc8260.h>
 
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#include <libfdt_env.h>
+#include <fdt_support.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -38,12 +44,12 @@ const iop_conf_t iop_conf_tab[4][32] = {
 
     /* Port A configuration */
     {	/*	      conf ppar psor pdir podr pdat */
-	/* PA31 */ {   0,   1,	 1,   0,   0,	0   }, /* FCC1 COL */
-	/* PA30 */ {   0,   1,	 1,   0,   0,	0   }, /* FCC1 CRS */
-	/* PA29 */ {   0,   1,	 1,   1,   0,	0   }, /* FCC1 TXER */
-	/* PA28 */ {   0,   1,	 1,   1,   0,	0   }, /* FCC1 TXEN */
-	/* PA27 */ {   0,   1,	 1,   0,   0,	0   }, /* FCC1 RXDV */
-	/* PA26 */ {   0,   1,	 1,   0,   0,	0   }, /* FCC1 RXER */
+	/* PA31 */ {   1,   1,	 1,   0,   0,	0   }, /* FCC1 COL */
+	/* PA30 */ {   1,   1,	 1,   0,   0,	0   }, /* FCC1 CRS */
+	/* PA29 */ {   1,   1,	 1,   1,   0,	0   }, /* FCC1 TXER */
+	/* PA28 */ {   1,   1,	 1,   1,   0,	0   }, /* FCC1 TXEN */
+	/* PA27 */ {   1,   1,	 1,   0,   0,	0   }, /* FCC1 RXDV */
+	/* PA26 */ {   1,   1,	 1,   0,   0,	0   }, /* FCC1 RXER */
 	/* PA25 */ {   0,   0,	 0,   0,   1,	0   }, /* 8247_P0 */
 #if defined(CONFIG_SOFT_I2C)
 	/* PA24 */ {   1,   0,	 0,   0,   1,	1   }, /* I2C_SDA2 */
@@ -53,14 +59,14 @@ const iop_conf_t iop_conf_tab[4][32] = {
 	/* PA23 */ {   0,   0,	 0,   1,   0,	0   }, /* PA23 */
 #endif
 	/* PA22 */ {   0,   0,	 0,   0,   1,	0   }, /* SMC2_DCD */
-	/* PA21 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC1 TXD3 */
-	/* PA20 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC1 TXD2 */
-	/* PA19 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC1 TXD1 */
-	/* PA18 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC1 TXD0 */
-	/* PA17 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC1 RXD0 */
-	/* PA16 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC1 RXD1 */
-	/* PA15 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC1 RXD2 */
-	/* PA14 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC1 RXD3 */
+	/* PA21 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC1 TXD3 */
+	/* PA20 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC1 TXD2 */
+	/* PA19 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC1 TXD1 */
+	/* PA18 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC1 TXD0 */
+	/* PA17 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC1 RXD0 */
+	/* PA16 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC1 RXD1 */
+	/* PA15 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC1 RXD2 */
+	/* PA14 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC1 RXD3 */
 	/* PA13 */ {   0,   0,	 0,   1,   1,	0   }, /* SMC2_RTS */
 	/* PA12 */ {   0,   0,	 0,   0,   1,	0   }, /* SMC2_CTS */
 	/* PA11 */ {   0,   0,	 0,   1,   1,	0   }, /* SMC2_DTR */
@@ -79,20 +85,20 @@ const iop_conf_t iop_conf_tab[4][32] = {
 
     /* Port B configuration */
     {	/*	      conf ppar psor pdir podr pdat */
-	/* PB31 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC2 MII TX_ER */
-	/* PB30 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RX_DV */
-	/* PB29 */ {   1,   1,	 1,   1,   0,	0   }, /* FCC2 MII TX_EN */
-	/* PB28 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RX_ER */
-	/* PB27 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII COL */
-	/* PB26 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII CRS */
-	/* PB25 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[3] */
-	/* PB24 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[2] */
-	/* PB23 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[1] */
-	/* PB22 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[0] */
-	/* PB21 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[0] */
-	/* PB20 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[1] */
-	/* PB19 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[2] */
-	/* PB18 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[3] */
+	/* PB31 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC2 MII TX_ER */
+	/* PB30 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII RX_DV */
+	/* PB29 */ {   0,   1,	 1,   1,   0,	0   }, /* FCC2 MII TX_EN */
+	/* PB28 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII RX_ER */
+	/* PB27 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII COL */
+	/* PB26 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII CRS */
+	/* PB25 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[3] */
+	/* PB24 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[2] */
+	/* PB23 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[1] */
+	/* PB22 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[0] */
+	/* PB21 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[0] */
+	/* PB20 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[1] */
+	/* PB19 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[2] */
+	/* PB18 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[3] */
 	/* PB17 */ {   0,   0,	 0,   0,   0,	0   }, /* PB17 */
 	/* PB16 */ {   0,   0,	 0,   0,   0,	0   }, /* PB16 */
 	/* PB15 */ {   0,   0,	 0,   0,   0,	0   }, /* PB15 */
@@ -123,8 +129,8 @@ const iop_conf_t iop_conf_tab[4][32] = {
 	/* PC26 */ {   0,   0,	 0,   1,   0,	0   }, /* PC26 */
 	/* PC25 */ {   0,   1,	 1,   0,   0,	0   }, /* SYNC_IN */
 	/* PC24 */ {   0,   0,	 0,   1,   0,	0   }, /* PC24 */
-	/* PC23 */ {   0,   1,	 0,   1,   0,	0   }, /* ATMTFCLK */
-	/* PC22 */ {   0,   1,	 0,   0,   0,	0   }, /* ATMRFCLK */
+	/* PC23 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC1 MII TX_CLK */
+	/* PC22 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC1 MII RX_CLK */
 	/* PC21 */ {   0,   1,	 0,   0,   0,	0   }, /* SCC1 EN RXCLK */
 	/* PC20 */ {   0,   1,	 0,   0,   0,	0   }, /* SCC1 EN TXCLK */
 	/* PC19 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RX_CLK */
@@ -180,7 +186,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
 	/* PD10 */ {   0,   0,	 0,   0,   0,	0   }, /* PD10 */
 	/* PD9	*/ {   0,   0,	 0,   0,   0,	0   }, /* PD9 */
 	/* PD8	*/ {   0,   0,	 0,   0,   0,	0   }, /* PD8 */
-	/* PD7	*/ {   0,   0,	 0,   1,   0,	1   }, /* MII_MDIO */
+	/* PD7	*/ {   1,   0,	 0,   1,   0,	1   }, /* MII_MDIO */
 	/* PD6	*/ {   0,   0,	 0,   1,   0,	1   }, /* PD6 */
 	/* PD5	*/ {   0,   0,	 0,   1,   0,	1   }, /* PD5 */
 	/* PD4	*/ {   0,   0,	 0,   1,   0,	1   }, /* PD4 */
@@ -224,7 +230,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
 	 * mapped by the controller. That means, that the initial mapping has
 	 * to be (at least) twice as large as the maximum expected size.
 	 */
-	maxsize = (1 + (~orx | 0x7fff)) / 2;
+	maxsize = (1 + (~orx | 0x7fff))/* / 2*/;
 
 	sdmr_ptr = &memctl->memc_psdmr;
 	orx_ptr = &memctl->memc_or2;
@@ -315,4 +321,38 @@ nand_init (void)
 	printf ("%4lu MB\n", totlen >>20);
 }
 
-#endif
+#endif	/* CFG_CMD_NAND */
+
+#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
+/*
+ * update "memory" property in the blob
+ */
+void ft_blob_update(void *blob, bd_t *bd)
+{
+	int ret, nodeoffset = 0;
+	ulong memory_data[2] = {0};
+
+	memory_data[0] = cpu_to_be32(bd->bi_memstart);
+	memory_data[1] = cpu_to_be32(bd->bi_memsize);
+
+	nodeoffset = fdt_find_node_by_path (blob, "/memory");
+	if (nodeoffset >= 0) {
+		ret = fdt_setprop(blob, nodeoffset, "reg", memory_data,
+					sizeof(memory_data));
+	if (ret < 0)
+		printf("ft_blob_update): cannot set /memory/reg "
+			"property err:%s\n", fdt_strerror(ret));
+	}
+	else {
+		/* memory node is required in dts */
+		printf("ft_blob_update(): cannot find /memory node "
+		"err:%s\n", fdt_strerror(nodeoffset));
+	}
+}
+
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup( blob, bd);
+	ft_blob_update(blob, bd);
+}
+#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
diff --git a/board/incaip/incaip.c b/board/incaip/incaip.c
index b5d9e00..dbf0ecc 100644
--- a/board/incaip/incaip.c
+++ b/board/incaip/incaip.c
@@ -25,7 +25,7 @@
 #include <command.h>
 #include <asm/addrspace.h>
 #include <asm/inca-ip.h>
-
+#include <asm/io.h>
 
 extern uint incaip_get_cpuclk(void);
 
@@ -85,7 +85,6 @@ long int initdram(int board_type)
 
 int checkboard (void)
 {
-
 	unsigned long chipid = *INCA_IP_WDT_CHIPID;
 	int part_num;
 
@@ -107,5 +106,7 @@ int checkboard (void)
 
 	printf("CPU Speed %d MHz\n", incaip_get_cpuclk()/1000000);
 
+	set_io_port_base(0);
+
 	return 0;
 }
diff --git a/board/incaip/u-boot.lds b/board/incaip/u-boot.lds
index 10c9917..8618732 100644
--- a/board/incaip/u-boot.lds
+++ b/board/incaip/u-boot.lds
@@ -43,21 +43,22 @@ SECTIONS
 	. = ALIGN(4);
 	.data  : { *(.data) }
 
-	. = ALIGN(4);
-	.sdata  : { *(.sdata) }
-
-	_gp = ALIGN(16);
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
 
-	__got_start = .;
-	.got  : { *(.got) }
-	__got_end = .;
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
 
 	.sdata  : { *(.sdata) }
 
-	. = .;
-	__u_boot_cmd_start = .;
-	.u_boot_cmd : { *(.u_boot_cmd) }
-	__u_boot_cmd_end = .;
+	.u_boot_cmd : {
+	  __u_boot_cmd_start = .;
+	  *(.u_boot_cmd)
+	  __u_boot_cmd_end = .;
+	}
 
 	uboot_end_data = .;
 	num_got_entries = (__got_end - __got_start) >> 2;
diff --git a/board/innokom/innokom.c b/board/innokom/innokom.c
index 7f8f47c..c2b88ae 100644
--- a/board/innokom/innokom.c
+++ b/board/innokom/innokom.c
@@ -72,7 +72,7 @@ int i2c_init_board(void)
 
 int misc_init_r(void)
 {
-	uchar *str;
+	char *str;
 
 	/* determine if the software update key is pressed during startup   */
 	if (GPLR0 & 0x00000800) {
diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c
index 77f9989..9b24a7e 100644
--- a/board/lwmon5/lwmon5.c
+++ b/board/lwmon5/lwmon5.c
@@ -96,6 +96,23 @@ int board_early_init_f(void)
 
 	gpio_write_bit(CFG_GPIO_FLASH_WP, 1);
 
+	/*
+	 * Reset PHY's:
+	 * The PHY's need a 2nd reset pulse, since the MDIO address is latched
+	 * upon reset, and with the first reset upon powerup, the addresses are
+	 * not latched reliable, since the IRQ line is multiplexed with an
+	 * MDIO address. A 2nd reset at this time will make sure, that the
+	 * correct address is latched.
+	 */
+	gpio_write_bit(CFG_GPIO_PHY0_RST, 1);
+	gpio_write_bit(CFG_GPIO_PHY1_RST, 1);
+	udelay(1000);
+	gpio_write_bit(CFG_GPIO_PHY0_RST, 0);
+	gpio_write_bit(CFG_GPIO_PHY1_RST, 0);
+	udelay(1000);
+	gpio_write_bit(CFG_GPIO_PHY0_RST, 1);
+	gpio_write_bit(CFG_GPIO_PHY1_RST, 1);
+
 	return 0;
 }
 
@@ -231,15 +248,6 @@ int misc_init_r(void)
 	out_be32((void *)CFG_LIME_MMR, CFG_LIME_MMR_VALUE);
 
 	/*
-	 * Reset PHY's
-	 */
-	gpio_write_bit(CFG_GPIO_PHY0_RST, 0);
-	gpio_write_bit(CFG_GPIO_PHY1_RST, 0);
-	udelay(100);
-	gpio_write_bit(CFG_GPIO_PHY0_RST, 1);
-	gpio_write_bit(CFG_GPIO_PHY1_RST, 1);
-
-	/*
 	 * Init display controller
 	 */
 	/* Setup dot clock (internal PLL, division rate 1/16) */
diff --git a/board/m5282evb/m5282evb.c b/board/m5282evb/m5282evb.c
index 243d6a4..7d6d1d6 100644
--- a/board/m5282evb/m5282evb.c
+++ b/board/m5282evb/m5282evb.c
@@ -89,4 +89,5 @@ long int initdram (int board_type)
 		/* Write to the SDRAM Mode Register */
 		*(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xA5A59696;
 	}
+	return dramsize;
 }
diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c
index f83998e..68257b8 100644
--- a/board/motionpro/motionpro.c
+++ b/board/motionpro/motionpro.c
@@ -138,6 +138,12 @@ long int initdram(int board_type)
 #ifndef CFG_RAMBOOT
 	ulong test1, test2;
 
+	/* According to AN3221 (MPC5200B SDRAM Initialization and
+	 * Configuration), the SDelay register must be written a value of
+	 * 0x00000004 as the first step of the SDRAM contorller configuration.
+	 */
+	*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
+
 	/* configure SDRAM start/end for detection */
 	*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
 	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
diff --git a/board/mousse/u-boot.lds b/board/mousse/u-boot.lds
index eb4d8e4..57358b8 100644
--- a/board/mousse/u-boot.lds
+++ b/board/mousse/u-boot.lds
@@ -60,6 +60,7 @@ SECTIONS
     lib_generic/crc32.o		(.text)
     lib_generic/zlib.o		(.text)
 
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)
diff --git a/board/mpl/vcma9/flash.c b/board/mpl/vcma9/flash.c
index ccfe176..d15a191 100644
--- a/board/mpl/vcma9/flash.c
+++ b/board/mpl/vcma9/flash.c
@@ -290,7 +290,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
  * Copy memory to flash
  */
 
-volatile static int write_hword (flash_info_t * info, ulong dest, ushort data)
+static int write_hword (flash_info_t * info, ulong dest, ushort data)
 {
 	vu_short *addr = (vu_short *) dest;
 	ushort result;
diff --git a/board/mpl/vcma9/vcma9.c b/board/mpl/vcma9/vcma9.c
index 45ab654..a4c463a 100644
--- a/board/mpl/vcma9/vcma9.c
+++ b/board/mpl/vcma9/vcma9.c
@@ -288,7 +288,7 @@ int dram_init(void)
 
 int checkboard(void)
 {
-	unsigned char s[50];
+	char s[50];
 	int i;
 	backup_t *b = (backup_t *) s;
 
@@ -337,7 +337,7 @@ int overwrite_console(void)
 ************************************************************************/
 void print_vcma9_info(void)
 {
-	unsigned char s[50];
+	char s[50];
 	int i;
 
 	if ((i = getenv_r("serial#", s, 32)) < 0) {
diff --git a/board/mpl/vcma9/vcma9.h b/board/mpl/vcma9/vcma9.h
index 7a32343..220b705 100644
--- a/board/mpl/vcma9/vcma9.h
+++ b/board/mpl/vcma9/vcma9.h
@@ -128,7 +128,7 @@ typedef struct {
 } /*__attribute__((__packed__))*/ VCMA9_PLD;
 
 #define VCMA9_PLD_BASE	0x2C000100
-static inline VCMA9_PLD * const VCMA9_GetBase_PLD(void)
+static inline VCMA9_PLD * VCMA9_GetBase_PLD(void)
 {
 	return (VCMA9_PLD * const)VCMA9_PLD_BASE;
 }
diff --git a/board/pb1x00/Makefile b/board/pb1x00/Makefile
index f7d5841..afe02c2 100644
--- a/board/pb1x00/Makefile
+++ b/board/pb1x00/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).a
 
 COBJS	= $(BOARD).o flash.o
-SOBJS	= memsetup.o
+SOBJS	= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/pb1x00/memsetup.S b/board/pb1x00/lowlevel_init.S
index 44f02b9..e851e2f 100644
--- a/board/pb1x00/memsetup.S
+++ b/board/pb1x00/lowlevel_init.S
@@ -15,8 +15,8 @@
 	.set noreorder
 	.set mips32
 
-	.globl	memsetup
-memsetup:
+	.globl	lowlevel_init
+lowlevel_init:
 	/*
 	 * Step 1) Establish CPU endian mode.
 	 * NOTE: A fair amount of code is necessary on the Pb1000 to
diff --git a/board/pb1x00/pb1x00.c b/board/pb1x00/pb1x00.c
index 40ac2a4..536c954 100644
--- a/board/pb1x00/pb1x00.c
+++ b/board/pb1x00/pb1x00.c
@@ -25,6 +25,7 @@
 #include <command.h>
 #include <asm/au1x00.h>
 #include <asm/mipsregs.h>
+#include <asm/io.h>
 
 long int initdram(int board_type)
 {
@@ -41,7 +42,9 @@ void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
 
 int checkboard (void)
 {
+#if defined(CONFIG_IDE_PCMCIA) && 0
 	u16 status;
+#endif
 	/* volatile u32 *pcmcia_bcsr = (u32*)(DB1000_BCSR_ADDR+0x10); */
 	volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL;
 	u32 proc_id;
@@ -69,6 +72,9 @@ int checkboard (void)
 	default:
 		printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
 	}
+
+	set_io_port_base(0);
+
 #if defined(CONFIG_IDE_PCMCIA) && 0
 	/* Enable 3.3 V on slot 0 ( VCC )
 	   No 5V */
diff --git a/board/pb1x00/u-boot.lds b/board/pb1x00/u-boot.lds
index a2d19a8..8618732 100644
--- a/board/pb1x00/u-boot.lds
+++ b/board/pb1x00/u-boot.lds
@@ -43,20 +43,22 @@ SECTIONS
 	. = ALIGN(4);
 	.data  : { *(.data) }
 
-	. = ALIGN(4);
-	.sdata  : { *(.sdata) }
-
-	_gp = ALIGN(16);
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
 
-	__got_start = .;
-	.got  : { *(.got) }
-	__got_end = .;
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
 
 	.sdata  : { *(.sdata) }
 
-	__u_boot_cmd_start = .;
-	.u_boot_cmd : { *(.u_boot_cmd) }
-	__u_boot_cmd_end = .;
+	.u_boot_cmd : {
+	  __u_boot_cmd_start = .;
+	  *(.u_boot_cmd)
+	  __u_boot_cmd_end = .;
+	}
 
 	uboot_end_data = .;
 	num_got_entries = (__got_end - __got_start) >> 2;
diff --git a/board/pleb2/flash.c b/board/pleb2/flash.c
index 97271d9..5a1eba6 100644
--- a/board/pleb2/flash.c
+++ b/board/pleb2/flash.c
@@ -196,7 +196,7 @@ void flash_print_info (flash_info_t * info)
 	int i;
 	uchar *boottype;
 	uchar *bootletter;
-	uchar *fmt;
+	char *fmt;
 	uchar botbootletter[] = "B";
 	uchar topbootletter[] = "T";
 	uchar botboottype[] = "bottom boot sector";
diff --git a/board/purple/flash.c b/board/purple/flash.c
index 7522580..1baae35 100644
--- a/board/purple/flash.c
+++ b/board/purple/flash.c
@@ -299,7 +299,7 @@ void flash_print_info (flash_info_t *info)
 	int i;
 	uchar *boottype;
 	uchar *bootletter;
-	uchar *fmt;
+	char *fmt;
 	uchar botbootletter[] = "B";
 	uchar topbootletter[] = "T";
 	uchar botboottype[] = "bottom boot sector";
diff --git a/board/purple/purple.c b/board/purple/purple.c
index 4c3e5b4..74718af 100644
--- a/board/purple/purple.c
+++ b/board/purple/purple.c
@@ -26,6 +26,7 @@
 #include <asm/inca-ip.h>
 #include <asm/regdef.h>
 #include <asm/mipsregs.h>
+#include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/cacheops.h>
 
@@ -145,6 +146,8 @@ int checkboard (void)
 
 	printf("CPU Speed %d MHz\n", CPU_CLOCK_RATE/1000000);
 
+	set_io_port_base(0);
+
 	return 0;
 }
 
diff --git a/board/purple/u-boot.lds b/board/purple/u-boot.lds
index 1bdac1f..50e7f84 100644
--- a/board/purple/u-boot.lds
+++ b/board/purple/u-boot.lds
@@ -53,21 +53,22 @@ SECTIONS
 	. = ALIGN(4);
 	.data  : { *(.data) }
 
-	. = ALIGN(4);
-	.sdata  : { *(.sdata) }
-
-	_gp = ALIGN(16);
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
 
-	__got_start = .;
-	.got  : { *(.got) }
-	__got_end = .;
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
 
 	.sdata  : { *(.sdata) }
 
-	. = .;
-	__u_boot_cmd_start = .;
-	.u_boot_cmd : { *(.u_boot_cmd) }
-	__u_boot_cmd_end = .;
+	.u_boot_cmd : {
+	  __u_boot_cmd_start = .;
+	  *(.u_boot_cmd)
+	  __u_boot_cmd_end = .;
+	}
 
 	uboot_end_data = .;
 	num_got_entries = (__got_end - __got_start) >> 2;
diff --git a/board/pxa255_idp/Makefile b/board/pxa255_idp/Makefile
index a957dd3..32399f0 100644
--- a/board/pxa255_idp/Makefile
+++ b/board/pxa255_idp/Makefile
@@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).a
 
 COBJS	:= pxa_idp.o
-SOBJS	:= memsetup.o
+SOBJS	:= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/pxa255_idp/config.mk b/board/pxa255_idp/config.mk
index d2a2040..55c8b27 100644
--- a/board/pxa255_idp/config.mk
+++ b/board/pxa255_idp/config.mk
@@ -1,3 +1,3 @@
 #TEXT_BASE = 0xa1700000
-TEXT_BASE = 0xa3000000
+TEXT_BASE = 0xa3080000
 #TEXT_BASE = 0
diff --git a/board/pxa255_idp/memsetup.S b/board/pxa255_idp/lowlevel_init.S
index 7e485a2..aaa4d8e 100644
--- a/board/pxa255_idp/memsetup.S
+++ b/board/pxa255_idp/lowlevel_init.S
@@ -3,7 +3,7 @@
  *
  * NOTE: I haven't clean this up considerably, just enough to get it
  * running. See hal_platform_setup.h for the source. See
- * board/cradle/memsetup.S for another PXA250 setup that is
+ * board/cradle/lowlevel_init.S for another PXA250 setup that is
  * much cleaner.
  *
  * See file CREDITS for list of people who contributed to this
@@ -41,8 +41,8 @@ DRAM_SIZE:  .long   CFG_DRAM_SIZE
 /*
  * 	Memory setup
  */
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
 
 	mov      r10, lr
 
@@ -395,7 +395,7 @@ initclks:
 
 	/* Save SDRAM size */
 	ldr     r1, =DRAM_SIZE
-	 str	   r8, [r1]
+	str     r8, [r1]
 
 	/* Interrupt init: Mask all interrupts                              */
 	ldr	r0, =ICMR /* enable no sources */
@@ -426,7 +426,7 @@ initclks:
 	bl 	blink
 #endif
 
-endmemsetup:
+endlowlevel_init:
 
 	mov     pc, r10
 
diff --git a/board/pxa255_idp/u-boot.lds b/board/pxa255_idp/u-boot.lds
index 20ce108..2facd83 100644
--- a/board/pxa255_idp/u-boot.lds
+++ b/board/pxa255_idp/u-boot.lds
@@ -44,6 +44,7 @@ SECTIONS
 	. = ALIGN(4);
 	.got : { *(.got) }
 
+	. = .;
 	__u_boot_cmd_start = .;
 	.u_boot_cmd : { *(.u_boot_cmd) }
 	__u_boot_cmd_end = .;
diff --git a/board/rsdproto/rsdproto.c b/board/rsdproto/rsdproto.c
index bf4fd53..312d4b8 100644
--- a/board/rsdproto/rsdproto.c
+++ b/board/rsdproto/rsdproto.c
@@ -210,7 +210,7 @@ void read_RS5C372_time (struct tm *timedate)
 
 #define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
 
-	if (i2c_read (RS5C372_PPC_I2C_ADR, 0, 1, buffer, sizeof (buffer))) {
+	if (! i2c_read (RS5C372_PPC_I2C_ADR, 0, 1, buffer, sizeof (buffer))) {
 		timedate->tm_sec = BCD_TO_BIN (buffer[0]);
 		timedate->tm_min = BCD_TO_BIN (buffer[1]);
 		timedate->tm_hour = BCD_TO_BIN (buffer[2]);
@@ -231,7 +231,7 @@ int read_LM84_temp (int address)
 	unsigned char buffer[8];
 	/*int rc;*/
 
-	if (i2c_read (address, 0, 1, buffer, 1)) {
+	if (! i2c_read (address, 0, 1, buffer, 1)) {
 		return (int) buffer[0];
 	} else {
 		/*printf("i2c error %02x\n", rc); */
diff --git a/board/rsdproto/u-boot.lds b/board/rsdproto/u-boot.lds
index 9bd6248..70fc3a5 100644
--- a/board/rsdproto/u-boot.lds
+++ b/board/rsdproto/u-boot.lds
@@ -55,6 +55,7 @@ SECTIONS
   {
     cpu/mpc8260/start.o	(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     /*. = env_offset; */
   }
diff --git a/board/sbc2410x/flash.c b/board/sbc2410x/flash.c
index f2718f2..0c669e4 100644
--- a/board/sbc2410x/flash.c
+++ b/board/sbc2410x/flash.c
@@ -288,7 +288,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
  * Copy memory to flash
  */
 
-volatile static int write_hword (flash_info_t * info, ulong dest, ushort data)
+static int write_hword (flash_info_t * info, ulong dest, ushort data)
 {
 	vu_short *addr = (vu_short *) dest;
 	ushort result;
diff --git a/board/smdk2410/flash.c b/board/smdk2410/flash.c
index 993946b..376930b 100644
--- a/board/smdk2410/flash.c
+++ b/board/smdk2410/flash.c
@@ -290,7 +290,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
  * Copy memory to flash
  */
 
-volatile static int write_hword (flash_info_t * info, ulong dest, ushort data)
+static int write_hword (flash_info_t * info, ulong dest, ushort data)
 {
 	vu_short *addr = (vu_short *) dest;
 	ushort result;
diff --git a/board/tb0229/tb0229.c b/board/tb0229/tb0229.c
index e7914bd..61c2e9b 100644
--- a/board/tb0229/tb0229.c
+++ b/board/tb0229/tb0229.c
@@ -13,10 +13,9 @@
 #include <command.h>
 #include <asm/addrspace.h>
 #include <asm/inca-ip.h>
+#include <asm/io.h>
 #include <pci.h>
 
-unsigned long mips_io_port_base = 0;
-
 #if defined(CONFIG_PCI)
 static struct pci_controller hose;
 
@@ -26,17 +25,17 @@ void pci_init_board (void)
 }
 #endif
 
-
 long int initdram(int board_type)
 {
 	return get_ram_size (CFG_SDRAM_BASE, 0x8000000);
 }
 
-
 int checkboard (void)
 {
 	printf("Board: TANBAC TB0229 ");
 	printf("(CPU Speed %d MHz)\n", (int)CPU_CLOCK_RATE/1000000);
 
+	set_io_port_base(0);
+
 	return 0;
 }
diff --git a/board/tb0229/u-boot.lds b/board/tb0229/u-boot.lds
index 30a2bc5..c629040 100644
--- a/board/tb0229/u-boot.lds
+++ b/board/tb0229/u-boot.lds
@@ -43,21 +43,22 @@ SECTIONS
 	. = ALIGN(4);
 	.data  : { *(.data) }
 
-	. = ALIGN(4);
-	.sdata  : { *(.sdata) }
-
-	_gp = ALIGN(16);
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
 
-	__got_start = .;
-	.got  : { *(.got) }
-	__got_end = .;
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
 
 	.sdata  : { *(.sdata) }
 
-	. = .;
-	__u_boot_cmd_start = .;
-	.u_boot_cmd : { *(.u_boot_cmd) }
-	__u_boot_cmd_end = .;
+	.u_boot_cmd : {
+	  __u_boot_cmd_start = .;
+	  *(.u_boot_cmd)
+	  __u_boot_cmd_end = .;
+	}
 
 	uboot_end_data = .;
 	num_got_entries = (__got_end - __got_start) >> 2;
diff --git a/board/tqm5200/cmd_stk52xx.c b/board/tqm5200/cmd_stk52xx.c
index b746679..27a6c41 100644
--- a/board/tqm5200/cmd_stk52xx.c
+++ b/board/tqm5200/cmd_stk52xx.c
@@ -561,7 +561,7 @@ void led_init(void)
 	gpt->gpt6.emsr |=  0x00000024;
 	gpt->gpt7.emsr |=  0x00000024;
 
-
+#ifndef CONFIG_TQM5200S
 	/* enable SM501 GPIO control (in both power modes) */
 	*(vu_long *) (SM501_MMIO_BASE+SM501_POWER_MODE0_GATE) |=
 		POWER_MODE_GATE_GPIO_PWM_I2C;
@@ -574,6 +574,7 @@ void led_init(void)
 
 	/* configure SM501 gpio pins 48-51 as output */
 	*(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_DIR_HIGH) |= (0xF << 16);
+#endif /* !CONFIG_TQM5200S */
 }
 
 /*
@@ -650,7 +651,7 @@ int do_led(char *argv[])
 			gpt->gpt7.emsr &=  ~(1 << 4);
 		}
 		break;
-
+#ifndef CONFIG_TQM5200S
 	case 24:
 		if (strcmp (argv[3], "on") == 0) {
 			*(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) |=
@@ -730,7 +731,7 @@ int do_led(char *argv[])
 				~(0x1 << 19);
 		}
 		break;
-
+#endif /* !CONFIG_TQM5200S */
 	default:
 		printf ("%s: invalid led number %s\n", __FUNCTION__, argv[2]);
 		return 1;
@@ -1110,7 +1111,7 @@ int do_rs232(char *argv[])
 	return error_status;
 }
 
-#ifndef CONFIG_FO300
+#if !defined(CONFIG_FO300) && !defined(CONFIG_TQM5200S)
 static void sm501_backlight (unsigned int state)
 {
 	if (state == BL_ON) {
@@ -1120,7 +1121,7 @@ static void sm501_backlight (unsigned int state)
 		*(vu_long *)(SM501_MMIO_BASE+SM501_PANEL_DISPLAY_CONTROL) &=
 			~((1 << 26) | (1 << 27));
 }
-#endif
+#endif /* !CONFIG_FO300 & !CONFIG_TQM5200S */
 
 int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
@@ -1160,7 +1161,7 @@ int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			else
 				printf ("Error\n");
 			return rcode;
-#ifndef CONFIG_FO300
+#if !defined(CONFIG_FO300) && !defined(CONFIG_TQM5200S)
 		} else if (strncmp (argv[1], "backlight", 4) == 0) {
 			if (strncmp (argv[2], "on", 2) == 0) {
 				sm501_backlight (BL_ON);
@@ -1170,7 +1171,7 @@ int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 				sm501_backlight (BL_OFF);
 				return 0;
 			}
-#endif
+#endif /* !CONFIG_FO300 & !CONFIG_TQM5200S */
 		}
 		break;
 
@@ -1228,8 +1229,10 @@ U_BOOT_CMD(
 	"     - loopback plug for X83 required\n"
 	"fkt rs232 number\n"
 	"     - loopback plug(s) for X2 required\n"
+#ifndef CONFIG_TQM5200S
 	"fkt backlight on/off\n"
 	"     - switch backlight on or off\n"
+#endif /* !CONFIG_TQM5200S */
 );
 #elif defined(CONFIG_FO300)
 U_BOOT_CMD(
diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c
index 29d6f00..f33d172 100644
--- a/board/tqm5200/tqm5200.c
+++ b/board/tqm5200/tqm5200.c
@@ -441,15 +441,23 @@ ulong post_word_load (void)
 }
 #endif	/* CONFIG_POST || CONFIG_LOGBUFFER*/
 
-#ifdef CONFIG_PS2MULT
 #ifdef CONFIG_BOARD_EARLY_INIT_R
 int board_early_init_r (void)
 {
+	extern int usb_cpu_init(void);
+
+#ifdef CONFIG_PS2MULT
 	ps2mult_early_init();
+#endif /* CONFIG_PS2MULT */
+
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
+	/* Low level USB init, required for proper kernel operation */
+	usb_cpu_init();
+#endif
+
 	return (0);
 }
 #endif
-#endif /* CONFIG_PS2MULT */
 
 #ifdef CONFIG_FO300
 int silent_boot (void)
@@ -543,6 +551,7 @@ int last_stage_init (void)
 		__asm__ volatile ("sync");
 	}
 
+#ifndef CONFIG_TQM5200S	/* The TQM5200S has no SM501 grafic controller */
 	/*
 	 * Check for Grafic Controller
 	 */
@@ -584,6 +593,7 @@ int last_stage_init (void)
 		disable_ctrlc(1);
 	}
 #endif
+#endif /* !CONFIG_TQM5200S */
 
 	return 0;
 }
diff --git a/board/tqm8xx/tqm8xx.c b/board/tqm8xx/tqm8xx.c
index 6b206f8..cebdcc0 100644
--- a/board/tqm8xx/tqm8xx.c
+++ b/board/tqm8xx/tqm8xx.c
@@ -354,6 +354,8 @@ long int initdram (int board_type)
 	udelay (10000);
 
 #ifdef	CONFIG_CAN_DRIVER
+	/* UPM initialization for CAN @ CLKOUT <= 66 MHz */
+
 	/* Initialize OR3 / BR3 */
 	memctl->memc_or3 = CFG_OR3_CAN;
 	memctl->memc_br3 = CFG_BR3_CAN;
@@ -362,7 +364,7 @@ long int initdram (int board_type)
 	memctl->memc_mbmr = MBMR_GPL_B4DIS;	/* GPL_B4 ouput line Disable */
 
 	/* Initialize UPMB for CAN: single read */
-	memctl->memc_mdr = 0xFFFFC004;
+	memctl->memc_mdr = 0xFFFFCC04;
 	memctl->memc_mcr = 0x0100 | UPMB;
 
 	memctl->memc_mdr = 0x0FFFD004;
@@ -374,23 +376,23 @@ long int initdram (int board_type)
 	memctl->memc_mdr = 0x3FFFC004;
 	memctl->memc_mcr = 0x0103 | UPMB;
 
-	memctl->memc_mdr = 0xFFFFDC05;
+	memctl->memc_mdr = 0xFFFFDC07;
 	memctl->memc_mcr = 0x0104 | UPMB;
 
 	/* Initialize UPMB for CAN: single write */
-	memctl->memc_mdr = 0xFFFCC004;
+	memctl->memc_mdr = 0xFFFCCC04;
 	memctl->memc_mcr = 0x0118 | UPMB;
 
-	memctl->memc_mdr = 0xCFFCD004;
+	memctl->memc_mdr = 0xCFFCDC04;
 	memctl->memc_mcr = 0x0119 | UPMB;
 
-	memctl->memc_mdr = 0x0FFCC000;
+	memctl->memc_mdr = 0x3FFCC000;
 	memctl->memc_mcr = 0x011A | UPMB;
 
-	memctl->memc_mdr = 0x7FFCC004;
+	memctl->memc_mdr = 0xFFFCC004;
 	memctl->memc_mcr = 0x011B | UPMB;
 
-	memctl->memc_mdr = 0xFFFDCC05;
+	memctl->memc_mdr = 0xFFFDC405;
 	memctl->memc_mcr = 0x011C | UPMB;
 #endif							/* CONFIG_CAN_DRIVER */
 
diff --git a/board/wepep250/flash.c b/board/wepep250/flash.c
index 2a32290..e2e08f7 100644
--- a/board/wepep250/flash.c
+++ b/board/wepep250/flash.c
@@ -44,6 +44,7 @@
 
 #if ( WEP_FLASH_BUS_WIDTH == 1 )
 #  define FLASH_BUS vu_char
+#  define FLASH_BUS_RET u_char
 #  if ( WEP_FLASH_INTERLEAVE == 1 )
 #    define FLASH_CMD( x ) x
 #  else
@@ -53,6 +54,7 @@
 
 #elif ( WEP_FLASH_BUS_WIDTH == 2 )
 #  define FLASH_BUS vu_short
+#  define FLASH_BUS_RET u_short
 #  if ( WEP_FLASH_INTERLEAVE == 1 )
 #    define FLASH_CMD( x ) x
 #  elif ( WEP_FLASH_INTERLEAVE == 2 )
@@ -64,6 +66,7 @@
 
 #elif ( WEP_FLASH_BUS_WIDTH == 4 )
 #  define FLASH_BUS vu_long
+#  define FLASH_BUS_RET u_long
 #  if ( WEP_FLASH_INTERLEAVE == 1 )
 #    define FLASH_CMD( x ) x
 #  elif ( WEP_FLASH_INTERLEAVE == 2 )
@@ -81,7 +84,7 @@
 
 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
 
-static FLASH_BUS flash_status_reg (void)
+static FLASH_BUS_RET flash_status_reg (void)
 {
 
 	FLASH_BUS *addr = (FLASH_BUS *) 0;
diff --git a/board/xsengine/flash.c b/board/xsengine/flash.c
index 2b9afc7..a188e24 100644
--- a/board/xsengine/flash.c
+++ b/board/xsengine/flash.c
@@ -46,11 +46,11 @@ unsigned long flash_init (void)
 	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
 		switch (i) {
 		case 0:
-			flash_get_size ((long *) PHYS_FLASH_1, &flash_info[i]);
+			flash_get_size ((vu_long *) PHYS_FLASH_1, &flash_info[i]);
 			flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
 			break;
 		case 1:
-			flash_get_size ((long *) PHYS_FLASH_2, &flash_info[i]);
+			flash_get_size ((vu_long *) PHYS_FLASH_2, &flash_info[i]);
 			flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
 			break;
 		default: