Merge branch 'master' of git://git.denx.de/u-boot-arm

35 files changed, 2004 insertions, 972 deletions

diff --git a/board/a3m071/a3m071.c b/board/a3m071/a3m071.c
index 7aeefb2..b96ba81 100644
--- a/board/a3m071/a3m071.c
+++ b/board/a3m071/a3m071.c
@@ -412,7 +412,8 @@ int spl_start_uboot(void)
 
 	env_init();
 	getenv_f("boot_os", s, sizeof(s));
-	if ((s != NULL) && (strcmp(s, "yes") == 0))
+	if ((s != NULL) && (*s == '1' || *s == 'y' || *s == 'Y' ||
+			    *s == 't' || *s == 'T'))
 		return 0;
 
 	return 1;
diff --git a/board/avionic-design/common/pinmux-config-tamonten-ng.h b/board/avionic-design/common/pinmux-config-tamonten-ng.h
index 39df731..00634f1 100644
--- a/board/avionic-design/common/pinmux-config-tamonten-ng.h
+++ b/board/avionic-design/common/pinmux-config-tamonten-ng.h
@@ -8,9 +8,9 @@
 #ifndef _PINMUX_CONFIG_TAMONTEN_NG_H_
 #define _PINMUX_CONFIG_TAMONTEN_NG_H_
 
-#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io)	\
+#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)		\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -20,9 +20,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
+#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)	\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -32,9 +32,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define LV_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -44,341 +44,341 @@
 		.ioreset	= PMUX_PIN_IO_RESET_##_ioreset	\
 	}
 
-#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
 	{							\
-		.padgrp		= PDRIVE_PINGROUP_##_padgrp,	\
+		.drvgrp		= PMUX_DRVGRP_##_drvgrp,	\
 		.slwf		= _slwf,			\
 		.slwr		= _slwr,			\
 		.drvup		= _drvup,			\
 		.drvdn		= _drvdn,			\
-		.lpmd		= PGRP_LPMD_##_lpmd,		\
-		.schmt		= PGRP_SCHMT_##_schmt,		\
-		.hsm		= PGRP_HSM_##_hsm,		\
+		.lpmd		= PMUX_LPMD_##_lpmd,		\
+		.schmt		= PMUX_SCHMT_##_schmt,		\
+		.hsm		= PMUX_HSM_##_hsm,		\
 	}
 
-static struct pingroup_config tamonten_ng_pinmux_common[] = {
+static struct pmux_pingrp_config tamonten_ng_pinmux_common[] = {
 	/* SDMMC1 pinmux */
-	DEFAULT_PINMUX(SDMMC1_CLK,  SDMMC1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC1_CMD,  SDMMC1, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC1_CLK_PZ0,  SDMMC1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC1_CMD_PZ1,  SDMMC1, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT1_PY6, SDMMC1, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT2_PY5, SDMMC1, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT3_PY4, SDMMC1, UP,     NORMAL, INPUT),
 
 	/* SDMMC3 pinmux */
-	DEFAULT_PINMUX(SDMMC3_CLK,  SDMMC3, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_CMD,  SDMMC3, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT1, SDMMC3, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT4, SDMMC3, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT5, SDMMC3, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT6, SDMMC3, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT7, SDMMC3, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_IORDY,   RSVD1,  UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_CS6_N,   RSVD1,  UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_CLK_PA6,  SDMMC3, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_CMD_PA7,  SDMMC3, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT6_PD3, SDMMC3, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT7_PD4, SDMMC3, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_IORDY_PI5,   RSVD1,  UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_CS6_N_PI3,   RSVD1,  UP,     NORMAL, INPUT),
 
 	/* SDMMC4 pinmux */
-	LV_PINMUX(SDMMC4_CLK,   SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_CMD,   SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT0,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT1,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT2,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT3,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT4,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT5,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT6,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT7,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_RST_N, RSVD1,  DOWN,   NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_CLK_PCC4,   SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_CMD_PT7,    SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT0_PAA0,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT1_PAA1,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT2_PAA2,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT3_PAA3,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT4_PAA4,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT5_PAA5,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT6_PAA6,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT7_PAA7,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_RST_N_PCC3, RSVD1,  DOWN,   NORMAL, INPUT, DISABLE, DISABLE),
 
 	/* I2C1 pinmux */
-	I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-	I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
 
 	/* I2C2 pinmux */
-	I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-	I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
 
 	/* I2C3 pinmux */
-	I2C_PINMUX(CAM_I2C_SCL, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-	I2C_PINMUX(CAM_I2C_SDA, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
 
 	/* I2C4 pinmux */
-	I2C_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-	I2C_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
 
 	/* Power I2C pinmux */
-	I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-	I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
 
 	/* UART1 */
-	DEFAULT_PINMUX(ULPI_DATA0, UARTA, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(ULPI_DATA1, UARTA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA0_PO1, UARTA, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(ULPI_DATA1_PO2, UARTA, NORMAL, NORMAL, INPUT),
 
 	/* UART2 */
-	DEFAULT_PINMUX(UART2_RXD,   UARTB, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(UART2_TXD,   UARTB, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(UART2_RXD_PC3,   UARTB, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(UART2_TXD_PC2,   UARTB, NORMAL, NORMAL, OUTPUT),
 
 	/* UART3 */
-	DEFAULT_PINMUX(UART3_TXD,   UARTC, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(UART3_RXD,   UARTC, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(UART3_CTS_N, UARTC, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(UART3_RTS_N, UARTC, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(UART3_TXD_PW6,   UARTC, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(UART3_RXD_PW7,   UARTC, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT),
 
 	/* UART4 */
-	DEFAULT_PINMUX(ULPI_CLK, UARTD, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(ULPI_DIR, UARTD, UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_NXT, UARTD, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_STP, UARTD, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(ULPI_CLK_PY0, UARTD, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(ULPI_DIR_PY1, UARTD, UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_NXT_PY2, UARTD, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_STP_PY3, UARTD, NORMAL, NORMAL, OUTPUT),
 
 	/* DAP */
-	DEFAULT_PINMUX(CLK1_OUT, EXTPERIPH1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CLK1_OUT_PW4, EXTPERIPH1, NORMAL, NORMAL, INPUT),
 
 	/* I2S1 */
-	DEFAULT_PINMUX(DAP2_FS,   I2S1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP2_DIN,  I2S1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP2_DOUT, I2S1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP2_SCLK, I2S1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP2_FS_PA2,   I2S1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP2_DIN_PA4,  I2S1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT),
 
 	/* SPDIF */
-	DEFAULT_PINMUX(SPDIF_IN,  SPDIF, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SPDIF_OUT, SPDIF, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(SPDIF_IN_PK6,  SPDIF, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, NORMAL, NORMAL, OUTPUT),
 
 	/* I2S2 */
-	DEFAULT_PINMUX(DAP3_FS,   I2S2, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP3_DIN,  I2S2, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP3_DOUT, I2S2, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP3_SCLK, I2S2, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP3_FS_PP0,   I2S2, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP3_DIN_PP1,  I2S2, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, INPUT),
 
 	/* DAP4 */
-	DEFAULT_PINMUX(DAP4_FS,   I2S3, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP4_DIN,  I2S3, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP4_SCLK, I2S3, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP4_FS_PP4,   I2S3, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP4_DIN_PP5,  I2S3, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, INPUT),
 
 	/* Tamonten GPIO */
-	DEFAULT_PINMUX(GPIO_PV2,   RSVD1, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(GPIO_PV3,   RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SPI2_CS1_N, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PV2,            RSVD1, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(PV3,            RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPI2_CS1_N_PW2, RSVD1, NORMAL, NORMAL, INPUT),
 
 	/* LCD */
-	DEFAULT_PINMUX(LCD_PWR1,  DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_PWR2,  DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_SDIN,  DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_SDOUT, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_WR_N,  DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_CS0_N, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_DC0,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_SCK,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_PWR0,  DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_PCLK,  DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_DE,    DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_HSYNC, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_VSYNC, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D0,    DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D1,    DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D2,    DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D3,    DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D4,    DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D5,    DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D6,    DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D7,    DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D8,    DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D9,    DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D10,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D11,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D12,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D13,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D14,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D15,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D16,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D17,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D18,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D19,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D20,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D21,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D22,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D23,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_CS1_N, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_M1,    DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_DC1,   DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(CRT_HSYNC, CRT,   NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(CRT_VSYNC, CRT,   NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(LCD_PWR1_PC1,  DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_PWR2_PC6,  DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_SDIN_PZ2,  DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_SDOUT_PN5, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_WR_N_PZ3,  DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_CS0_N_PN4, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_DC0_PN6,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_SCK_PZ4,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_PWR0_PB2,  DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_PCLK_PB3,  DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_DE_PJ1,    DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_HSYNC_PJ3, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_VSYNC_PJ4, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D0_PE0,    DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D1_PE1,    DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D2_PE2,    DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D3_PE3,    DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D4_PE4,    DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D5_PE5,    DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D6_PE6,    DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D7_PE7,    DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D8_PF0,    DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D9_PF1,    DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D10_PF2,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D11_PF3,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D12_PF4,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D13_PF5,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D14_PF6,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D15_PF7,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D16_PM0,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D17_PM1,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D18_PM2,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D19_PM3,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D20_PM4,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D21_PM5,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D22_PM6,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D23_PM7,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_CS1_N_PW0, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_M1_PW1,    DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_DC1_PD2,   DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CRT_HSYNC_PV6, CRT,   NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(CRT_VSYNC_PV7, CRT,   NORMAL, NORMAL, OUTPUT),
 
 	/* BT656 */
-	LV_PINMUX(VI_MCLK,  VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_PCLK,  VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_HSYNC, VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_VSYNC, VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D2,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D3,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D4,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D5,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D6,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D7,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D8,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D9,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D11,   RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_MCLK_PT1,  VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_PCLK_PT0,  VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_HSYNC_PD7, VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_VSYNC_PD6, VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D2_PL0,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D3_PL1,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D4_PL2,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D5_PL3,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D6_PL4,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D7_PL5,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D8_PL6,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D9_PL7,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D11_PT3,   RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
 
 	/* GPIOs */
-	DEFAULT_PINMUX(GPIO_PU5, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PU6, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_AD12, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PU5,          RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PU6,          RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_AD12_PH4, RSVD1, NORMAL, NORMAL, INPUT),
 
 	/* LCD BL */
-	DEFAULT_PINMUX(GMI_AD8,  PWM0,  NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD10, RSVD4, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD8_PH0,  PWM0,  NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD10_PH2, RSVD4, NORMAL, NORMAL, OUTPUT),
 
 	/* SPI4 */
-	DEFAULT_PINMUX(GMI_A16, SPI4, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_A17, SPI4, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_A18, SPI4, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_A19, SPI4, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_A16_PJ7, SPI4, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_A17_PB0, SPI4, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_A18_PB1, SPI4, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_A19_PK7, SPI4, NORMAL, NORMAL, INPUT),
 
 	/* Video input GPIO */
-	DEFAULT_PINMUX(GPIO_PCC1, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB0, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB7, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PCC1, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PBB0, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PBB7, RSVD1, NORMAL, NORMAL, INPUT),
 
 	/* Sensor GPIO */
-	DEFAULT_PINMUX(GPIO_PCC2, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PCC2, RSVD1, NORMAL, NORMAL, INPUT),
 
 	/* JTAG */
-	DEFAULT_PINMUX(JTAG_RTCK, RTCK, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(JTAG_RTCK_PU7, RTCK, NORMAL, NORMAL, OUTPUT),
 
 	/* Power controls */
-	DEFAULT_PINMUX(GMI_CS2_N, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_CS2_N_PK3, RSVD1, NORMAL, NORMAL, INPUT),
 
 	/* SPI1 */
-	DEFAULT_PINMUX(SPI1_MOSI,  SPI1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SPI1_SCK,   SPI1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SPI1_CS0_N, SPI1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SPI1_MISO,  SPI1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPI1_MOSI_PX4,  SPI1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPI1_SCK_PX5,   SPI1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPI1_CS0_N_PX6, SPI1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPI1_MISO_PX7,  SPI1, NORMAL, NORMAL, INPUT),
 
 	/* PMU */
-	DEFAULT_PINMUX(GPIO_PV0,    RSVD1,  UP,     NORMAL, INPUT),
-	DEFAULT_PINMUX(SYS_CLK_REQ, SYSCLK, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(CLK_32K_IN,  SYSCLK, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PV0,             RSVD1,  UP,     NORMAL, INPUT),
+	DEFAULT_PINMUX(SYS_CLK_REQ_PZ5, SYSCLK, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(CLK_32K_IN,      SYSCLK, NORMAL, NORMAL, INPUT),
 
 	/* PCI */
-	DEFAULT_PINMUX(PEX_L0_PRSNT_N,  PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_L0_RST_N,    PCIE, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(PEX_L0_CLKREQ_N, PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_WAKE_N,      PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_L1_PRSNT_N,  PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_L1_RST_N,    PCIE, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(PEX_L1_CLKREQ_N, PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_L2_PRSNT_N,  PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_L2_RST_N,    PCIE, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(PEX_L2_CLKREQ_N, PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0,  PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_L0_RST_N_PDD1,    PCIE, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_WAKE_N_PDD3,      PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4,  PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_L1_RST_N_PDD5,    PCIE, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_L2_PRSNT_N_PDD7,  PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_L2_RST_N_PCC6,    PCIE, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(PEX_L2_CLKREQ_N_PCC7, PCIE, NORMAL, NORMAL, INPUT),
 
 	/* HDMI */
-	DEFAULT_PINMUX(HDMI_CEC, CEC,   NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(HDMI_INT, RSVD1, NORMAL, TRISTATE, INPUT),
+	DEFAULT_PINMUX(HDMI_CEC_PEE3, CEC,   NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(HDMI_INT_PN7,  RSVD1, NORMAL, TRISTATE, INPUT),
 };
 
-static struct pingroup_config unused_pins_lowpower[] = {
+static struct pmux_pingrp_config unused_pins_lowpower[] = {
 	/* UART1 - NC */
-	DEFAULT_PINMUX(ULPI_DATA2, UARTA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_DATA3, UARTA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_DATA4, UARTA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_DATA5, UARTA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_DATA6, UARTA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_DATA7, UARTA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA2_PO3, UARTA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA3_PO4, UARTA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA4_PO5, UARTA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA5_PO6, UARTA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA6_PO7, UARTA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA7_PO0, UARTA, NORMAL, NORMAL, INPUT),
 
 	/* UART2 - NC */
-	DEFAULT_PINMUX(UART2_RTS_N, UARTB, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(UART2_CTS_N, UARTB, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(UART2_CTS_N_PJ5, UARTB, NORMAL, NORMAL, INPUT),
 
 	/* DAP - NC */
-	DEFAULT_PINMUX(CLK1_REQ,  RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(CLK3_OUT,  RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(CLK3_REQ,  RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CLK1_REQ_PEE2,  RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CLK3_OUT_PEE0,  RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CLK3_REQ_PEE1,  RSVD1, NORMAL, NORMAL, INPUT),
 
 	/* DAP4 - NC */
-	DEFAULT_PINMUX(DAP4_DOUT, I2S3, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, INPUT),
 
 	/* Tamonten GPIO - NC */
-	DEFAULT_PINMUX(CLK2_OUT, EXTPERIPH2, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(CLK2_REQ, DAP,        NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CLK2_OUT_PW5,  EXTPERIPH2, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CLK2_REQ_PCC5, DAP,        NORMAL, NORMAL, INPUT),
 
 	/* BT656 - NC */
-	LV_PINMUX(VI_D0,  RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D1,  RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D10, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D0_PT4,  RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D1_PD5,  RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D10_PT2, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
 
 	/* GPIO - NC */
-	DEFAULT_PINMUX(GPIO_PU0, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PU1, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PU2, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PU3, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PU4, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PU0, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PU1, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PU2, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PU3, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PU4, RSVD1, NORMAL, NORMAL, INPUT),
 
 	/* Video input - NC */
-	DEFAULT_PINMUX(CAM_MCLK,  RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB3, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB5, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB6, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW11,  RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CAM_MCLK_PCC0, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PBB3,          RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PBB5,          RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PBB6,          RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW11_PS3,  RSVD1, NORMAL, NORMAL, INPUT),
 
 	/* KBC keys - NC */
-	DEFAULT_PINMUX(KB_ROW0,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW1,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW2,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW3,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW4,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW5,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW6,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW7,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW8,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW9,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW10, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW12, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW13, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW14, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW15, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL0,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL1,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL2,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL3,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL4,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL5,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL6,  KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL7,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW0_PR0,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW1_PR1,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW2_PR2,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW3_PR3,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW4_PR4,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW5_PR5,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW6_PR6,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW7_PR7,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW8_PS0,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW9_PS1,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW10_PS2, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW12_PS4, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW13_PS5, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW14_PS6, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW15_PS7, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL0_PQ0,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL1_PQ1,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL2_PQ2,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL3_PQ3,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL4_PQ4,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL5_PQ5,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL6_PQ6,  KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL7_PQ7,  KBC, UP, NORMAL, INPUT),
 
 	/* PMU - NC */
-	DEFAULT_PINMUX(CLK_32K_OUT, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CLK_32K_OUT_PA0, RSVD1, NORMAL, NORMAL, INPUT),
 
 	/* Power rails GPIO - NC */
-	DEFAULT_PINMUX(SPI2_SCK,  RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB4, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPI2_SCK_PX2, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PBB4,         RSVD1, NORMAL, NORMAL, INPUT),
 
 	/* Others - NC */
-	DEFAULT_PINMUX(GMI_WP_N,   RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PV1,   RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_WAIT,   NAND, UP,     TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_ADV_N,  NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_CLK,    NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_CS3_N,  NAND, NORMAL, NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(GMI_CS7_N,  NAND, UP,     NORMAL,   INPUT),
-	DEFAULT_PINMUX(GMI_AD0,    NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD1,    NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD2,    NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD3,    NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD4,    NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD5,    NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD6,    NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD7,    NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD9,    PWM1, NORMAL, NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(GMI_AD11,   NAND, NORMAL, NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(GMI_AD13,   NAND, UP,     NORMAL,   INPUT),
-	DEFAULT_PINMUX(GMI_WR_N,   NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_OE_N,   NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_DQS,    NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_WP_N_PC7,   RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PV1,            RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_WAIT_PI7,   NAND, UP,     TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_ADV_N_PK0,  NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_CLK_PK1,    NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_CS3_N_PK4,  NAND, NORMAL, NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(GMI_CS7_N_PI6,  NAND, UP,     NORMAL,   INPUT),
+	DEFAULT_PINMUX(GMI_AD0_PG0,    NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD1_PG1,    NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD2_PG2,    NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD3_PG3,    NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD4_PG4,    NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD5_PG5,    NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD6_PG6,    NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD7_PG7,    NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD9_PH1,    PWM1, NORMAL, NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(GMI_AD11_PH3,   NAND, NORMAL, NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(GMI_AD13_PH5,   NAND, UP,     NORMAL,   INPUT),
+	DEFAULT_PINMUX(GMI_WR_N_PI0,   NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_OE_N_PI1,   NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_DQS_PI2,    NAND, NORMAL, TRISTATE, OUTPUT),
 };
 
-static struct padctrl_config tamonten_ng_padctrl[] = {
-	/* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+static struct pmux_drvgrp_config tamonten_ng_padctrl[] = {
+	/* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
 	DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR,
 		SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
 };
diff --git a/board/avionic-design/common/tamonten-ng.c b/board/avionic-design/common/tamonten-ng.c
index 9d395c6..5870b95 100644
--- a/board/avionic-design/common/tamonten-ng.c
+++ b/board/avionic-design/common/tamonten-ng.c
@@ -28,14 +28,14 @@
 
 void pinmux_init(void)
 {
-	pinmux_config_table(tamonten_ng_pinmux_common,
-			    ARRAY_SIZE(tamonten_ng_pinmux_common));
-	pinmux_config_table(unused_pins_lowpower,
-			    ARRAY_SIZE(unused_pins_lowpower));
+	pinmux_config_pingrp_table(tamonten_ng_pinmux_common,
+		ARRAY_SIZE(tamonten_ng_pinmux_common));
+	pinmux_config_pingrp_table(unused_pins_lowpower,
+		ARRAY_SIZE(unused_pins_lowpower));
 
 	/* Initialize any non-default pad configs (APB_MISC_GP regs) */
-	padgrp_config_table(tamonten_ng_padctrl,
-			    ARRAY_SIZE(tamonten_ng_padctrl));
+	pinmux_config_drvgrp_table(tamonten_ng_padctrl,
+		ARRAY_SIZE(tamonten_ng_padctrl));
 }
 
 void gpio_early_init(void)
diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c
index 177d185..9c86779 100644
--- a/board/avionic-design/common/tamonten.c
+++ b/board/avionic-design/common/tamonten.c
@@ -37,8 +37,8 @@ void pin_mux_mmc(void)
 {
 	funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
 	/* for write-protect GPIO PI6 */
-	pinmux_tristate_disable(PINGRP_ATA);
+	pinmux_tristate_disable(PMUX_PINGRP_ATA);
 	/* for CD GPIO PH2 */
-	pinmux_tristate_disable(PINGRP_ATD);
+	pinmux_tristate_disable(PMUX_PINGRP_ATD);
 }
 #endif
diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c
index d6e5c37..462ab05 100644
--- a/board/compal/paz00/paz00.c
+++ b/board/compal/paz00/paz00.c
@@ -28,23 +28,23 @@
 void pin_mux_mmc(void)
 {
 	/* SDMMC4: config 3, x8 on 2nd set of pins */
-	pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
-	pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
-	pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
+	pinmux_set_func(PMUX_PINGRP_ATB, PMUX_FUNC_SDIO4);
+	pinmux_set_func(PMUX_PINGRP_GMA, PMUX_FUNC_SDIO4);
+	pinmux_set_func(PMUX_PINGRP_GME, PMUX_FUNC_SDIO4);
 
-	pinmux_tristate_disable(PINGRP_ATB);
-	pinmux_tristate_disable(PINGRP_GMA);
-	pinmux_tristate_disable(PINGRP_GME);
+	pinmux_tristate_disable(PMUX_PINGRP_ATB);
+	pinmux_tristate_disable(PMUX_PINGRP_GMA);
+	pinmux_tristate_disable(PMUX_PINGRP_GME);
 
 	/* SDIO1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */
-	pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_SDIO1);
+	pinmux_set_func(PMUX_PINGRP_SDIO1, PMUX_FUNC_SDIO1);
 
-	pinmux_tristate_disable(PINGRP_SDIO1);
+	pinmux_tristate_disable(PMUX_PINGRP_SDIO1);
 
 	/* For power GPIO PV1 */
-	pinmux_tristate_disable(PINGRP_UAC);
+	pinmux_tristate_disable(PMUX_PINGRP_UAC);
 	/* For CD GPIO PV5 */
-	pinmux_tristate_disable(PINGRP_GPV);
+	pinmux_tristate_disable(PMUX_PINGRP_GPV);
 }
 #endif
 
@@ -55,6 +55,6 @@ void pin_mux_display(void)
 	debug("init display pinmux\n");
 
 	/* EN_VDD_PANEL GPIO A4 */
-	pinmux_tristate_disable(PINGRP_DAP2);
+	pinmux_tristate_disable(PMUX_PINGRP_DAP2);
 }
 #endif
diff --git a/board/compulab/trimslice/trimslice.c b/board/compulab/trimslice/trimslice.c
index ef94930..723293f 100644
--- a/board/compulab/trimslice/trimslice.c
+++ b/board/compulab/trimslice/trimslice.c
@@ -20,7 +20,7 @@ void pin_mux_usb(void)
 	 * USB1 internal/external mux GPIO, which masquerades as a VBUS GPIO
 	 * in the current device tree.
 	 */
-	pinmux_tristate_disable(PINGRP_UAC);
+	pinmux_tristate_disable(PMUX_PINGRP_UAC);
 }
 
 void pin_mux_spi(void)
@@ -38,5 +38,5 @@ void pin_mux_mmc(void)
 	funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT);
 
 	/* For CD GPIO PP1 */
-	pinmux_tristate_disable(PINGRP_DAP3);
+	pinmux_tristate_disable(PMUX_PINGRP_DAP3);
 }
diff --git a/board/logicpd/zoom1/config.mk b/board/logicpd/zoom1/config.mk
index f5a19ed..c7ebfd9 100644
--- a/board/logicpd/zoom1/config.mk
+++ b/board/logicpd/zoom1/config.mk
@@ -14,4 +14,3 @@
 # (mem base + reserved)
 
 # For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c
index 9846f24..461a852 100644
--- a/board/logicpd/zoom1/zoom1.c
+++ b/board/logicpd/zoom1/zoom1.c
@@ -18,6 +18,7 @@
 #include <netdev.h>
 #include <twl4030.h>
 #include <asm/io.h>
+#include <asm/arch/mem.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/sys_proto.h>
@@ -26,6 +27,20 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/* gpmc_cfg is initialized by gpmc_init and we use it here */
+extern struct gpmc *gpmc_cfg;
+
+/* GPMC definitions for Ethenet Controller LAN9211 */
+static const u32 gpmc_lab_enet[] = {
+	ZOOM1_ENET_GPMC_CONF1,
+	ZOOM1_ENET_GPMC_CONF2,
+	ZOOM1_ENET_GPMC_CONF3,
+	ZOOM1_ENET_GPMC_CONF4,
+	ZOOM1_ENET_GPMC_CONF5,
+	ZOOM1_ENET_GPMC_CONF6,
+	/*CONF7- computed as params */
+};
+
 /*
  * Routine: board_init
  * Description: Early hardware init.
@@ -33,6 +48,9 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_init(void)
 {
 	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
+	/* CS1 is Ethernet LAN9211 */
+	enable_gpmc_cs_config(gpmc_lab_enet, &gpmc_cfg->cs[1],
+			      DEBUG_BASE, GPMC_SIZE_16M);
 	/* board id for Linux */
 	gd->bd->bi_arch_number = MACH_TYPE_OMAP_LDP;
 	/* boot param addr */
@@ -84,9 +102,25 @@ int board_mmc_init(bd_t *bis)
 int board_eth_init(bd_t *bis)
 {
 	int rc = 0;
-#ifdef CONFIG_LAN91C96
-	rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
+
+#ifdef CONFIG_SMC911X
+#define STR_ENV_ETHADDR	"ethaddr"
+
+	struct eth_device *dev;
+	uchar eth_addr[6];
+
+	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+	if (!eth_getenv_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
+		dev = eth_get_dev_by_index(0);
+		if (dev) {
+			eth_setenv_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
+		} else {
+			printf("zoom1: Couldn't get eth device\n");
+			rc = -1;
+		}
+	}
 #endif
+
 	return rc;
 }
 #endif
diff --git a/board/logicpd/zoom1/zoom1.h b/board/logicpd/zoom1/zoom1.h
index 62ef94f..3a943df 100644
--- a/board/logicpd/zoom1/zoom1.h
+++ b/board/logicpd/zoom1/zoom1.h
@@ -17,6 +17,13 @@ const omap3_sysinfo sysinfo = {
 	"NAND",
 };
 
+#define ZOOM1_ENET_GPMC_CONF1  0x00611000
+#define ZOOM1_ENET_GPMC_CONF2  0x001F1F01
+#define ZOOM1_ENET_GPMC_CONF3  0x00080803
+#define ZOOM1_ENET_GPMC_CONF4  0x1D091D09
+#define ZOOM1_ENET_GPMC_CONF5  0x041D1F1F
+#define ZOOM1_ENET_GPMC_CONF6  0x1D0904C4
+
 /*
  * IEN	- Input Enable
  * IDIS	- Input Disable
@@ -94,13 +101,13 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(GPMC_D14),		(IEN  | PTD | DIS | M0)) /*GPMC_D14*/\
 	MUX_VAL(CP(GPMC_D15),		(IEN  | PTD | DIS | M0)) /*GPMC_D15*/\
 	MUX_VAL(CP(GPMC_NCS0),		(IDIS | PTU | EN  | M0)) /*GPMC_nCS0*/\
-	MUX_VAL(CP(GPMC_NCS1),		(IDIS | PTU | EN  | M7)) /*GPMC_nCS1*/\
-	MUX_VAL(CP(GPMC_NCS2),		(IDIS | PTU | EN  | M7)) /*GPMC_nCS2*/\
-	MUX_VAL(CP(GPMC_NCS3),		(IDIS | PTU | EN  | M7)) /*GPMC_nCS3*/\
-	MUX_VAL(CP(GPMC_NCS4),		(IDIS | PTU | EN  | M7)) /*GPMC_nCS4*/\
-	MUX_VAL(CP(GPMC_NCS5),		(IDIS | PTD | DIS | M7)) /*GPMC_nCS5*/\
+	MUX_VAL(CP(GPMC_NCS1),		(IDIS | PTU | EN  | M0)) /*GPMC_nCS1*/\
+	MUX_VAL(CP(GPMC_NCS2),		(IDIS | PTU | DIS | M7)) /*GPMC_nCS2*/\
+	MUX_VAL(CP(GPMC_NCS3),		(IEN  | PTU | DIS | M4)) /*GPMC_nCS3 -> GPIO54*/\
+	MUX_VAL(CP(GPMC_NCS4),		(IDIS | PTU | DIS | M4)) /*GPMC_nCS4 -> GPIO 55*/\
+	MUX_VAL(CP(GPMC_NCS5),		(IDIS | PTD | DIS | M4)) /*GPMC_nCS5 -> GPIO 56*/\
 	MUX_VAL(CP(GPMC_NCS6),		(IEN  | PTD | DIS | M7)) /*GPMC_nCS6*/\
-	MUX_VAL(CP(GPMC_NCS7),		(IEN  | PTU | EN  | M7)) /*GPMC_nCS7*/\
+	MUX_VAL(CP(GPMC_NCS7),		(IEN  | PTU | EN  | M1)) /*GPMC_nCS7 -> GPMC_IO_DIR*/\
 	MUX_VAL(CP(GPMC_CLK),		(IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\
 	MUX_VAL(CP(GPMC_NADV_ALE),	(IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\
 	MUX_VAL(CP(GPMC_NOE),		(IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\
diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c
index 47e7abe..cc0e5e1 100644
--- a/board/nvidia/cardhu/cardhu.c
+++ b/board/nvidia/cardhu/cardhu.c
@@ -20,14 +20,14 @@
  */
 void pinmux_init(void)
 {
-	pinmux_config_table(tegra3_pinmux_common,
+	pinmux_config_pingrp_table(tegra3_pinmux_common,
 		ARRAY_SIZE(tegra3_pinmux_common));
 
-	pinmux_config_table(unused_pins_lowpower,
+	pinmux_config_pingrp_table(unused_pins_lowpower,
 		ARRAY_SIZE(unused_pins_lowpower));
 
 	/* Initialize any non-default pad configs (APB_MISC_GP regs) */
-	padgrp_config_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
+	pinmux_config_drvgrp_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
 }
 
 #if defined(CONFIG_TEGRA_MMC)
diff --git a/board/nvidia/cardhu/pinmux-config-cardhu.h b/board/nvidia/cardhu/pinmux-config-cardhu.h
index 51d2b94..255e4cd 100644
--- a/board/nvidia/cardhu/pinmux-config-cardhu.h
+++ b/board/nvidia/cardhu/pinmux-config-cardhu.h
@@ -17,9 +17,9 @@
 #ifndef _PINMUX_CONFIG_CARDHU_H_
 #define _PINMUX_CONFIG_CARDHU_H_
 
-#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io)	\
+#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)		\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -29,9 +29,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
+#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)	\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -41,9 +41,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define LV_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -53,293 +53,293 @@
 		.ioreset	= PMUX_PIN_IO_RESET_##_ioreset	\
 	}
 
-#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
 	{							\
-		.padgrp		= PDRIVE_PINGROUP_##_padgrp,	\
+		.drvgrp		= PMUX_DRVGRP_##_drvgrp,	\
 		.slwf		= _slwf,			\
 		.slwr		= _slwr,			\
 		.drvup		= _drvup,			\
 		.drvdn		= _drvdn,			\
-		.lpmd		= PGRP_LPMD_##_lpmd,		\
-		.schmt		= PGRP_SCHMT_##_schmt,		\
-		.hsm		= PGRP_HSM_##_hsm,		\
+		.lpmd		= PMUX_LPMD_##_lpmd,		\
+		.schmt		= PMUX_SCHMT_##_schmt,		\
+		.hsm		= PMUX_HSM_##_hsm,		\
 	}
 
-static struct pingroup_config tegra3_pinmux_common[] = {
+static struct pmux_pingrp_config tegra3_pinmux_common[] = {
 	/* SDMMC1 pinmux */
-	DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT),
 
 	/* SDMMC3 pinmux */
-	DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT1, SDMMC3, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT6, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT7, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT6_PD3, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT7_PD4, RSVD1, NORMAL, NORMAL, INPUT),
 
 	/* SDMMC4 pinmux */
-	LV_PINMUX(SDMMC4_CLK, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_CMD, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_DAT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(SDMMC4_RST_N, RSVD1, DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(SDMMC4_RST_N_PCC3, RSVD1, DOWN, NORMAL, INPUT, DISABLE, DISABLE),
 
 	/* I2C1 pinmux */
-	I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-	I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
 
 	/* I2C2 pinmux */
-	I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-	I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
 
 	/* I2C3 pinmux */
-	I2C_PINMUX(CAM_I2C_SCL, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-	I2C_PINMUX(CAM_I2C_SDA, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
 
 	/* I2C4 pinmux */
-	I2C_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-	I2C_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
 
 	/* Power I2C pinmux */
-	I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-	I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+	I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
 
-	DEFAULT_PINMUX(ULPI_DATA0, UARTA, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(ULPI_DATA1, UARTA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_DATA2, UARTA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_DATA3, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_DATA4, UARTA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_DATA5, UARTA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_DATA6, UARTA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_DATA7, UARTA, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(ULPI_CLK, UARTD, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(ULPI_DIR, UARTD, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_NXT, UARTD, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(ULPI_STP, UARTD, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(DAP3_FS, I2S2, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP3_DIN, I2S2, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP3_DOUT, I2S2, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP3_SCLK, I2S2, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PV2, OWR, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(GPIO_PV3, RSVD1, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(CLK2_OUT, EXTPERIPH2, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(CLK2_REQ, DAP, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_PWR1, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_PWR2, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_SDIN, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_SDOUT, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_WR_N, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_CS0_N, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_DC0, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_SCK, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_PWR0, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_PCLK, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_DE, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_HSYNC, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_VSYNC, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D0, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D1, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D2, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D3, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D4, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D5, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D6, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D7, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D8, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D9, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D10, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D11, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D12, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D13, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D14, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D15, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D16, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D17, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D18, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D19, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D20, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D21, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D22, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_D23, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_CS1_N, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_M1, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(LCD_DC1, DISPA, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(CRT_HSYNC, CRT, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(CRT_VSYNC, CRT, NORMAL, NORMAL, OUTPUT),
-	LV_PINMUX(VI_D0, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D1, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D2, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D3, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D4, VI, NORMAL, NORMAL, OUTPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D7, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D10, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_MCLK, VI, UP, NORMAL, INPUT, DISABLE, DISABLE),
-	DEFAULT_PINMUX(UART2_RXD, UARTB, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(UART2_TXD, UARTB, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(UART2_RTS_N, UARTB, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(UART2_CTS_N, UARTB, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(UART3_TXD, UARTC, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(UART3_RXD, UARTC, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(UART3_CTS_N, UARTC, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(UART3_RTS_N, UARTC, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(GPIO_PU0, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PU1, RSVD1, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(GPIO_PU2, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PU3, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PU4, PWM1, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(GPIO_PU5, PWM2, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(GPIO_PU6, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP4_FS, I2S3, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP4_DIN, I2S3, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP4_DOUT, I2S3, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP4_SCLK, I2S3, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(CLK3_OUT, EXTPERIPH3, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(CLK3_REQ, DEV3, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_WP_N, GMI, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_CS2_N, RSVD1, UP, NORMAL, INPUT), /* EN_VDD_BL1 */
-	DEFAULT_PINMUX(GMI_AD8, PWM0, NORMAL, NORMAL, OUTPUT), /* LCD1_BL_PWM */
-	DEFAULT_PINMUX(GMI_AD10, NAND, NORMAL, NORMAL, OUTPUT), /* LCD1_BL_EN */
-	DEFAULT_PINMUX(GMI_A16, SPI4, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_A17, SPI4, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_A18, SPI4, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_A19, SPI4, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(CAM_MCLK, VI_ALT2, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PCC1, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB0, RSVD1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB3, VGP3, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB5, VGP5, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB6, VGP6, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB7, I2S4, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PCC2, I2S4, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(JTAG_RTCK, RTCK, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(ULPI_DATA0_PO1, UARTA, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(ULPI_DATA1_PO2, UARTA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA2_PO3, UARTA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA3_PO4, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA4_PO5, UARTA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA5_PO6, UARTA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA6_PO7, UARTA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA7_PO0, UARTA, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(ULPI_CLK_PY0, UARTD, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(ULPI_DIR_PY1, UARTD, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_NXT_PY2, UARTD, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(ULPI_STP_PY3, UARTD, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(DAP3_FS_PP0, I2S2, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP3_DIN_PP1, I2S2, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PV2, OWR, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(PV3, RSVD1, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(CLK2_OUT_PW5, EXTPERIPH2, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CLK2_REQ_PCC5, DAP, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_PWR1_PC1, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_PWR2_PC6, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_SDIN_PZ2, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_SDOUT_PN5, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_CS0_N_PN4, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_DC0_PN6, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_SCK_PZ4, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_PWR0_PB2, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_PCLK_PB3, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_DE_PJ1, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_HSYNC_PJ3, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_VSYNC_PJ4, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D0_PE0, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D1_PE1, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D2_PE2, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D3_PE3, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D4_PE4, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D5_PE5, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D6_PE6, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D7_PE7, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D8_PF0, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D9_PF1, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D10_PF2, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D11_PF3, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D12_PF4, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D13_PF5, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D14_PF6, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D15_PF7, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D16_PM0, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D17_PM1, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D18_PM2, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D19_PM3, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D20_PM4, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D21_PM5, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D22_PM6, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_D23_PM7, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_CS1_N_PW0, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_M1_PW1, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(LCD_DC1_PD2, DISPLAYA, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CRT_HSYNC_PV6, CRT, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(CRT_VSYNC_PV7, CRT, NORMAL, NORMAL, OUTPUT),
+	LV_PINMUX(VI_D0_PT4, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D1_PD5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D2_PL0, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D3_PL1, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D4_PL2, VI, NORMAL, NORMAL, OUTPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D5_PL3, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D7_PL5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D10_PT2, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_MCLK_PT1, VI, UP, NORMAL, INPUT, DISABLE, DISABLE),
+	DEFAULT_PINMUX(UART2_RXD_PC3, UARTB, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(UART2_TXD_PC2, UARTB, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(UART2_CTS_N_PJ5, UARTB, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(UART3_RXD_PW7, UARTC, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(PU0, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PU1, RSVD1, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(PU2, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PU3, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PU4, PWM1, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(PU5, PWM2, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(PU6, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP4_FS_PP4, I2S3, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP4_DIN_PP5, I2S3, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(CLK3_REQ_PEE1, DEV3, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_WP_N_PC7, GMI, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_CS2_N_PK3, RSVD1, UP, NORMAL, INPUT), /* EN_VDD_BL1 */
+	DEFAULT_PINMUX(GMI_AD8_PH0, PWM0, NORMAL, NORMAL, OUTPUT), /* LCD1_BL_PWM */
+	DEFAULT_PINMUX(GMI_AD10_PH2, NAND, NORMAL, NORMAL, OUTPUT), /* LCD1_BL_EN */
+	DEFAULT_PINMUX(GMI_A16_PJ7, SPI4, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_A17_PB0, SPI4, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_A18_PB1, SPI4, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_A19_PK7, SPI4, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CAM_MCLK_PCC0, VI_ALT3, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(PCC1, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PBB0, RSVD1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PBB3, VGP3, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PBB5, VGP5, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PBB6, VGP6, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PBB7, I2S4, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PCC2, I2S4, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(JTAG_RTCK_PU7, RTCK, NORMAL, NORMAL, OUTPUT),
 
 	/* KBC keys */
-	DEFAULT_PINMUX(KB_ROW0, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW1, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW2, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW3, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW4, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW5, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW6, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW7, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW8, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW9, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW10, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW11, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW12, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW13, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW14, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW15, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL0, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL1, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL2, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL3, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL4, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL5, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL6, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_COL7, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PV0, RSVD1, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW0_PR0, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW1_PR1, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW2_PR2, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW3_PR3, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW4_PR4, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW5_PR5, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW6_PR6, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW7_PR7, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW9_PS1, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW10_PS2, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW11_PS3, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW12_PS4, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW13_PS5, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW14_PS6, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW15_PS7, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL0_PQ0, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL1_PQ1, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL2_PQ2, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL3_PQ3, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL4_PQ4, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL5_PQ5, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL6_PQ6, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_COL7_PQ7, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(PV0, RSVD1, UP, NORMAL, INPUT),
 
-	DEFAULT_PINMUX(CLK_32K_OUT, BLINK, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(SYS_CLK_REQ, SYSCLK, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(CLK_32K_OUT_PA0, BLINK, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(SYS_CLK_REQ_PZ5, SYSCLK, NORMAL, NORMAL, OUTPUT),
 	DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP1_FS, I2S0, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP1_DIN, I2S0, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP1_DOUT, I2S0, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP1_SCLK, I2S0, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(CLK1_REQ, DAP, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(CLK1_OUT, EXTPERIPH1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SPDIF_IN, SPDIF, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SPDIF_OUT, SPDIF, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(DAP2_FS, I2S1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP2_DIN, I2S1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP2_DOUT, I2S1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(DAP2_SCLK, I2S1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP1_FS_PN0, I2S0, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP1_DIN_PN1, I2S0, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP1_DOUT_PN2, I2S0, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP1_SCLK_PN3, I2S0, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CLK1_REQ_PEE2, DAP, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(CLK1_OUT_PW4, EXTPERIPH1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPDIF_IN_PK6, SPDIF, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(DAP2_FS_PA2, I2S1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP2_DIN_PA4, I2S1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT),
 
-	DEFAULT_PINMUX(SPI2_CS1_N, SPI2, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(SPI1_MOSI, SPI1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SPI1_SCK, SPI1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SPI1_CS0_N, SPI1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(SPI1_MISO, SPI1, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_L0_PRSNT_N, PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_L0_RST_N, PCIE, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(PEX_L0_CLKREQ_N, PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_WAKE_N, PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_L1_PRSNT_N, PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_L1_RST_N, PCIE, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(PEX_L1_CLKREQ_N, PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_L2_PRSNT_N, PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(PEX_L2_RST_N, PCIE, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(PEX_L2_CLKREQ_N, PCIE, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(HDMI_INT, RSVD1, NORMAL, TRISTATE, INPUT),
+	DEFAULT_PINMUX(SPI2_CS1_N_PW2, SPI2, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPI1_MOSI_PX4, SPI1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPI1_SCK_PX5, SPI1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPI1_CS0_N_PX6, SPI1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPI1_MISO_PX7, SPI1, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0, PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_L0_RST_N_PDD1, PCIE, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_WAKE_N_PDD3, PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4, PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_L1_RST_N_PDD5, PCIE, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_L2_PRSNT_N_PDD7, PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PEX_L2_RST_N_PCC6, PCIE, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(PEX_L2_CLKREQ_N_PCC7, PCIE, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, NORMAL, TRISTATE, INPUT),
 
 	/* GPIOs */
 	/* SDMMC1 CD gpio */
-	DEFAULT_PINMUX(GMI_IORDY, RSVD1, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_IORDY_PI5, RSVD1, UP, NORMAL, INPUT),
 	/* SDMMC1 WP gpio */
-	LV_PINMUX(VI_D11, RSVD1, UP, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D11_PT3, RSVD1, UP, NORMAL, INPUT, DISABLE, DISABLE),
 
 	/* Touch panel GPIO */
 	/* Touch IRQ */
-	DEFAULT_PINMUX(GMI_AD12, NAND, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_AD12_PH4, NAND, UP, NORMAL, INPUT),
 
 	/* Touch RESET */
-	DEFAULT_PINMUX(GMI_AD14, NAND, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD14_PH6, NAND, NORMAL, NORMAL, OUTPUT),
 
 	/* Power rails GPIO */
-	DEFAULT_PINMUX(SPI2_SCK, GMI, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB4, VGP4, NORMAL, NORMAL, INPUT),
-	DEFAULT_PINMUX(KB_ROW8, KBC, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT5, SDMMC3, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT4, SDMMC3, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SPI2_SCK_PX2, GMI, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(PBB4, VGP4, NORMAL, NORMAL, INPUT),
+	DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, UP, NORMAL, INPUT),
 
-	LV_PINMUX(VI_D6, VI, NORMAL, NORMAL, OUTPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D8, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_D9, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_PCLK, RSVD1, UP, TRISTATE, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_HSYNC, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-	LV_PINMUX(VI_VSYNC, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D6_PL4, VI, NORMAL, NORMAL, OUTPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D8_PL6, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_D9_PL7, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_PCLK_PT0, RSVD1, UP, TRISTATE, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_HSYNC_PD7, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+	LV_PINMUX(VI_VSYNC_PD6, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
 };
 
-static struct pingroup_config unused_pins_lowpower[] = {
-	DEFAULT_PINMUX(GMI_WAIT, NAND, UP, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_ADV_N, NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_CLK, NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_CS3_N, NAND, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(GMI_CS7_N, NAND, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_AD0, NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD1, NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD2, NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD3, NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD4, NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD5, NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD6, NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD7, NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD9, PWM1, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD11, NAND, NORMAL, NORMAL, OUTPUT),
-	DEFAULT_PINMUX(GMI_AD13, NAND, UP, NORMAL, INPUT),
-	DEFAULT_PINMUX(GMI_WR_N, NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_OE_N, NAND, NORMAL, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GMI_DQS, NAND, NORMAL, TRISTATE, OUTPUT),
+static struct pmux_pingrp_config unused_pins_lowpower[] = {
+	DEFAULT_PINMUX(GMI_WAIT_PI7, NAND, UP, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_ADV_N_PK0, NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_CLK_PK1, NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_CS3_N_PK4, NAND, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(GMI_CS7_N_PI6, NAND, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_AD0_PG0, NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD1_PG1, NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD2_PG2, NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD3_PG3, NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD4_PG4, NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD5_PG5, NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD6_PG6, NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD7_PG7, NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD9_PH1, PWM1, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD11_PH3, NAND, NORMAL, NORMAL, OUTPUT),
+	DEFAULT_PINMUX(GMI_AD13_PH5, NAND, UP, NORMAL, INPUT),
+	DEFAULT_PINMUX(GMI_WR_N_PI0, NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_OE_N_PI1, NAND, NORMAL, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(GMI_DQS_PI2, NAND, NORMAL, TRISTATE, OUTPUT),
 };
 
-static struct padctrl_config cardhu_padctrl[] = {
-	/* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+static struct pmux_drvgrp_config cardhu_padctrl[] = {
+	/* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
 	DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
 		SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
 };
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 3b18e28..d01abce 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -31,7 +31,6 @@
 #endif
 #ifdef CONFIG_USB_EHCI_TEGRA
 #include <asm/arch-tegra/usb.h>
-#include <asm/arch/usb.h>
 #include <usb.h>
 #endif
 #ifdef CONFIG_TEGRA_MMC
@@ -48,6 +47,12 @@ const struct tegra_sysinfo sysinfo = {
 	CONFIG_TEGRA_BOARD_STRING
 };
 
+void __pinmux_init(void)
+{
+}
+
+void pinmux_init(void) __attribute__((weak, alias("__pinmux_init")));
+
 void __pin_mux_usb(void)
 {
 }
@@ -176,9 +181,7 @@ void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
 
 int board_early_init_f(void)
 {
-#if !defined(CONFIG_TEGRA20)
 	pinmux_init();
-#endif
 	board_init_uart_f();
 
 	/* Initialize periph GPIOs */
diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c
index 2c23a29..f2d05af 100644
--- a/board/nvidia/dalmore/dalmore.c
+++ b/board/nvidia/dalmore/dalmore.c
@@ -29,17 +29,18 @@
  */
 void pinmux_init(void)
 {
-	pinmux_config_table(tegra114_pinmux_set_nontristate,
+	pinmux_config_pingrp_table(tegra114_pinmux_set_nontristate,
 		ARRAY_SIZE(tegra114_pinmux_set_nontristate));
 
-	pinmux_config_table(tegra114_pinmux_common,
+	pinmux_config_pingrp_table(tegra114_pinmux_common,
 		ARRAY_SIZE(tegra114_pinmux_common));
 
-	pinmux_config_table(unused_pins_lowpower,
+	pinmux_config_pingrp_table(unused_pins_lowpower,
 		ARRAY_SIZE(unused_pins_lowpower));
 
 	/* Initialize any non-default pad configs (APB_MISC_GP regs) */
-	padgrp_config_table(dalmore_padctrl, ARRAY_SIZE(dalmore_padctrl));
+	pinmux_config_drvgrp_table(dalmore_padctrl,
+		ARRAY_SIZE(dalmore_padctrl));
 }
 
 #if defined(CONFIG_TEGRA_MMC)
diff --git a/board/nvidia/dalmore/pinmux-config-dalmore.h b/board/nvidia/dalmore/pinmux-config-dalmore.h
index 9dcd5e4..891ac07 100644
--- a/board/nvidia/dalmore/pinmux-config-dalmore.h
+++ b/board/nvidia/dalmore/pinmux-config-dalmore.h
@@ -17,9 +17,9 @@
 #ifndef _PINMUX_CONFIG_DALMORE_H_
 #define _PINMUX_CONFIG_DALMORE_H_
 
-#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io)	\
+#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)		\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -29,9 +29,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
+#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)	\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -41,9 +41,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define DDC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
+#define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -53,9 +53,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define VI_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -65,9 +65,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_##_ioreset	\
 	}
 
-#define CEC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od)	\
+#define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)		\
 	{								\
-		.pingroup   = PINGRP_##_pingroup,			\
+		.pingrp     = PMUX_PINGRP_##_pingrp,			\
 		.func       = PMUX_FUNC_##_mux,				\
 		.pull       = PMUX_PULL_##_pull,			\
 		.tristate   = PMUX_TRI_##_tri,				\
@@ -79,156 +79,156 @@
 
 #define USB_PINMUX CEC_PINMUX
 
-#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
 	{						\
-		.padgrp = PDRIVE_PINGROUP_##_padgrp,	\
+		.drvgrp = PMUX_DRVGRP_##_drvgrp,	\
 		.slwf   = _slwf,			\
 		.slwr   = _slwr,			\
 		.drvup  = _drvup,			\
 		.drvdn  = _drvdn,			\
-		.lpmd   = PGRP_LPMD_##_lpmd,		\
-		.schmt  = PGRP_SCHMT_##_schmt,		\
-		.hsm    = PGRP_HSM_##_hsm,		\
+		.lpmd   = PMUX_LPMD_##_lpmd,		\
+		.schmt  = PMUX_SCHMT_##_schmt,		\
+		.hsm    = PMUX_HSM_##_hsm,		\
 	}
 
-static struct pingroup_config tegra114_pinmux_common[] = {
+static struct pmux_pingrp_config tegra114_pinmux_common[] = {
 	/* EXTPERIPH1 pinmux */
-	DEFAULT_PINMUX(CLK1_OUT,      EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(CLK1_OUT_PW4,      EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
 
 	/* I2S0 pinmux */
-	DEFAULT_PINMUX(DAP1_DIN,      I2S0,        NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(DAP1_DOUT,     I2S0,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP1_FS,       I2S0,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP1_SCLK,     I2S0,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP1_DIN_PN1,      I2S0,        NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(DAP1_DOUT_PN2,     I2S0,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP1_FS_PN0,       I2S0,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP1_SCLK_PN3,     I2S0,        NORMAL,    NORMAL,   INPUT),
 
 	/* I2S1 pinmux */
-	DEFAULT_PINMUX(DAP2_DIN,      I2S1,        NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(DAP2_DOUT,     I2S1,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP2_FS,       I2S1,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP2_SCLK,     I2S1,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP2_DIN_PA4,      I2S1,        NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(DAP2_DOUT_PA5,     I2S1,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP2_FS_PA2,       I2S1,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP2_SCLK_PA3,     I2S1,        NORMAL,    NORMAL,   INPUT),
 
 	/* I2S3 pinmux */
-	DEFAULT_PINMUX(DAP4_DIN,      I2S3,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP4_DOUT,     I2S3,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP4_FS,       I2S3,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP4_SCLK,     I2S3,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP4_DIN_PP5,      I2S3,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP4_DOUT_PP6,     I2S3,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP4_FS_PP4,       I2S3,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP4_SCLK_PP7,     I2S3,        NORMAL,    NORMAL,   INPUT),
 
 	/* CLDVFS pinmux */
-	DEFAULT_PINMUX(DVFS_PWM,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(DVFS_CLK,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(DVFS_PWM_PX0,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(DVFS_CLK_PX2,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
 
 	/* ULPI pinmux */
-	DEFAULT_PINMUX(ULPI_CLK,      ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA0,    ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA1,    ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA2,    ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA3,    ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA4,    ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA5,    ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA6,    ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA7,    ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DIR,      ULPI,        NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(ULPI_NXT,      ULPI,        NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(ULPI_STP,      ULPI,        NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(ULPI_CLK_PY0,      ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA0_PO1,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA1_PO2,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA2_PO3,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA3_PO4,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA4_PO5,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA5_PO6,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA6_PO7,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA7_PO0,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DIR_PY1,      ULPI,        NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(ULPI_NXT_PY2,      ULPI,        NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(ULPI_STP_PY3,      ULPI,        NORMAL,    NORMAL,   OUTPUT),
 
 	/* I2C3 pinmux */
-	I2C_PINMUX(CAM_I2C_SCL, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-	I2C_PINMUX(CAM_I2C_SDA, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 
 	/* VI pinmux */
-	VI_PINMUX(CAM_MCLK, VI_ALT3,  NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
+	VI_PINMUX(CAM_MCLK_PCC0, VI_ALT3,  NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
 
 	/* VI_ALT1 pinmux */
-	VI_PINMUX(GPIO_PBB0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
+	VI_PINMUX(PBB0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
 
 	/* VGP4 pinmux */
-	VI_PINMUX(GPIO_PBB4, VGP4,    NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
+	VI_PINMUX(PBB4, VGP4,    NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
 
 	/* I2C2 pinmux */
-	I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-	I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 
 	/* UARTD pinmux */
-	DEFAULT_PINMUX(GMI_A16,       UARTD,       NORMAL,    NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(GMI_A17,       UARTD,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GMI_A18,       UARTD,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GMI_A19,       UARTD,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(GMI_A16_PJ7,       UARTD,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(GMI_A17_PB0,       UARTD,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(GMI_A18_PB1,       UARTD,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(GMI_A19_PK7,       UARTD,       NORMAL,    NORMAL,   OUTPUT),
 
 	/* SPI4 pinmux */
-	DEFAULT_PINMUX(GMI_AD5,       SPI4,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(GMI_AD6,       SPI4,        UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(GMI_AD7,       SPI4,        UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(GMI_AD12,      RSVD1,       NORMAL,    NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(GMI_CS6_N,     SPI4,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(GMI_WR_N,      SPI4,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(GMI_AD5_PG5,       SPI4,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(GMI_AD6_PG6,       SPI4,        UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(GMI_AD7_PG7,       SPI4,        UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(GMI_AD12_PH4,      RSVD1,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(GMI_CS6_N_PI3,     SPI4,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(GMI_WR_N_PI0,      SPI4,        NORMAL,    NORMAL,   INPUT),
 
 	/* PWM1 pinmux */
-	DEFAULT_PINMUX(GMI_AD9,       PWM1,        NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(GMI_AD9_PH1,       PWM1,        NORMAL,    NORMAL,   OUTPUT),
 
 	/* SOC pinmux */
-	DEFAULT_PINMUX(GMI_CS1_N,     SOC,         NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GMI_OE_N,      SOC,         NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(GMI_CS1_N_PJ2,     SOC,         NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(GMI_OE_N_PI1,      SOC,         NORMAL,    TRISTATE, INPUT),
 
 	/* EXTPERIPH2 pinmux */
-	DEFAULT_PINMUX(CLK2_OUT,      EXTPERIPH2,  NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(CLK2_OUT_PW5,      EXTPERIPH2,  NORMAL,    NORMAL,   OUTPUT),
 
 	/* SDMMC1 pinmux */
-	DEFAULT_PINMUX(SDMMC1_CLK,    SDMMC1,      NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC1_CMD,    SDMMC1,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT0,   SDMMC1,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT1,   SDMMC1,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT2,   SDMMC1,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT3,   SDMMC1,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC1_CLK_PZ0,    SDMMC1,      NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC1_CMD_PZ1,    SDMMC1,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT0_PY7,   SDMMC1,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT1_PY6,   SDMMC1,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT2_PY5,   SDMMC1,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT3_PY4,   SDMMC1,      UP,        NORMAL,   INPUT),
 
 	/* SDMMC3 pinmux */
-	DEFAULT_PINMUX(SDMMC3_CLK,    SDMMC3,      NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_CMD,    SDMMC3,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT0,   SDMMC3,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT1,   SDMMC3,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT2,   SDMMC3,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT3,   SDMMC3,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_CLK_LB_IN,  SDMMC3,  UP,        TRISTATE, INPUT),
-	DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT, SDMMC3,  DOWN,      NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_CLK_PA6,    SDMMC3,      NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_CMD_PA7,    SDMMC3,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT0_PB7,   SDMMC3,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT1_PB6,   SDMMC3,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT2_PB5,   SDMMC3,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT3_PB4,   SDMMC3,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_CLK_LB_IN_PEE5,  SDMMC3,  UP,        TRISTATE, INPUT),
+	DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3,  DOWN,      NORMAL,   INPUT),
 
 	/* SDMMC4 pinmux */
-	DEFAULT_PINMUX(SDMMC4_CLK,    SDMMC4,      NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_CMD,    SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT0,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT1,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT2,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT3,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT4,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT5,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT6,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT7,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_CLK_PCC4,    SDMMC4,      NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_CMD_PT7,     SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT0_PAA0,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT1_PAA1,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT2_PAA2,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT3_PAA3,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT4_PAA4,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT5_PAA5,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT6_PAA6,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT7_PAA7,   SDMMC4,      UP,        NORMAL,   INPUT),
 
 	/* BLINK pinmux */
-	DEFAULT_PINMUX(CLK_32K_OUT,   BLINK,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(CLK_32K_OUT_PA0,   BLINK,       NORMAL,    NORMAL,   OUTPUT),
 
 	/* KBC pinmux */
-	DEFAULT_PINMUX(KB_COL0,       KBC,         UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(KB_COL1,       KBC,         UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(KB_COL2,       KBC,         UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(KB_ROW0,       KBC,         UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(KB_ROW1,       KBC,         UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(KB_ROW2,       KBC,         UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(KB_COL0_PQ0,       KBC,         UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(KB_COL1_PQ1,       KBC,         UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(KB_COL2_PQ2,       KBC,         UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(KB_ROW0_PR0,       KBC,         UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(KB_ROW1_PR1,       KBC,         UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(KB_ROW2_PR2,       KBC,         UP,        NORMAL,   INPUT),
 
 	/*Audio Codec*/
-	DEFAULT_PINMUX(DAP3_DIN,      RSVD1,       NORMAL,    TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(DAP3_SCLK,     RSVD1,       NORMAL,    TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(GPIO_PV0,      RSVD1,       NORMAL,    TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(KB_ROW7,       RSVD1,       UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP3_DIN_PP1,      RSVD1,       NORMAL,    TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(DAP3_SCLK_PP3,     RSVD1,       NORMAL,    TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(PV0,               RSVD1,       NORMAL,    TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(KB_ROW7_PR7,       RSVD1,       UP,        NORMAL,   INPUT),
 
 	/* UARTA pinmux */
-	DEFAULT_PINMUX(KB_ROW10,      UARTA,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(KB_ROW9,       UARTA,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(KB_ROW10_PS2,      UARTA,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(KB_ROW9_PS1,       UARTA,       NORMAL,    NORMAL,   OUTPUT),
 
 	/* I2CPWR pinmux (I2C5) */
-	I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-	I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 
 	/* SYSCLK pinmux */
-	DEFAULT_PINMUX(SYS_CLK_REQ,   SYSCLK,      NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(SYS_CLK_REQ_PZ5,   SYSCLK,      NORMAL,    NORMAL,   OUTPUT),
 
 	/* RTCK pinmux */
 	DEFAULT_PINMUX(JTAG_RTCK,     RTCK,        NORMAL,    NORMAL,   INPUT),
@@ -249,121 +249,121 @@ static struct pingroup_config tegra114_pinmux_common[] = {
 	DEFAULT_PINMUX(RESET_OUT_N,   RESET_OUT_N, NORMAL,    NORMAL,   OUTPUT),
 
 	/* EXTPERIPH3 pinmux */
-	DEFAULT_PINMUX(CLK3_OUT,      EXTPERIPH3,  NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(CLK3_OUT_PEE0,      EXTPERIPH3,  NORMAL,    NORMAL,   OUTPUT),
 
 	/* I2C1 pinmux */
-	I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-	I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 
 	/* UARTB pinmux */
-	DEFAULT_PINMUX(UART2_CTS_N,   UARTB,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(UART2_RTS_N,   UARTB,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(UART2_CTS_N_PJ5,   UARTB,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(UART2_RTS_N_PJ6,   UARTB,       NORMAL,    NORMAL,   OUTPUT),
 
 	/* IRDA pinmux */
-	DEFAULT_PINMUX(UART2_RXD,     UARTB,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(UART2_TXD,     UARTB,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(UART2_RXD_PC3,     IRDA,        NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(UART2_TXD_PC2,     IRDA,        NORMAL,    NORMAL,   OUTPUT),
 
 	/* UARTC pinmux */
-	DEFAULT_PINMUX(UART3_CTS_N,   UARTC,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(UART3_RTS_N,   UARTC,       NORMAL,    NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(UART3_RXD,     UARTC,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(UART3_TXD,     UARTC,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(UART3_CTS_N_PA1,   UARTC,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(UART3_RTS_N_PC0,   UARTC,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(UART3_RXD_PW7,     UARTC,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(UART3_TXD_PW6,     UARTC,       NORMAL,    NORMAL,   OUTPUT),
 
 	/* OWR pinmux */
-	DEFAULT_PINMUX(OWR,           OWR,         NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(OWR,               OWR,         NORMAL,    NORMAL,   INPUT),
 
 	/* CEC pinmux */
-	CEC_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
+	CEC_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
 
 	/* I2C4 pinmux */
-	DDC_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
-	DDC_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
+	DDC_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
+	DDC_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
 
 	/* USB pinmux */
-	USB_PINMUX(USB_VBUS_EN0, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	USB_PINMUX(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 
 	/* nct */
-	DEFAULT_PINMUX(GPIO_X6_AUD,   SPI6,        UP,        TRISTATE, INPUT),
+	DEFAULT_PINMUX(GPIO_X6_AUD_PX6,   SPI6,        UP,        TRISTATE, INPUT),
 };
 
-static struct pingroup_config unused_pins_lowpower[] = {
-	DEFAULT_PINMUX(CLK1_REQ,      RSVD3,       DOWN, TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(USB_VBUS_EN1,  RSVD3,       DOWN, TRISTATE, OUTPUT),
+static struct pmux_pingrp_config unused_pins_lowpower[] = {
+	DEFAULT_PINMUX(CLK1_REQ_PEE2,     RSVD3,       DOWN, TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(USB_VBUS_EN1_PN5,  RSVD3,       DOWN, TRISTATE, OUTPUT),
 };
 
 /* Initially setting all used GPIO's to non-TRISTATE */
-static struct pingroup_config tegra114_pinmux_set_nontristate[] = {
-	DEFAULT_PINMUX(GPIO_X4_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GPIO_X5_AUD,     RSVD1,  UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_X6_AUD,     RSVD3,  UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_X7_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GPIO_W2_AUD,     RSVD1,  UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_W3_AUD,     SPI6,   UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_X1_AUD,     RSVD3,  DOWN,    NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_X3_AUD,     RSVD3,  UP,      NORMAL,    INPUT),
-
-	DEFAULT_PINMUX(DAP3_FS,         I2S2,   DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(DAP3_DIN,        I2S2,   DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(DAP3_DOUT,       I2S2,   DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(DAP3_SCLK,       I2S2,   DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GPIO_PV0,        RSVD3,  NORMAL,  NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_PV1,        RSVD1,  NORMAL,  NORMAL,    INPUT),
-
-	DEFAULT_PINMUX(GPIO_PBB3,       RSVD3,  DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GPIO_PBB5,       RSVD3,  DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GPIO_PBB6,       RSVD3,  DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GPIO_PBB7,       RSVD3,  DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GPIO_PCC1,       RSVD3,  DOWN,    NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_PCC2,       RSVD3,  DOWN,    NORMAL,    INPUT),
-
-	DEFAULT_PINMUX(GMI_AD0,         GMI,    NORMAL,  NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GMI_AD1,         GMI,    NORMAL,  NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GMI_AD10,        GMI,    DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GMI_AD11,        GMI,    DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GMI_AD12,        GMI,    UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GMI_AD13,        GMI,    DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GMI_AD2,         GMI,    NORMAL,  NORMAL,    INPUT),
-	DEFAULT_PINMUX(GMI_AD3,         GMI,    NORMAL,  NORMAL,    INPUT),
-	DEFAULT_PINMUX(GMI_AD8,         GMI,    DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GMI_ADV_N,       GMI,    UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GMI_CLK,         GMI,    DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GMI_CS0_N,       GMI,    UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GMI_CS2_N,       GMI,    UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GMI_CS3_N,       GMI,    UP,      NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GMI_CS4_N,       GMI,    UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GMI_CS7_N,       GMI,    UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GMI_DQS,         GMI,    UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GMI_IORDY,       GMI,    UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GMI_WP_N,        GMI,    UP,      NORMAL,    INPUT),
-
-	DEFAULT_PINMUX(SDMMC1_WP_N,     SPI4,   UP,      NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(CLK2_REQ,        RSVD3,  NORMAL,  NORMAL,    OUTPUT),
-
-	DEFAULT_PINMUX(KB_COL3,         KBC,    UP,      NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(KB_COL4,		SDMMC3, UP,	 NORMAL,    INPUT),
-	DEFAULT_PINMUX(KB_COL5,         KBC,    UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(KB_COL6,         KBC,    UP,      NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(KB_COL7,         KBC,    UP,      NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(KB_ROW3,         KBC,    DOWN,    NORMAL,    INPUT),
-	DEFAULT_PINMUX(KB_ROW4,         KBC,    DOWN,    NORMAL,    INPUT),
-	DEFAULT_PINMUX(KB_ROW6,         KBC,    DOWN,    NORMAL,    INPUT),
-	DEFAULT_PINMUX(KB_ROW8,         KBC,    UP,      NORMAL,    INPUT),
-
-	DEFAULT_PINMUX(CLK3_REQ,        RSVD3,  NORMAL,  NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GPIO_PU4,        RSVD3,  NORMAL,  NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GPIO_PU5,        RSVD3,  NORMAL,  NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_PU6,        RSVD3,  NORMAL,  NORMAL,    INPUT),
-
-	DEFAULT_PINMUX(HDMI_INT,        RSVD1,   DOWN,    NORMAL,   INPUT),
-
-	DEFAULT_PINMUX(GMI_AD9,         PWM1,   NORMAL,   NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(SPDIF_IN,	USB,	NORMAL,   NORMAL,   INPUT),
-
-	DEFAULT_PINMUX(SDMMC3_CD_N,     SDMMC3, UP,       NORMAL,   INPUT),
+static struct pmux_pingrp_config tegra114_pinmux_set_nontristate[] = {
+	DEFAULT_PINMUX(GPIO_X4_AUD_PX4,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(GPIO_X5_AUD_PX5,     RSVD1,  UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GPIO_X6_AUD_PX6,     RSVD3,  UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GPIO_X7_AUD_PX7,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(GPIO_W2_AUD_PW2,     RSVD1,  UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GPIO_W3_AUD_PW3,     SPI6,   UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GPIO_X1_AUD_PX1,     RSVD3,  DOWN,    NORMAL,    INPUT),
+	DEFAULT_PINMUX(GPIO_X3_AUD_PX3,     RSVD3,  UP,      NORMAL,    INPUT),
+
+	DEFAULT_PINMUX(DAP3_FS_PP0,         I2S2,   DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(DAP3_DIN_PP1,        I2S2,   DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(DAP3_DOUT_PP2,       I2S2,   DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(DAP3_SCLK_PP3,       I2S2,   DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(PV0,                 RSVD3,  NORMAL,  NORMAL,    INPUT),
+	DEFAULT_PINMUX(PV1,                 RSVD1,  NORMAL,  NORMAL,    INPUT),
+
+	DEFAULT_PINMUX(PBB3,                RSVD3,  DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(PBB5,                RSVD3,  DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(PBB6,                RSVD3,  DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(PBB7,                RSVD3,  DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(PCC1,                RSVD3,  DOWN,    NORMAL,    INPUT),
+	DEFAULT_PINMUX(PCC2,                RSVD3,  DOWN,    NORMAL,    INPUT),
+
+	DEFAULT_PINMUX(GMI_AD0_PG0,         GMI,    NORMAL,  NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(GMI_AD1_PG1,         GMI,    NORMAL,  NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(GMI_AD10_PH2,        GMI,    DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(GMI_AD11_PH3,        GMI,    DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(GMI_AD12_PH4,        GMI,    UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GMI_AD13_PH5,        GMI,    DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(GMI_AD2_PG2,         GMI,    NORMAL,  NORMAL,    INPUT),
+	DEFAULT_PINMUX(GMI_AD3_PG3,         GMI,    NORMAL,  NORMAL,    INPUT),
+	DEFAULT_PINMUX(GMI_AD8_PH0,         GMI,    DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(GMI_ADV_N_PK0,       GMI,    UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GMI_CLK_PK1,         GMI,    DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(GMI_CS0_N_PJ0,       GMI,    UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GMI_CS2_N_PK3,       GMI,    UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GMI_CS3_N_PK4,       GMI,    UP,      NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(GMI_CS4_N_PK2,       GMI,    UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GMI_CS7_N_PI6,       GMI,    UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GMI_DQS_P_PJ3,       GMI,    UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GMI_IORDY_PI5,       GMI,    UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GMI_WP_N_PC7,        GMI,    UP,      NORMAL,    INPUT),
+
+	DEFAULT_PINMUX(SDMMC1_WP_N_PV3,     SPI4,   UP,      NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(CLK2_REQ_PCC5,       RSVD3,  NORMAL,  NORMAL,    OUTPUT),
+
+	DEFAULT_PINMUX(KB_COL3_PQ3,         KBC,    UP,      NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(KB_COL4_PQ4,         SDMMC3, UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(KB_COL5_PQ5,         KBC,    UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(KB_COL6_PQ6,         KBC,    UP,      NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(KB_COL7_PQ7,         KBC,    UP,      NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(KB_ROW3_PR3,         KBC,    DOWN,    NORMAL,    INPUT),
+	DEFAULT_PINMUX(KB_ROW4_PR4,         KBC,    DOWN,    NORMAL,    INPUT),
+	DEFAULT_PINMUX(KB_ROW6_PR6,         KBC,    DOWN,    NORMAL,    INPUT),
+	DEFAULT_PINMUX(KB_ROW8_PS0,         KBC,    UP,      NORMAL,    INPUT),
+
+	DEFAULT_PINMUX(CLK3_REQ_PEE1,       RSVD3,  NORMAL,  NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(PU4,                 RSVD3,  NORMAL,  NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(PU5,                 RSVD3,  NORMAL,  NORMAL,    INPUT),
+	DEFAULT_PINMUX(PU6,                 RSVD3,  NORMAL,  NORMAL,    INPUT),
+
+	DEFAULT_PINMUX(HDMI_INT_PN7,        RSVD1,   DOWN,    NORMAL,   INPUT),
+
+	DEFAULT_PINMUX(GMI_AD9_PH1,         PWM1,   NORMAL,   NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(SPDIF_IN_PK6,        USB,    NORMAL,   NORMAL,   INPUT),
+
+	DEFAULT_PINMUX(SDMMC3_CD_N_PV2,     SDMMC3, UP,       NORMAL,   INPUT),
 };
 
-static struct padctrl_config dalmore_padctrl[] = {
-	/* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+static struct pmux_drvgrp_config dalmore_padctrl[] = {
+	/* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
 	DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
 		SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
 };
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c
index b74c219..c892a25 100644
--- a/board/nvidia/harmony/harmony.c
+++ b/board/nvidia/harmony/harmony.c
@@ -25,28 +25,28 @@ void pin_mux_mmc(void)
 	funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT);
 
 	/* For power GPIO PI6 */
-	pinmux_tristate_disable(PINGRP_ATA);
+	pinmux_tristate_disable(PMUX_PINGRP_ATA);
 	/* For CD GPIO PH2 */
-	pinmux_tristate_disable(PINGRP_ATD);
+	pinmux_tristate_disable(PMUX_PINGRP_ATD);
 
 	/* For power GPIO PT3 */
-	pinmux_tristate_disable(PINGRP_DTB);
+	pinmux_tristate_disable(PMUX_PINGRP_DTB);
 	/* For CD GPIO PI5 */
-	pinmux_tristate_disable(PINGRP_ATC);
+	pinmux_tristate_disable(PMUX_PINGRP_ATC);
 }
 #endif
 
 void pin_mux_usb(void)
 {
 	funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
-	pinmux_set_func(PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
-	pinmux_tristate_disable(PINGRP_CDEV2);
+	pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
+	pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
 	/* USB2 PHY reset GPIO */
-	pinmux_tristate_disable(PINGRP_UAC);
+	pinmux_tristate_disable(PMUX_PINGRP_UAC);
 }
 
 void pin_mux_display(void)
 {
-	pinmux_set_func(PINGRP_SDC, PMUX_FUNC_PWM);
-	pinmux_tristate_disable(PINGRP_SDC);
+	pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);
+	pinmux_tristate_disable(PMUX_PINGRP_SDC);
 }
diff --git a/board/nvidia/jetson-tk1/Makefile b/board/nvidia/jetson-tk1/Makefile
new file mode 100644
index 0000000..0f05411
--- /dev/null
+++ b/board/nvidia/jetson-tk1/Makefile
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2014
+# NVIDIA Corporation <www.nvidia.com>
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= ../venice2/as3722_init.o
+obj-y	+= jetson-tk1.o
diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c
new file mode 100644
index 0000000..f97aafa
--- /dev/null
+++ b/board/nvidia/jetson-tk1/jetson-tk1.c
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2014
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/pinmux.h>
+#include "pinmux-config-jetson-tk1.h"
+
+/*
+ * Routine: pinmux_init
+ * Description: Do individual peripheral pinmux configs
+ */
+void pinmux_init(void)
+{
+	pinmux_config_pingrp_table(jetson_tk1_pingrps,
+				   ARRAY_SIZE(jetson_tk1_pingrps));
+
+	pinmux_config_drvgrp_table(jetson_tk1_drvgrps,
+				   ARRAY_SIZE(jetson_tk1_drvgrps));
+}
diff --git a/board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h b/board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h
new file mode 100644
index 0000000..1adcae4
--- /dev/null
+++ b/board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h
@@ -0,0 +1,227 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _PINMUX_CONFIG_JETSON_TK1_H_
+#define _PINMUX_CONFIG_JETSON_TK1_H_
+
+#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _rcv_sel)	\
+	{							\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
+		.func		= PMUX_FUNC_##_mux,		\
+		.pull		= PMUX_PULL_##_pull,		\
+		.tristate	= PMUX_TRI_##_tri,		\
+		.io		= PMUX_PIN_##_io,		\
+		.od		= PMUX_PIN_OD_##_od,		\
+		.rcv_sel	= PMUX_PIN_RCV_SEL_##_rcv_sel,	\
+		.lock		= PMUX_PIN_LOCK_DEFAULT,	\
+		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
+	}
+
+static const struct pmux_pingrp_config jetson_tk1_pingrps[] = {
+	/*     pingrp,                 mux,          pull,   tri,      e_input, od,      rcv_sel */
+	PINCFG(CLK_32K_OUT_PA0,        SOC,          UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(UART3_CTS_N_PA1,        UARTC,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DAP2_FS_PA2,            I2S1,         NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DAP2_SCLK_PA3,          I2S1,         NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DAP2_DIN_PA4,           I2S1,         NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DAP2_DOUT_PA5,          I2S1,         NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC3_CLK_PA6,         SDMMC3,       NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(SDMMC3_CMD_PA7,         SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PB0,                    UARTD,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PB1,                    UARTD,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC3_DAT3_PB4,        SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC3_DAT2_PB5,        SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC3_DAT1_PB6,        SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC3_DAT0_PB7,        SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(UART3_RTS_N_PC0,        UARTC,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(UART2_TXD_PC2,          IRDA,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(UART2_RXD_PC3,          IRDA,         UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(GEN1_I2C_SCL_PC4,       I2C1,         NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
+	PINCFG(GEN1_I2C_SDA_PC5,       I2C1,         NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
+	PINCFG(PC7,                    RSVD1,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PG0,                    RSVD1,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PG1,                    RSVD1,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PG2,                    RSVD1,        DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PG3,                    RSVD1,        DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PG4,                    SPI4,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PG5,                    SPI4,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PG6,                    SPI4,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PG7,                    SPI4,         NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PH0,                    GMI,          DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PH1,                    PWM1,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PH2,                    GMI,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PH3,                    GMI,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PH4,                    RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PH5,                    RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PH6,                    GMI,          UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PH7,                    GMI,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PI0,                    RSVD1,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PI1,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PI2,                    RSVD4,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PI3,                    SPI4,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PI4,                    GMI,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PI5,                    RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PI6,                    RSVD1,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PI7,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PJ0,                    RSVD1,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PJ2,                    RSVD1,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(UART2_CTS_N_PJ5,        UARTB,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(UART2_RTS_N_PJ6,        UARTB,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PJ7,                    UARTD,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PK0,                    SOC,          UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PK1,                    RSVD4,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PK2,                    RSVD1,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PK3,                    GMI,          UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PK4,                    RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(SPDIF_OUT_PK5,          RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(SPDIF_IN_PK6,           RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PK7,                    UARTD,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(DAP1_FS_PN0,            I2S0,         DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DAP1_DIN_PN1,           I2S0,         DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DAP1_DOUT_PN2,          SATA,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(DAP1_SCLK_PN3,          I2S0,         DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(USB_VBUS_EN0_PN4,       USB,          UP,     NORMAL,   INPUT,   ENABLE,  DEFAULT),
+	PINCFG(USB_VBUS_EN1_PN5,       USB,          UP,     NORMAL,   INPUT,   ENABLE,  DEFAULT),
+	PINCFG(HDMI_INT_PN7,           RSVD1,        DOWN,   NORMAL,   INPUT,   DEFAULT, NORMAL),
+	PINCFG(ULPI_DATA7_PO0,         ULPI,         UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(ULPI_DATA0_PO1,         ULPI,         UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(ULPI_DATA1_PO2,         ULPI,         UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(ULPI_DATA2_PO3,         ULPI,         UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(ULPI_DATA3_PO4,         ULPI,         UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(ULPI_DATA4_PO5,         ULPI,         UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(ULPI_DATA5_PO6,         ULPI,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(ULPI_DATA6_PO7,         ULPI,         UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DAP3_FS_PP0,            I2S2,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(DAP3_DIN_PP1,           I2S2,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(DAP3_DOUT_PP2,          RSVD4,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(DAP3_SCLK_PP3,          RSVD3,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(DAP4_FS_PP4,            I2S3,         DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DAP4_DIN_PP5,           I2S3,         DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DAP4_DOUT_PP6,          I2S3,         DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DAP4_SCLK_PP7,          I2S3,         DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_COL0_PQ0,            RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_COL1_PQ1,            RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_COL2_PQ2,            RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_COL3_PQ3,            KBC,          DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(KB_COL4_PQ4,            SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_COL5_PQ5,            RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_COL6_PQ6,            RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_COL7_PQ7,            RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_ROW0_PR0,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(KB_ROW1_PR1,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(KB_ROW2_PR2,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(KB_ROW3_PR3,            SYS,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(KB_ROW4_PR4,            RSVD3,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_ROW5_PR5,            RSVD3,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(KB_ROW6_PR6,            DISPLAYA_ALT, DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_ROW7_PR7,            RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_ROW8_PS0,            RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_ROW9_PS1,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(KB_ROW10_PS2,           RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_ROW11_PS3,           RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(KB_ROW12_PS4,           RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(KB_ROW13_PS5,           RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_ROW14_PS6,           RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(KB_ROW15_PS7,           SOC,          UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(KB_ROW16_PT0,           RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(KB_ROW17_PT1,           RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(GEN2_I2C_SCL_PT5,       I2C2,         NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
+	PINCFG(GEN2_I2C_SDA_PT6,       I2C2,         NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
+	PINCFG(SDMMC4_CMD_PT7,         SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PU0,                    RSVD4,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PU1,                    RSVD1,        DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PU2,                    RSVD1,        DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PU3,                    GMI,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PU4,                    GMI,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PU5,                    GMI,          UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PU6,                    RSVD3,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PV0,                    RSVD1,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PV1,                    RSVD1,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC3_CD_N_PV2,        SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC1_WP_N_PV3,        SDMMC1,       DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(DDC_SCL_PV4,            I2C4,         NORMAL, NORMAL,   INPUT,   DEFAULT, NORMAL),
+	PINCFG(DDC_SDA_PV5,            I2C4,         NORMAL, NORMAL,   INPUT,   DEFAULT, NORMAL),
+	PINCFG(GPIO_W2_AUD_PW2,        RSVD2,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(GPIO_W3_AUD_PW3,        SPI6,         UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DAP_MCLK1_PW4,          EXTPERIPH1,   NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(CLK2_OUT_PW5,           EXTPERIPH2,   NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(UART3_TXD_PW6,          UARTC,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(UART3_RXD_PW7,          UARTC,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DVFS_PWM_PX0,           CLDVFS,       NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(GPIO_X1_AUD_PX1,        RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(DVFS_CLK_PX2,           CLDVFS,       NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(GPIO_X3_AUD_PX3,        RSVD4,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(GPIO_X4_AUD_PX4,        GMI,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(GPIO_X5_AUD_PX5,        RSVD4,        UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(GPIO_X6_AUD_PX6,        GMI,          UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(GPIO_X7_AUD_PX7,        RSVD1,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(ULPI_CLK_PY0,           SPI1,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(ULPI_DIR_PY1,           SPI1,         DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(ULPI_NXT_PY2,           SPI1,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(ULPI_STP_PY3,           SPI1,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(SDMMC1_DAT3_PY4,        SDMMC1,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC1_DAT2_PY5,        SDMMC1,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC1_DAT1_PY6,        SDMMC1,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC1_DAT0_PY7,        SDMMC1,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC1_CLK_PZ0,         SDMMC1,       NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC1_CMD_PZ1,         SDMMC1,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PWR_I2C_SCL_PZ6,        I2CPWR,       NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
+	PINCFG(PWR_I2C_SDA_PZ7,        I2CPWR,       NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
+	PINCFG(SDMMC4_DAT0_PAA0,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC4_DAT1_PAA1,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC4_DAT2_PAA2,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC4_DAT3_PAA3,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC4_DAT4_PAA4,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC4_DAT5_PAA5,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC4_DAT6_PAA6,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC4_DAT7_PAA7,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PBB0,                   VIMCLK2_ALT,  NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(CAM_I2C_SCL_PBB1,       I2C3,         NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
+	PINCFG(CAM_I2C_SDA_PBB2,       I2C3,         NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
+	PINCFG(PBB3,                   VGP3,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PBB4,                   VGP4,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PBB5,                   RSVD3,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PBB6,                   RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PBB7,                   RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(CAM_MCLK_PCC0,          VI_ALT3,      NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PCC1,                   RSVD2,        DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(PCC2,                   RSVD2,        DOWN,   NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC4_CLK_PCC4,        SDMMC4,       NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(CLK2_REQ_PCC5,          RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(CLK3_OUT_PEE0,          EXTPERIPH3,   NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(CLK3_REQ_PEE1,          RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(DAP_MCLK1_REQ_PEE2,     SATA,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(HDMI_CEC_PEE3,          CEC,          NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
+	PINCFG(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(SDMMC3_CLK_LB_IN_PEE5,  SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(DP_HPD_PFF0,            DP,           UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(USB_VBUS_EN2_PFF1,      RSVD2,        NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PFF2,                   RSVD2,        UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(CORE_PWR_REQ,           PWRON,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(CPU_PWR_REQ,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(PWR_INT_N,              PMI,          UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(RESET_OUT_N,            RESET_OUT_N,  NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+	PINCFG(OWR,                    RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, NORMAL),
+	PINCFG(CLK_32K_IN,             RSVD2,        NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
+	PINCFG(JTAG_RTCK,              RTCK,         UP,     NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
+};
+
+#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+	{						\
+		.drvgrp = PMUX_DRVGRP_##_drvgrp,	\
+		.slwf   = _slwf,			\
+		.slwr   = _slwr,			\
+		.drvup  = _drvup,			\
+		.drvdn  = _drvdn,			\
+		.lpmd   = PMUX_LPMD_##_lpmd,		\
+		.schmt  = PMUX_SCHMT_##_schmt,		\
+		.hsm    = PMUX_HSM_##_hsm,		\
+	}
+
+static const struct pmux_drvgrp_config jetson_tk1_drvgrps[] = {
+};
+
+#endif /* PINMUX_CONFIG_JETSON_TK1_H */
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index ef4e481..ce2db40 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -37,14 +37,14 @@ void pin_mux_mmc(void)
 	funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT);
 
 	/* For power GPIO PI6 */
-	pinmux_tristate_disable(PINGRP_ATA);
+	pinmux_tristate_disable(PMUX_PINGRP_ATA);
 	/* For CD GPIO PI5 */
-	pinmux_tristate_disable(PINGRP_ATC);
+	pinmux_tristate_disable(PMUX_PINGRP_ATC);
 }
 #endif
 
 void pin_mux_usb(void)
 {
 	/* For USB's GPIO PD0. For now, since we have no pinmux in fdt */
-	pinmux_tristate_disable(PINGRP_SLXK);
+	pinmux_tristate_disable(PMUX_PINGRP_SLXK);
 }
diff --git a/board/nvidia/venice2/as3722_init.h b/board/nvidia/venice2/as3722_init.h
index 2a9e7cd..a7b2403 100644
--- a/board/nvidia/venice2/as3722_init.h
+++ b/board/nvidia/venice2/as3722_init.h
@@ -18,7 +18,11 @@
 #define AS3722_LDO6VOLTAGE_REG	0x16	/* VDD_SDMMC */
 #define AS3722_LDCONTROL_REG	0x4E
 
+#ifdef CONFIG_BOARD_JETSON_TK1
+#define AS3722_SD0VOLTAGE_DATA	(0x3C00 | AS3722_SD0VOLTAGE_REG)
+#else
 #define AS3722_SD0VOLTAGE_DATA	(0x2800 | AS3722_SD0VOLTAGE_REG)
+#endif
 #define AS3722_SD0CONTROL_DATA	(0x0100 | AS3722_SDCONTROL_REG)
 
 #define AS3722_SD1VOLTAGE_DATA	(0x3200 | AS3722_SD1VOLTAGE_REG)
diff --git a/board/nvidia/venice2/pinmux-config-venice2.h b/board/nvidia/venice2/pinmux-config-venice2.h
index b3d68d5..2f79ec7 100644
--- a/board/nvidia/venice2/pinmux-config-venice2.h
+++ b/board/nvidia/venice2/pinmux-config-venice2.h
@@ -8,9 +8,9 @@
 #ifndef _PINMUX_CONFIG_VENICE2_H_
 #define _PINMUX_CONFIG_VENICE2_H_
 
-#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io)	\
+#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)		\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -20,9 +20,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
+#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)	\
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -32,9 +32,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define DDC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
+#define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -44,9 +44,9 @@
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
-#define VI_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
 	{							\
-		.pingroup	= PINGRP_##_pingroup,		\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
 		.func		= PMUX_FUNC_##_mux,		\
 		.pull		= PMUX_PULL_##_pull,		\
 		.tristate	= PMUX_TRI_##_tri,		\
@@ -56,150 +56,150 @@
 		.ioreset	= PMUX_PIN_IO_RESET_##_ioreset	\
 	}
 
-#define CEC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od)	\
-	{								\
-		.pingroup   = PINGRP_##_pingroup,			\
-		.func       = PMUX_FUNC_##_mux,				\
-		.pull       = PMUX_PULL_##_pull,			\
-		.tristate   = PMUX_TRI_##_tri,				\
-		.io         = PMUX_PIN_##_io,				\
-		.lock       = PMUX_PIN_LOCK_##_lock,			\
-		.od         = PMUX_PIN_OD_##_od,			\
-		.ioreset    = PMUX_PIN_IO_RESET_DEFAULT,		\
+#define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)	\
+	{							\
+		.pingrp     = PMUX_PINGRP_##_pingrp,		\
+		.func       = PMUX_FUNC_##_mux,			\
+		.pull       = PMUX_PULL_##_pull,		\
+		.tristate   = PMUX_TRI_##_tri,			\
+		.io         = PMUX_PIN_##_io,			\
+		.lock       = PMUX_PIN_LOCK_##_lock,		\
+		.od         = PMUX_PIN_OD_##_od,		\
+		.ioreset    = PMUX_PIN_IO_RESET_DEFAULT,	\
 	}
 
 #define USB_PINMUX CEC_PINMUX
 
-#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
 	{						\
-		.padgrp = PDRIVE_PINGROUP_##_padgrp,	\
+		.drvgrp = PMUX_DRVGRP_##_drvgrp,	\
 		.slwf   = _slwf,			\
 		.slwr   = _slwr,			\
 		.drvup  = _drvup,			\
 		.drvdn  = _drvdn,			\
-		.lpmd   = PGRP_LPMD_##_lpmd,		\
-		.schmt  = PGRP_SCHMT_##_schmt,		\
-		.hsm    = PGRP_HSM_##_hsm,		\
+		.lpmd   = PMUX_LPMD_##_lpmd,		\
+		.schmt  = PMUX_SCHMT_##_schmt,		\
+		.hsm    = PMUX_HSM_##_hsm,		\
 	}
 
-static struct pingroup_config tegra124_pinmux_common[] = {
+static struct pmux_pingrp_config tegra124_pinmux_common[] = {
 	/* EXTPERIPH1 pinmux */
-	DEFAULT_PINMUX(CLK1_OUT,      EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(DAP_MCLK1_PW4,     EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
 
 	/* I2S0 pinmux */
-	DEFAULT_PINMUX(DAP1_DIN,      I2S0,        NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(DAP1_DOUT,     I2S0,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP1_FS,       I2S0,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP1_SCLK,     I2S0,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP1_DIN_PN1,      I2S0,        NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(DAP1_DOUT_PN2,     I2S0,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP1_FS_PN0,       I2S0,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP1_SCLK_PN3,     I2S0,        NORMAL,    NORMAL,   INPUT),
 
 	/* I2S1 pinmux */
-	DEFAULT_PINMUX(DAP2_DIN,      I2S1,        NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(DAP2_DOUT,     I2S1,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP2_FS,       I2S1,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP2_SCLK,     I2S1,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP2_DIN_PA4,      I2S1,        NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(DAP2_DOUT_PA5,     I2S1,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP2_FS_PA2,       I2S1,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP2_SCLK_PA3,     I2S1,        NORMAL,    NORMAL,   INPUT),
 
 	/* I2S3 pinmux */
-	DEFAULT_PINMUX(DAP4_DIN,      I2S3,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP4_DOUT,     I2S3,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP4_FS,       I2S3,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(DAP4_SCLK,     I2S3,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP4_DIN_PP5,      I2S3,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP4_DOUT_PP6,     I2S3,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP4_FS_PP4,       I2S3,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(DAP4_SCLK_PP7,     I2S3,        NORMAL,    NORMAL,   INPUT),
 
 	/* CLDVFS pinmux */
-	DEFAULT_PINMUX(DVFS_PWM,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(DVFS_CLK,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(DVFS_PWM_PX0,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(DVFS_CLK_PX2,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
 
 	/* ULPI pinmux */
-	DEFAULT_PINMUX(ULPI_DATA0,    ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA1,    ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA2,    ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA3,    ULPI,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA4,    ULPI,        UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA5,    ULPI,        UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DATA6,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA0_PO1,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA1_PO2,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA2_PO3,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA3_PO4,    ULPI,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA4_PO5,    ULPI,        UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA5_PO6,    ULPI,        UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DATA6_PO7,    ULPI,        NORMAL,    NORMAL,   INPUT),
 
 	/* EC KBC/SPI */
-	DEFAULT_PINMUX(ULPI_CLK,      SPI1,        UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_DIR,      SPI1,        UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_NXT,      SPI1,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(ULPI_STP,      SPI1,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_CLK_PY0,      SPI1,        UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_DIR_PY1,      SPI1,        UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_NXT_PY2,      SPI1,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(ULPI_STP_PY3,      SPI1,        NORMAL,    NORMAL,   INPUT),
 
 	/* I2C3 (TPM) pinmux */
-	I2C_PINMUX(CAM_I2C_SCL, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-	I2C_PINMUX(CAM_I2C_SDA, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 
 	/* I2C2 pinmux */
-	I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-	I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 
 	/* UARTD pinmux (UART4 on Servo board, unused) */
-	DEFAULT_PINMUX(GPIO_PJ7,      UARTD,       NORMAL,    NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(GPIO_PB0,      UARTD,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PB1,      UARTD,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PK7,      UARTD,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(PJ7,      UARTD,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(PB0,      UARTD,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PB1,      UARTD,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PK7,      UARTD,       NORMAL,    NORMAL,   OUTPUT),
 
 	/* SPI4 (Winbond 'boot ROM') */
-	DEFAULT_PINMUX(GPIO_PG5,       SPI4,        NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(GPIO_PG6,       SPI4,        UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(GPIO_PG7,       SPI4,        UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(GPIO_PI3,       SPI4,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(PG5,       SPI4,        NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(PG6,       SPI4,        UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(PG7,       SPI4,        UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(PI3,       SPI4,        NORMAL,    NORMAL,   INPUT),
 
 	/* Touch IRQ */
-	DEFAULT_PINMUX(GPIO_W3_AUD,   RSVD1,       NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(GPIO_W3_AUD_PW3,   RSVD1,       NORMAL,    NORMAL,   INPUT),
 
 	/* PWM1 pinmux */
-	DEFAULT_PINMUX(GPIO_PH1,       PWM1,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(PH1,       PWM1,       NORMAL,    NORMAL,   OUTPUT),
 
 	/* SDMMC1 pinmux */
-	DEFAULT_PINMUX(SDMMC1_CLK,    SDMMC1,      NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC1_CMD,    SDMMC1,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT0,   SDMMC1,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT1,   SDMMC1,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT2,   SDMMC1,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC1_DAT3,   SDMMC1,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC1_CLK_PZ0,    SDMMC1,      NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC1_CMD_PZ1,    SDMMC1,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT0_PY7,   SDMMC1,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT1_PY6,   SDMMC1,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT2_PY5,   SDMMC1,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC1_DAT3_PY4,   SDMMC1,      UP,        NORMAL,   INPUT),
 
 	/* SDMMC3 pinmux */
-	DEFAULT_PINMUX(SDMMC3_CLK,    SDMMC3,      NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_CMD,    SDMMC3,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT0,   SDMMC3,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT1,   SDMMC3,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT2,   SDMMC3,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_DAT3,   SDMMC3,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_CLK_LB_IN,  SDMMC3,  UP,        TRISTATE, INPUT),
-	DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT, SDMMC3,  DOWN,      NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_CLK_PA6,    SDMMC3,      NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_CMD_PA7,    SDMMC3,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT0_PB7,   SDMMC3,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT1_PB6,   SDMMC3,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT2_PB5,   SDMMC3,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_DAT3_PB4,   SDMMC3,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_CLK_LB_IN_PEE5,  SDMMC3,  UP,        TRISTATE, INPUT),
+	DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3,  DOWN,      NORMAL,   INPUT),
 
 	/* SDMMC4 pinmux */
-	DEFAULT_PINMUX(SDMMC4_CLK,    SDMMC4,      NORMAL,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_CMD,    SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT0,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT1,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT2,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT3,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT4,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT5,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT6,   SDMMC4,      UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC4_DAT7,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_CLK_PCC4,    SDMMC4,      NORMAL,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_CMD_PT7,     SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT0_PAA0,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT1_PAA1,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT2_PAA2,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT3_PAA3,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT4_PAA4,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT5_PAA5,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT6_PAA6,   SDMMC4,      UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC4_DAT7_PAA7,   SDMMC4,      UP,        NORMAL,   INPUT),
 
 	/* BLINK pinmux */
-	DEFAULT_PINMUX(CLK_32K_OUT,   BLINK,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(CLK_32K_OUT_PA0,   BLINK,       NORMAL,    NORMAL,   OUTPUT),
 
 	/* KBC pinmux */
-	DEFAULT_PINMUX(KB_COL0,       KBC,         UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(KB_COL1,       KBC,         UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(KB_COL2,       KBC,         UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(KB_ROW0,       KBC,         UP,        NORMAL,   INPUT),
-	DEFAULT_PINMUX(KB_ROW1,       KBC,         UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(KB_COL0_PQ0,       KBC,         UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(KB_COL1_PQ1,       KBC,         UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(KB_COL2_PQ2,       KBC,         UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(KB_ROW0_PR0,       KBC,         UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(KB_ROW1_PR1,       KBC,         UP,        NORMAL,   INPUT),
 
 	/* Misc */
-	DEFAULT_PINMUX(GPIO_PV0,      RSVD1,       NORMAL,    TRISTATE, OUTPUT),
-	DEFAULT_PINMUX(KB_ROW7,       RSVD1,       UP,        NORMAL,   INPUT),
+	DEFAULT_PINMUX(PV0,               RSVD1,       NORMAL,    TRISTATE, OUTPUT),
+	DEFAULT_PINMUX(KB_ROW7_PR7,       RSVD1,       UP,        NORMAL,   INPUT),
 
 	/* UARTA pinmux (BR_UART_TXD/RXD on Servo board) */
-	DEFAULT_PINMUX(KB_ROW9,       UARTA,       UP,        NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(KB_ROW10,      UARTA,       UP,        TRISTATE, INPUT),
+	DEFAULT_PINMUX(KB_ROW9_PS1,       UARTA,       UP,        NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(KB_ROW10_PS2,      UARTA,       UP,        TRISTATE, INPUT),
 
 	/* I2CPWR pinmux (I2C5) */
-	I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-	I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 
 	/* RTCK pinmux */
 	DEFAULT_PINMUX(JTAG_RTCK,     RTCK,        NORMAL,    NORMAL,   INPUT),
@@ -220,119 +220,119 @@ static struct pingroup_config tegra124_pinmux_common[] = {
 	DEFAULT_PINMUX(RESET_OUT_N,   RESET_OUT_N, NORMAL,    NORMAL,   OUTPUT),
 
 	/* EXTPERIPH3 pinmux */
-	DEFAULT_PINMUX(CLK3_OUT,      EXTPERIPH3,  NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3,  NORMAL,    NORMAL,   OUTPUT),
 
 	/* I2C1 pinmux */
-	I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-	I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 
 	/* UARTB, GPS */
-	DEFAULT_PINMUX(UART2_CTS_N,   UARTB,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(UART2_RTS_N,   UARTB,       NORMAL,    NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(UART2_RXD,     UARTB,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(UART2_TXD,     UARTB,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(UART2_CTS_N_PJ5,   UARTB,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(UART2_RTS_N_PJ6,   UARTB,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(UART2_RXD_PC3,     IRDA,        NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(UART2_TXD_PC2,     IRDA,        NORMAL,    NORMAL,   OUTPUT),
 
 	/* UARTC (WIFI/BT) */
-	DEFAULT_PINMUX(UART3_CTS_N,   UARTC,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(UART3_RTS_N,   UARTC,       NORMAL,    NORMAL,   OUTPUT),
-	DEFAULT_PINMUX(UART3_RXD,     UARTC,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(UART3_TXD,     UARTC,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(UART3_CTS_N_PA1,   UARTC,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(UART3_RTS_N_PC0,   UARTC,       NORMAL,    NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(UART3_RXD_PW7,     UARTC,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(UART3_TXD_PW6,     UARTC,       NORMAL,    NORMAL,   OUTPUT),
 
 	/* CEC pinmux */
-	CEC_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
+	CEC_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
 
 	/* I2C4 (HDMI_DDC) pinmux */
-	DDC_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
-	DDC_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
+	DDC_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
+	DDC_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
 
 	/* USB pinmux */
-	USB_PINMUX(USB_VBUS_EN0, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-	USB_PINMUX(USB_VBUS_EN1, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	USB_PINMUX(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+	USB_PINMUX(USB_VBUS_EN1_PN5, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
 
 	/* Unused, marked SNN_ on schematic, TRISTATE 'em */
-	DEFAULT_PINMUX(GPIO_PBB0,     RSVD3,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB3,     RSVD3,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB4,     RSVD3,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB5,     RSVD2,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB6,     RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PBB7,     RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PCC1,     RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PCC2,     RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PH3,      GMI,         NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PI7,      GMI,         NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PJ2,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_X5_AUD,   RSVD3,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_X6_AUD,   GMI,         NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_W2_AUD,   RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(GPIO_PFF2,     RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(USB_VBUS_EN2,  RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(KB_COL5,       RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(KB_ROW2,       RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(KB_ROW3,       KBC,         NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(KB_ROW5,       RSVD2,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(KB_ROW6,       KBC,         NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(KB_ROW13,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(KB_ROW14,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(KB_ROW16,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(OWR,           RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(ULPI_DATA7,    ULPI,        NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(DAP3_DIN,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(DAP3_FS,       RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(DAP3_SCLK,     RSVD2,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(CLK2_OUT,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(SDMMC1_WP_N,   RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(CAM_MCLK,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(CLK3_REQ,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-	DEFAULT_PINMUX(SPDIF_OUT,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PBB0,     RSVD3,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PBB3,     RSVD3,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PBB4,     RSVD3,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PBB5,     RSVD2,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PBB6,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PBB7,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PCC1,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PCC2,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PH3,      GMI,         NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PI7,      GMI,         NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PJ2,      RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(GPIO_X5_AUD_PX5,   RSVD3,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(GPIO_X6_AUD_PX6,   GMI,         NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(GPIO_W2_AUD_PW2,   RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(PFF2,     RSVD1,   NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(USB_VBUS_EN2_PFF1, RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(KB_COL5_PQ5,       RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(KB_ROW2_PR2,       RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(KB_ROW3_PR3,       KBC,         NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(KB_ROW5_PR5,       RSVD2,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(KB_ROW6_PR6,       KBC,         NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(KB_ROW13_PS5,      RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(KB_ROW14_PS6,      RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(KB_ROW16_PT0,      RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(OWR,               RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(ULPI_DATA7_PO0,    ULPI,        NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(DAP3_DIN_PP1,      RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(DAP3_FS_PP0,       RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(DAP3_SCLK_PP3,     RSVD2,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(CLK2_OUT_PW5,      RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(SDMMC1_WP_N_PV3,   RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(CAM_MCLK_PCC0,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(CLK3_REQ_PEE1,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+	DEFAULT_PINMUX(SPDIF_OUT_PK5,     RSVD1,       NORMAL,    TRISTATE, INPUT),
 };
 
-static struct pingroup_config unused_pins_lowpower[] = {
-	DEFAULT_PINMUX(CLK1_REQ,      RSVD3,    DOWN, TRISTATE, OUTPUT),
+static struct pmux_pingrp_config unused_pins_lowpower[] = {
+	DEFAULT_PINMUX(DAP_MCLK1_REQ_PEE2,      RSVD3,    DOWN, TRISTATE, OUTPUT),
 };
 
 /* Initially setting all used GPIO's to non-TRISTATE */
-static struct pingroup_config tegra124_pinmux_set_nontristate[] = {
-	DEFAULT_PINMUX(GPIO_X4_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GPIO_X7_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GPIO_W2_AUD,     RSVD1,  UP,      NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_X3_AUD,     RSVD3,  UP,      NORMAL,    INPUT),
+static struct pmux_pingrp_config tegra124_pinmux_set_nontristate[] = {
+	DEFAULT_PINMUX(GPIO_X4_AUD_PX4,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(GPIO_X7_AUD_PX7,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(GPIO_W2_AUD_PW2,     RSVD1,  UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(GPIO_X3_AUD_PX3,     RSVD3,  UP,      NORMAL,    INPUT),
 
 	/* EN_VDD_BL */
-	DEFAULT_PINMUX(DAP3_DOUT,       I2S2,   DOWN,    NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(DAP3_DOUT_PP2,       I2S2,   DOWN,    NORMAL,    OUTPUT),
 
 	/* MODEM */
-	DEFAULT_PINMUX(GPIO_PV0,        RSVD3,  NORMAL,  NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_PV1,        RSVD1,  NORMAL,  NORMAL,    INPUT),
+	DEFAULT_PINMUX(PV0,        RSVD3,  NORMAL,  NORMAL,    INPUT),
+	DEFAULT_PINMUX(PV1,        RSVD1,  NORMAL,  NORMAL,    INPUT),
 
 	/* BOOT_SEL0-3 */
-	DEFAULT_PINMUX(GPIO_PG0,         GMI,    NORMAL,  NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_PG1,         GMI,    NORMAL,  NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_PG2,         GMI,    NORMAL,  NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_PG3,         GMI,    NORMAL,  NORMAL,    INPUT),
+	DEFAULT_PINMUX(PG0,         GMI,    NORMAL,  NORMAL,    INPUT),
+	DEFAULT_PINMUX(PG1,         GMI,    NORMAL,  NORMAL,    INPUT),
+	DEFAULT_PINMUX(PG2,         GMI,    NORMAL,  NORMAL,    INPUT),
+	DEFAULT_PINMUX(PG3,         GMI,    NORMAL,  NORMAL,    INPUT),
 
-	DEFAULT_PINMUX(CLK2_REQ,        RSVD3,  NORMAL,  NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(CLK2_REQ_PCC5,        RSVD3,  NORMAL,  NORMAL,    OUTPUT),
 
-	DEFAULT_PINMUX(KB_COL3,         KBC,    UP,      NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(KB_COL4,		SDMMC3, UP,	 NORMAL,    INPUT),
-	DEFAULT_PINMUX(KB_COL6,         KBC,    UP,      NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(KB_COL7,         KBC,    UP,      NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(KB_ROW4,         KBC,    DOWN,    NORMAL,    INPUT),
-	DEFAULT_PINMUX(KB_ROW8,         KBC,    UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(KB_COL3_PQ3,         KBC,    UP,      NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(KB_COL4_PQ4,         SDMMC3, UP,      NORMAL,    INPUT),
+	DEFAULT_PINMUX(KB_COL6_PQ6,         KBC,    UP,      NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(KB_COL7_PQ7,         KBC,    UP,      NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(KB_ROW4_PR4,         KBC,    DOWN,    NORMAL,    INPUT),
+	DEFAULT_PINMUX(KB_ROW8_PS0,         KBC,    UP,      NORMAL,    INPUT),
 
-	DEFAULT_PINMUX(GPIO_PU4,        RSVD3,  NORMAL,  NORMAL,    INPUT),
-	DEFAULT_PINMUX(GPIO_PU5,        RSVD3,  NORMAL,  NORMAL,    OUTPUT),
-	DEFAULT_PINMUX(GPIO_PU6,        RSVD3,  NORMAL,  NORMAL,    INPUT),
+	DEFAULT_PINMUX(PU4,        RSVD3,  NORMAL,  NORMAL,    INPUT),
+	DEFAULT_PINMUX(PU5,        RSVD3,  NORMAL,  NORMAL,    OUTPUT),
+	DEFAULT_PINMUX(PU6,        RSVD3,  NORMAL,  NORMAL,    INPUT),
 
-	DEFAULT_PINMUX(HDMI_INT,        RSVD1,  DOWN,    NORMAL,   INPUT),
-	DEFAULT_PINMUX(SPDIF_IN,	USB,	NORMAL,   NORMAL,   INPUT),
-	DEFAULT_PINMUX(SDMMC3_CD_N,     SDMMC3, UP,       NORMAL,   INPUT),
+	DEFAULT_PINMUX(HDMI_INT_PN7,        RSVD1,  DOWN,    NORMAL,   INPUT),
+	DEFAULT_PINMUX(SPDIF_IN_PK6,        RSVD2,  NORMAL,  NORMAL,   INPUT),
+	DEFAULT_PINMUX(SDMMC3_CD_N_PV2,     SDMMC3, UP,      NORMAL,   INPUT),
 
 	/* TS_SHDN_L */
-	DEFAULT_PINMUX(GPIO_PK1,        GMI,    NORMAL,   NORMAL,   OUTPUT),
+	DEFAULT_PINMUX(PK1,        GMI,    NORMAL,   NORMAL,   OUTPUT),
 };
 
-static struct padctrl_config venice2_padctrl[] = {
-	/* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+static struct pmux_drvgrp_config venice2_padctrl[] = {
+	/* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
 	DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR,
 		       SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
 };
diff --git a/board/nvidia/venice2/venice2.c b/board/nvidia/venice2/venice2.c
index 1ed2fd7..15082c4 100644
--- a/board/nvidia/venice2/venice2.c
+++ b/board/nvidia/venice2/venice2.c
@@ -19,15 +19,16 @@
  */
 void pinmux_init(void)
 {
-	pinmux_config_table(tegra124_pinmux_set_nontristate,
-			    ARRAY_SIZE(tegra124_pinmux_set_nontristate));
+	pinmux_config_pingrp_table(tegra124_pinmux_set_nontristate,
+		ARRAY_SIZE(tegra124_pinmux_set_nontristate));
 
-	pinmux_config_table(tegra124_pinmux_common,
-			    ARRAY_SIZE(tegra124_pinmux_common));
+	pinmux_config_pingrp_table(tegra124_pinmux_common,
+		ARRAY_SIZE(tegra124_pinmux_common));
 
-	pinmux_config_table(unused_pins_lowpower,
-			    ARRAY_SIZE(unused_pins_lowpower));
+	pinmux_config_pingrp_table(unused_pins_lowpower,
+		ARRAY_SIZE(unused_pins_lowpower));
 
 	/* Initialize any non-default pad configs (APB_MISC_GP regs) */
-	padgrp_config_table(venice2_padctrl, ARRAY_SIZE(venice2_padctrl));
+	pinmux_config_drvgrp_table(venice2_padctrl,
+		ARRAY_SIZE(venice2_padctrl));
 }
diff --git a/board/silica/pengwyn/Makefile b/board/silica/pengwyn/Makefile
index c8b4f9a..804ac37 100644
--- a/board/silica/pengwyn/Makefile
+++ b/board/silica/pengwyn/Makefile
@@ -6,7 +6,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y)
+ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
 obj-y	:= mux.o
 endif
 
diff --git a/board/ti/am335x/Makefile b/board/ti/am335x/Makefile
index c8b4f9a..804ac37 100644
--- a/board/ti/am335x/Makefile
+++ b/board/ti/am335x/Makefile
@@ -6,7 +6,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y)
+ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
 obj-y	:= mux.o
 endif
 
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 554398f..da780ed 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -30,6 +30,7 @@
 #include <power/tps65910.h>
 #include <environment.h>
 #include <watchdog.h>
+#include <environment.h>
 #include "board.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -81,7 +82,7 @@ static int read_eeprom(struct am335x_baseboard_id *header)
 	return 0;
 }
 
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
 static const struct ddr_data ddr2_data = {
 	.datardsratio0 = ((MT47H128M16RT25E_RD_DQS<<30) |
 			  (MT47H128M16RT25E_RD_DQS<<20) |
@@ -219,7 +220,17 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
 int spl_start_uboot(void)
 {
 	/* break into full u-boot on 'c' */
-	return (serial_tstc() && serial_getc() == 'c');
+	if (serial_tstc() && serial_getc() == 'c')
+		return 1;
+
+#ifdef CONFIG_SPL_ENV_SUPPORT
+	env_init();
+	env_relocate_spec();
+	if (getenv_yesno("boot_os") != 1)
+		return 1;
+#endif
+
+	return 0;
 }
 #endif
 
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 9669a32..0674afd 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -316,6 +316,7 @@ int misc_init_r(void)
 	struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
 	struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
 	struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE;
+	bool generate_fake_mac = false;
 
 	/* Enable i2c2 pullup resisters */
 	writel(~(PRG_I2C2_PULLUPRESX), &prog_io_base->io1);
@@ -349,6 +350,7 @@ int misc_init_r(void)
 					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
 					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
 					TWL4030_PM_RECEIVER_DEV_GRP_P1);
+		generate_fake_mac = true;
 		break;
 	case REVISION_XM_C:
 		printf("Beagle xM Rev C\n");
@@ -359,6 +361,7 @@ int misc_init_r(void)
 					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
 					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
 					TWL4030_PM_RECEIVER_DEV_GRP_P1);
+		generate_fake_mac = true;
 		break;
 	default:
 		printf("Beagle unknown 0x%02x\n", get_board_revision());
@@ -368,6 +371,7 @@ int misc_init_r(void)
 					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
 					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
 					TWL4030_PM_RECEIVER_DEV_GRP_P1);
+		generate_fake_mac = true;
 	}
 
 	switch (get_expansion_id()) {
@@ -486,6 +490,13 @@ int misc_init_r(void)
 	musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
 #endif
 
+	if (generate_fake_mac) {
+		u32 id[4];
+
+		get_dieid(id);
+		usb_fake_mac_from_die_id(id);
+	}
+
 	return 0;
 }
 
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index c6c4fd1..073d151 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -16,6 +16,7 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/sata.h>
+#include <environment.h>
 
 #include "mux_data.h"
 
@@ -124,6 +125,24 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OS_BOOT)
+int spl_start_uboot(void)
+{
+	/* break into full u-boot on 'c' */
+	if (serial_tstc() && serial_getc() == 'c')
+		return 1;
+
+#ifdef CONFIG_SPL_ENV_SUPPORT
+	env_init();
+	env_relocate_spec();
+	if (getenv_yesno("boot_os") != 1)
+		return 1;
+#endif
+
+	return 0;
+}
+#endif
+
 #ifdef CONFIG_DRIVER_TI_CPSW
 
 /* Delay value to add to calibrated value */
diff --git a/board/ti/k2hk_evm/Makefile b/board/ti/k2hk_evm/Makefile
new file mode 100644
index 0000000..3645f2f
--- /dev/null
+++ b/board/ti/k2hk_evm/Makefile
@@ -0,0 +1,9 @@
+#
+# K2HK-EVM: board Makefile
+# (C) Copyright 2012-2014
+#     Texas Instruments Incorporated, <www.ti.com>
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= board.o
+obj-y	+= ddr3.o
diff --git a/board/ti/k2hk_evm/README b/board/ti/k2hk_evm/README
new file mode 100644
index 0000000..bfeb05b
--- /dev/null
+++ b/board/ti/k2hk_evm/README
@@ -0,0 +1,122 @@
+U-Boot port for Texas Instruments XTCIEVMK2X
+============================================
+
+Author: Murali Karicheri <m-karicheri2@ti.com>
+
+This README has information on the u-boot port for XTCIEVMK2X EVM board.
+Documentation for this board can be found at
+  http://www.advantech.com/Support/TI-EVM/EVMK2HX_sd.aspx
+
+The board is based on Texas Instruments Keystone2 family of SoCs : K2H, K2K.
+More details on these SoCs are available at company websites
+ K2K: http://www.ti.com/product/tci6638k2k
+ K2H: http://www.ti.com/product/tci6638k2h
+
+Board configuration:
+====================
+
+Some of the peripherals that are configured by u-boot are:-
+
+1. 2GB DDR3 (can support 8GB SO DIMM as well)
+2. 512M NAND (over ti emif16 bus)
+3. 6MB MSM SRAM (part of the SoC)
+4. two 1GBit Ethernet ports (SoC supports upto 4)
+5. two UART ports
+6. three i2c interfaces
+7. three spi interfaces (only 1 interface supported in driver)
+
+There are seperate PLLs to drive clocks to Tetris ARM and Peripherals.
+To bring up SMP Linux on this board, there is a boot monitor
+code that will be installed in MSMC SRAM. There is command available
+to install this image from u-boot.
+
+The port related files can be found at following folders
+ keystone2 SoC related files: arch/arm/cpu/armv7/keystone/
+ K2HK evm board files: board/ti/k2hk_evm/
+
+board configuration file: include/configs/k2hk_evm.h
+
+Supported boot modes:
+ - SPI NOR boot
+
+Supported image formats:-
+ - u-boot.bin: for loading and running u-boot.bin through Texas instruments
+               code composure studio (CCS)
+ - u-boot-spi.gph: gpimage for programming SPI NOR flash for SPI NOR boot
+
+Build instructions:
+===================
+
+To build u-boot.bin
+  >make k2hk_evm_config
+  >make u-boot-spi.gph
+
+To build u-boot-spi.gph
+  >make k2hk_evm_config
+  >make u-boot-spi.gph
+
+Load and Run U-Boot on K2HK EVM using CCS
+=========================================
+
+Need Code Composer Studio (CCS) installed on a PC to load and run u-boot.bin
+on EVM. See instructions at below link for installing CCS on a Windows PC.
+http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Getting_Started#
+Installing_Code_Composer_Studio
+Use u-boot.bin from the build folder for loading annd running u-boot binary
+on EVM. Follow instructions at
+http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup
+to configure SW1 dip switch to use "No Boot/JTAG DSP Little Endian Boot Mode"
+and Power ON the EVM.  Follow instructions to connect serial port of EVM to
+PC and start TeraTerm or Hyper Terminal.
+
+Start CCS on a Windows machine and Launch Target
+configuration as instructed at http://processors.wiki.ti.com/index.php/
+MCSDK_UG_Chapter_Exploring#Loading_and_Running_U-Boot_on_EVM_through_CCS.
+The instructions provided in the above link uses a script for
+loading the u-boot binary on the target EVM. Instead do the following:-
+
+1. Right click to "Texas Instruments XDS2xx USB Emulator_0/CortexA15_1 core (D
+   isconnected: Unknown)" at the debug window (This is created once Target
+   configuration is launched) and select "Connect Target".
+2. Once target connect is successful, choose Tools->Load Memory option from the
+   top level menu. At the Load Memory window, choose the file u-boot.bin
+   through "Browse" button and click "next >" button. In the next window, enter
+   Start address as 0xc001000, choose Type-size "32 bits" and click "Finish"
+   button.
+3. Click View -> Registers from the top level menu to view registers window.
+4. From Registers, window expand "Core Registers" to view PC. Edit PC value
+   to be 0xc001000. From the "Run" top level menu, select "Free Run"
+5. The U-Boot prompt is shown at the Tera Term/ Hyper terminal console as
+   below and type any key to stop autoboot as instructed :=
+
+U-Boot 2014.04-rc1-00201-gc215b5a (Mar 21 2014 - 12:47:59)
+
+I2C:   ready
+Detected SO-DIMM [SQR-SD3T-2G1333SED]
+DRAM:  1.1 GiB
+NAND:  512 MiB
+Net:   K2HK_EMAC
+Warning: K2HK_EMAC using MAC address from net device
+, K2HK_EMAC1, K2HK_EMAC2, K2HK_EMAC3
+Hit any key to stop autoboot:  0
+
+SPI NOR Flash programming instructions
+======================================
+U-Boot image can be flashed to first 512KB of the NOR flash using following
+instructions:-
+
+1. Start CCS and run U-boot as described above.
+2. Suspend Target. Select Run -> Suspend from top level menu
+   CortexA15_1 (Free Running)"
+3. Load u-boot-spi.gph binary from build folder on to DDR address 0x87000000
+   through CCS as described in step 2 of "Load and Run U-Boot on K2HK EVM
+   using CCS", but using address 0x87000000.
+4. Free Run the target as desribed earlier (step 4) to get u-boot prompt
+5. At the U-Boot console type following to setup u-boot environment variables.
+   setenv addr_uboot 0x87000000
+   setenv filesize <size in hex of u-boot-spi.gph rounded to hex 0x10000>
+   run burn_uboot
+   Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
+   to "SPI Little Endian Boot mode" as per instruction at
+   http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup.
+6. Power ON the EVM. The EVM now boots with u-boot image on the NOR flash.
diff --git a/board/ti/k2hk_evm/board.c b/board/ti/k2hk_evm/board.c
new file mode 100644
index 0000000..dc39139
--- /dev/null
+++ b/board/ti/k2hk_evm/board.c
@@ -0,0 +1,301 @@
+/*
+ * K2HK EVM : Board initialization
+ *
+ * (C) Copyright 2012-2014
+ *     Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <exports.h>
+#include <fdt_support.h>
+#include <libfdt.h>
+
+#include <asm/arch/hardware.h>
+#include <asm/arch/clock.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/arch/nand_defs.h>
+#include <asm/arch/emac_defs.h>
+#include <asm/arch/psc_defs.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 device_big_endian;
+
+unsigned int external_clk[ext_clk_count] = {
+	[sys_clk]	=	122880000,
+	[alt_core_clk]	=	125000000,
+	[pa_clk]	=	122880000,
+	[tetris_clk]	=	125000000,
+	[ddr3a_clk]	=	100000000,
+	[ddr3b_clk]	=	100000000,
+	[mcm_clk]	=	312500000,
+	[pcie_clk]	=	100000000,
+	[sgmii_srio_clk] =	156250000,
+	[xgmii_clk]	=	156250000,
+	[usb_clk]	=	100000000,
+	[rp1_clk]	=	123456789    /* TODO: cannot find
+						what is that */
+};
+
+static struct async_emif_config async_emif_config[ASYNC_EMIF_NUM_CS] = {
+	{			/* CS0 */
+		.mode		= ASYNC_EMIF_MODE_NAND,
+		.wr_setup	= 0xf,
+		.wr_strobe	= 0x3f,
+		.wr_hold	= 7,
+		.rd_setup	= 0xf,
+		.rd_strobe	= 0x3f,
+		.rd_hold	= 7,
+		.turn_around	= 3,
+		.width		= ASYNC_EMIF_8,
+	},
+
+};
+
+static struct pll_init_data pll_config[] = {
+	CORE_PLL_1228,
+	PASS_PLL_983,
+	TETRIS_PLL_1200,
+};
+
+int dram_init(void)
+{
+	init_ddr3();
+
+	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_MAX_RAM_BANK_SIZE);
+	init_async_emif(ARRAY_SIZE(async_emif_config), async_emif_config);
+	return 0;
+}
+
+#ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
+struct eth_priv_t eth_priv_cfg[] = {
+	{
+		.int_name	= "K2HK_EMAC",
+		.rx_flow	= 22,
+		.phy_addr	= 0,
+		.slave_port	= 1,
+		.sgmii_link_type = SGMII_LINK_MAC_PHY,
+	},
+	{
+		.int_name	= "K2HK_EMAC1",
+		.rx_flow	= 23,
+		.phy_addr	= 1,
+		.slave_port	= 2,
+		.sgmii_link_type = SGMII_LINK_MAC_PHY,
+	},
+	{
+		.int_name	= "K2HK_EMAC2",
+		.rx_flow	= 24,
+		.phy_addr	= 2,
+		.slave_port	= 3,
+		.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+	},
+	{
+		.int_name	= "K2HK_EMAC3",
+		.rx_flow	= 25,
+		.phy_addr	= 3,
+		.slave_port	= 4,
+		.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+	},
+};
+
+int get_eth_env_param(char *env_name)
+{
+	char *env;
+	int  res = -1;
+
+	env = getenv(env_name);
+	if (env)
+		res = simple_strtol(env, NULL, 0);
+
+	return res;
+}
+
+int board_eth_init(bd_t *bis)
+{
+	int	j;
+	int	res;
+	char	link_type_name[32];
+
+	for (j = 0; j < (sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t));
+	     j++) {
+		sprintf(link_type_name, "sgmii%d_link_type", j);
+		res = get_eth_env_param(link_type_name);
+		if (res >= 0)
+			eth_priv_cfg[j].sgmii_link_type = res;
+
+		keystone2_emac_initialize(&eth_priv_cfg[j]);
+	}
+
+	return 0;
+}
+#endif
+
+/* Byte swap the 32-bit data if the device is BE */
+int cpu_to_bus(u32 *ptr, u32 length)
+{
+	u32 i;
+
+	if (device_big_endian)
+		for (i = 0; i < length; i++, ptr++)
+			*ptr = __swab32(*ptr);
+
+	return 0;
+}
+
+#if defined(CONFIG_BOARD_EARLY_INIT_F)
+int board_early_init_f(void)
+{
+	init_plls(ARRAY_SIZE(pll_config), pll_config);
+	return 0;
+}
+#endif
+
+int board_init(void)
+{
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	return 0;
+}
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+#define K2_DDR3_START_ADDR 0x80000000
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	u64 start[2];
+	u64 size[2];
+	char name[32], *env, *endp;
+	int lpae, nodeoffset;
+	u32 ddr3a_size;
+	int nbanks;
+
+	env = getenv("mem_lpae");
+	lpae = env && simple_strtol(env, NULL, 0);
+
+	ddr3a_size = 0;
+	if (lpae) {
+		env = getenv("ddr3a_size");
+		if (env)
+			ddr3a_size = simple_strtol(env, NULL, 10);
+		if ((ddr3a_size != 8) && (ddr3a_size != 4))
+			ddr3a_size = 0;
+	}
+
+	nbanks = 1;
+	start[0] = bd->bi_dram[0].start;
+	size[0]  = bd->bi_dram[0].size;
+
+	/* adjust memory start address for LPAE */
+	if (lpae) {
+		start[0] -= K2_DDR3_START_ADDR;
+		start[0] += CONFIG_SYS_LPAE_SDRAM_BASE;
+	}
+
+	if ((size[0] == 0x80000000) && (ddr3a_size != 0)) {
+		size[1] = ((u64)ddr3a_size - 2) << 30;
+		start[1] = 0x880000000;
+		nbanks++;
+	}
+
+	/* reserve memory at start of bank */
+	sprintf(name, "mem_reserve_head");
+	env = getenv(name);
+	if (env) {
+		start[0] += ustrtoul(env, &endp, 0);
+		size[0] -= ustrtoul(env, &endp, 0);
+	}
+
+	sprintf(name, "mem_reserve");
+	env = getenv(name);
+	if (env)
+		size[0] -= ustrtoul(env, &endp, 0);
+
+	fdt_fixup_memory_banks(blob, start, size, nbanks);
+
+	/* Fix up the initrd */
+	if (lpae) {
+		u64 initrd_start, initrd_end;
+		u32 *prop1, *prop2;
+		int err;
+		nodeoffset = fdt_path_offset(blob, "/chosen");
+		if (nodeoffset >= 0) {
+			prop1 = (u32 *)fdt_getprop(blob, nodeoffset,
+					    "linux,initrd-start", NULL);
+			prop2 = (u32 *)fdt_getprop(blob, nodeoffset,
+					    "linux,initrd-end", NULL);
+			if (prop1 && prop2) {
+				initrd_start = __be32_to_cpu(*prop1);
+				initrd_start -= K2_DDR3_START_ADDR;
+				initrd_start += CONFIG_SYS_LPAE_SDRAM_BASE;
+				initrd_start = __cpu_to_be64(initrd_start);
+				initrd_end = __be32_to_cpu(*prop2);
+				initrd_end -= K2_DDR3_START_ADDR;
+				initrd_end += CONFIG_SYS_LPAE_SDRAM_BASE;
+				initrd_end = __cpu_to_be64(initrd_end);
+
+				err = fdt_delprop(blob, nodeoffset,
+						  "linux,initrd-start");
+				if (err < 0)
+					puts("error deleting initrd-start\n");
+
+				err = fdt_delprop(blob, nodeoffset,
+						  "linux,initrd-end");
+				if (err < 0)
+					puts("error deleting initrd-end\n");
+
+				err = fdt_setprop(blob, nodeoffset,
+						  "linux,initrd-start",
+						  &initrd_start,
+						  sizeof(initrd_start));
+				if (err < 0)
+					puts("error adding initrd-start\n");
+
+				err = fdt_setprop(blob, nodeoffset,
+						  "linux,initrd-end",
+						  &initrd_end,
+						  sizeof(initrd_end));
+				if (err < 0)
+					puts("error adding linux,initrd-end\n");
+			}
+		}
+	}
+}
+
+void ft_board_setup_ex(void *blob, bd_t *bd)
+{
+	int	lpae;
+	char	*env;
+	u64	*reserve_start, size;
+
+	env = getenv("mem_lpae");
+	lpae = env && simple_strtol(env, NULL, 0);
+
+	if (lpae) {
+		/*
+		 * the initrd and other reserved memory areas are
+		 * embedded in in the DTB itslef. fix up these addresses
+		 * to 36 bit format
+		 */
+		reserve_start = (u64 *)((char *)blob +
+				       fdt_off_mem_rsvmap(blob));
+		while (1) {
+			*reserve_start = __cpu_to_be64(*reserve_start);
+			size = __cpu_to_be64(*(reserve_start + 1));
+			if (size) {
+				*reserve_start -= K2_DDR3_START_ADDR;
+				*reserve_start +=
+					CONFIG_SYS_LPAE_SDRAM_BASE;
+				*reserve_start =
+					__cpu_to_be64(*reserve_start);
+			} else {
+				break;
+			}
+			reserve_start += 2;
+		}
+	}
+}
+#endif
diff --git a/board/ti/k2hk_evm/ddr3.c b/board/ti/k2hk_evm/ddr3.c
new file mode 100644
index 0000000..6092eb8
--- /dev/null
+++ b/board/ti/k2hk_evm/ddr3.c
@@ -0,0 +1,268 @@
+/*
+ * Keystone2: DDR3 initialization
+ *
+ * (C) Copyright 2012-2014
+ *     Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <i2c.h>
+
+/************************* *****************************/
+static struct ddr3_phy_config ddr3phy_1600_64A = {
+	.pllcr		= 0x0001C000ul,
+	.pgcr1_mask	= (IODDRM_MASK | ZCKSEL_MASK),
+	.pgcr1_val	= ((1 << 2) | (1 << 7) | (1 << 23)),
+	.ptr0		= 0x42C21590ul,
+	.ptr1		= 0xD05612C0ul,
+	.ptr2		= 0, /* not set in gel */
+	.ptr3		= 0x0D861A80ul,
+	.ptr4		= 0x0C827100ul,
+	.dcr_mask	= (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK | NOSRA_MASK),
+	.dcr_val	= ((1 << 10) | (1 << 27)),
+	.dtpr0		= 0xA19DBB66ul,
+	.dtpr1		= 0x12868300ul,
+	.dtpr2		= 0x50035200ul,
+	.mr0		= 0x00001C70ul,
+	.mr1		= 0x00000006ul,
+	.mr2		= 0x00000018ul,
+	.dtcr		= 0x730035C7ul,
+	.pgcr2		= 0x00F07A12ul,
+	.zq0cr1		= 0x0000005Dul,
+	.zq1cr1		= 0x0000005Bul,
+	.zq2cr1		= 0x0000005Bul,
+	.pir_v1		= 0x00000033ul,
+	.pir_v2		= 0x0000FF81ul,
+};
+
+static struct ddr3_emif_config ddr3_1600_64 = {
+	.sdcfg		= 0x6200CE6aul,
+	.sdtim1		= 0x16709C55ul,
+	.sdtim2		= 0x00001D4Aul,
+	.sdtim3		= 0x435DFF54ul,
+	.sdtim4		= 0x553F0CFFul,
+	.zqcfg		= 0xF0073200ul,
+	.sdrfc		= 0x00001869ul,
+};
+
+static struct ddr3_phy_config ddr3phy_1600_32 = {
+	.pllcr		= 0x0001C000ul,
+	.pgcr1_mask	= (IODDRM_MASK | ZCKSEL_MASK),
+	.pgcr1_val	= ((1 << 2) | (1 << 7) | (1 << 23)),
+	.ptr0		= 0x42C21590ul,
+	.ptr1		= 0xD05612C0ul,
+	.ptr2		= 0, /* not set in gel */
+	.ptr3		= 0x0D861A80ul,
+	.ptr4		= 0x0C827100ul,
+	.dcr_mask	= (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK | NOSRA_MASK),
+	.dcr_val	= ((1 << 10) | (1 << 27)),
+	.dtpr0		= 0xA19DBB66ul,
+	.dtpr1		= 0x12868300ul,
+	.dtpr2		= 0x50035200ul,
+	.mr0		= 0x00001C70ul,
+	.mr1		= 0x00000006ul,
+	.mr2		= 0x00000018ul,
+	.dtcr		= 0x730035C7ul,
+	.pgcr2		= 0x00F07A12ul,
+	.zq0cr1		= 0x0000005Dul,
+	.zq1cr1		= 0x0000005Bul,
+	.zq2cr1		= 0x0000005Bul,
+	.pir_v1		= 0x00000033ul,
+	.pir_v2		= 0x0000FF81ul,
+};
+
+static struct ddr3_emif_config ddr3_1600_32 = {
+	.sdcfg		= 0x6200DE6aul,
+	.sdtim1		= 0x16709C55ul,
+	.sdtim2		= 0x00001D4Aul,
+	.sdtim3		= 0x435DFF54ul,
+	.sdtim4		= 0x553F0CFFul,
+	.zqcfg		= 0x70073200ul,
+	.sdrfc		= 0x00001869ul,
+};
+
+/************************* *****************************/
+static struct ddr3_phy_config ddr3phy_1333_64A = {
+	.pllcr		= 0x0005C000ul,
+	.pgcr1_mask	= (IODDRM_MASK | ZCKSEL_MASK),
+	.pgcr1_val	= ((1 << 2) | (1 << 7) | (1 << 23)),
+	.ptr0		= 0x42C21590ul,
+	.ptr1		= 0xD05612C0ul,
+	.ptr2		= 0, /* not set in gel */
+	.ptr3		= 0x0B4515C2ul,
+	.ptr4		= 0x0A6E08B4ul,
+	.dcr_mask	= (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK |
+			   NOSRA_MASK | UDIMM_MASK),
+	.dcr_val	= ((1 << 10) | (1 << 27) | (1 << 29)),
+	.dtpr0		= 0x8558AA55ul,
+	.dtpr1		= 0x12857280ul,
+	.dtpr2		= 0x5002C200ul,
+	.mr0		= 0x00001A60ul,
+	.mr1		= 0x00000006ul,
+	.mr2		= 0x00000010ul,
+	.dtcr		= 0x710035C7ul,
+	.pgcr2		= 0x00F065B8ul,
+	.zq0cr1		= 0x0000005Dul,
+	.zq1cr1		= 0x0000005Bul,
+	.zq2cr1		= 0x0000005Bul,
+	.pir_v1		= 0x00000033ul,
+	.pir_v2		= 0x0000FF81ul,
+};
+
+static struct ddr3_emif_config ddr3_1333_64 = {
+	.sdcfg		= 0x62008C62ul,
+	.sdtim1		= 0x125C8044ul,
+	.sdtim2		= 0x00001D29ul,
+	.sdtim3		= 0x32CDFF43ul,
+	.sdtim4		= 0x543F0ADFul,
+	.zqcfg		= 0xF0073200ul,
+	.sdrfc		= 0x00001457ul,
+};
+
+static struct ddr3_phy_config ddr3phy_1333_32 = {
+	.pllcr		= 0x0005C000ul,
+	.pgcr1_mask	= (IODDRM_MASK | ZCKSEL_MASK),
+	.pgcr1_val	= ((1 << 2) | (1 << 7) | (1 << 23)),
+	.ptr0		= 0x42C21590ul,
+	.ptr1		= 0xD05612C0ul,
+	.ptr2		= 0, /* not set in gel */
+	.ptr3		= 0x0B4515C2ul,
+	.ptr4		= 0x0A6E08B4ul,
+	.dcr_mask	= (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK |
+			   NOSRA_MASK | UDIMM_MASK),
+	.dcr_val	= ((1 << 10) | (1 << 27) | (1 << 29)),
+	.dtpr0		= 0x8558AA55ul,
+	.dtpr1		= 0x12857280ul,
+	.dtpr2		= 0x5002C200ul,
+	.mr0		= 0x00001A60ul,
+	.mr1		= 0x00000006ul,
+	.mr2		= 0x00000010ul,
+	.dtcr		= 0x710035C7ul,
+	.pgcr2		= 0x00F065B8ul,
+	.zq0cr1		= 0x0000005Dul,
+	.zq1cr1		= 0x0000005Bul,
+	.zq2cr1		= 0x0000005Bul,
+	.pir_v1		= 0x00000033ul,
+	.pir_v2		= 0x0000FF81ul,
+};
+
+static struct ddr3_emif_config ddr3_1333_32 = {
+	.sdcfg		= 0x62009C62ul,
+	.sdtim1		= 0x125C8044ul,
+	.sdtim2		= 0x00001D29ul,
+	.sdtim3		= 0x32CDFF43ul,
+	.sdtim4		= 0x543F0ADFul,
+	.zqcfg		= 0xf0073200ul,
+	.sdrfc		= 0x00001457ul,
+};
+
+/************************* *****************************/
+static struct ddr3_phy_config ddr3phy_1333_64 = {
+	.pllcr		= 0x0005C000ul,
+	.pgcr1_mask	= (IODDRM_MASK | ZCKSEL_MASK),
+	.pgcr1_val	= ((1 << 2) | (1 << 7) | (1 << 23)),
+	.ptr0		= 0x42C21590ul,
+	.ptr1		= 0xD05612C0ul,
+	.ptr2		= 0, /* not set in gel */
+	.ptr3		= 0x0B4515C2ul,
+	.ptr4		= 0x0A6E08B4ul,
+	.dcr_mask	= (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK | NOSRA_MASK),
+	.dcr_val	= ((1 << 10) | (1 << 27)),
+	.dtpr0		= 0x8558AA55ul,
+	.dtpr1		= 0x12857280ul,
+	.dtpr2		= 0x5002C200ul,
+	.mr0		= 0x00001A60ul,
+	.mr1		= 0x00000006ul,
+	.mr2		= 0x00000010ul,
+	.dtcr		= 0x710035C7ul,
+	.pgcr2		= 0x00F065B8ul,
+	.zq0cr1		= 0x0000005Dul,
+	.zq1cr1		= 0x0000005Bul,
+	.zq2cr1		= 0x0000005Bul,
+	.pir_v1		= 0x00000033ul,
+	.pir_v2		= 0x0000FF81ul,
+};
+/******************************************************/
+int get_dimm_params(char *dimm_name)
+{
+	u8 spd_params[256];
+	int ret;
+	int old_bus;
+
+	i2c_init(CONFIG_SYS_DAVINCI_I2C_SPEED, CONFIG_SYS_DAVINCI_I2C_SLAVE);
+
+	old_bus = i2c_get_bus_num();
+	i2c_set_bus_num(1);
+
+	ret = i2c_read(0x53, 0, 1, spd_params, 256);
+
+	i2c_set_bus_num(old_bus);
+
+	dimm_name[0] = '\0';
+
+	if (ret) {
+		puts("Cannot read DIMM params\n");
+		return 1;
+	}
+
+	/*
+	 * We need to convert spd data to dimm parameters
+	 * and to DDR3 EMIF and PHY regirsters values.
+	 * For now we just return DIMM type string value.
+	 * Caller may use this value to choose appropriate
+	 * a pre-set DDR3 configuration
+	 */
+
+	strncpy(dimm_name, (char *)&spd_params[0x80], 18);
+	dimm_name[18] = '\0';
+
+	return 0;
+}
+
+struct pll_init_data ddr3a_333 = DDR3_PLL_333(A);
+struct pll_init_data ddr3b_333 = DDR3_PLL_333(B);
+struct pll_init_data ddr3a_400 = DDR3_PLL_400(A);
+struct pll_init_data ddr3b_400 = DDR3_PLL_400(B);
+
+void init_ddr3(void)
+{
+	char dimm_name[32];
+
+	get_dimm_params(dimm_name);
+
+	printf("Detected SO-DIMM [%s]\n", dimm_name);
+
+	if (!strcmp(dimm_name, "18KSF1G72HZ-1G6E2 ")) {
+		init_pll(&ddr3a_400);
+		if (cpu_revision() > 0) {
+			init_ddrphy(K2HK_DDR3A_DDRPHYC, &ddr3phy_1600_64A);
+			init_ddremif(K2HK_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_64);
+			printf("DRAM:  Capacity 8 GiB (includes reported below)\n");
+		} else {
+			init_ddrphy(K2HK_DDR3A_DDRPHYC, &ddr3phy_1600_32);
+			init_ddremif(K2HK_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_32);
+			printf("DRAM:  Capacity 4 GiB (includes reported below)\n");
+		}
+	} else if (!strcmp(dimm_name, "SQR-SD3T-2G1333SED")) {
+		init_pll(&ddr3a_333);
+		if (cpu_revision() > 0) {
+			init_ddrphy(K2HK_DDR3A_DDRPHYC, &ddr3phy_1333_64A);
+			init_ddremif(K2HK_DDR3A_EMIF_CTRL_BASE, &ddr3_1333_64);
+		} else {
+			init_ddrphy(K2HK_DDR3A_DDRPHYC, &ddr3phy_1333_32);
+			init_ddremif(K2HK_DDR3A_EMIF_CTRL_BASE, &ddr3_1333_32);
+		}
+	} else {
+		printf("Unknown SO-DIMM. Cannot configure DDR3\n");
+		while (1)
+			;
+	}
+
+	init_pll(&ddr3b_333);
+	init_ddrphy(K2HK_DDR3B_DDRPHYC, &ddr3phy_1333_64);
+	init_ddremif(K2HK_DDR3B_EMIF_CTRL_BASE, &ddr3_1333_64);
+}
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
index 3eaa5ac..4666b38 100644
--- a/board/ti/omap5_uevm/evm.c
+++ b/board/ti/omap5_uevm/evm.c
@@ -119,28 +119,19 @@ static void enable_host_clocks(void)
 int misc_init_r(void)
 {
 	int reg;
-	uint8_t device_mac[6];
+	u32 id[4];
 
 #ifdef CONFIG_PALMAS_POWER
 	palmas_init_settings();
 #endif
 
-	if (!getenv("usbethaddr")) {
-		reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
-
-		/*
-		 * create a fake MAC address from the processor ID code.
-		 * first byte is 0x02 to signify locally administered.
-		 */
-		device_mac[0] = 0x02;
-		device_mac[1] = readl(reg + 0x10) & 0xff;
-		device_mac[2] = readl(reg + 0xC) & 0xff;
-		device_mac[3] = readl(reg + 0x8) & 0xff;
-		device_mac[4] = readl(reg) & 0xff;
-		device_mac[5] = (readl(reg) >> 8) & 0xff;
-
-		eth_setenv_enetaddr("usbethaddr", device_mac);
-	}
+	reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
+
+	id[0] = readl(reg);
+	id[1] = readl(reg + 0x8);
+	id[2] = readl(reg + 0xC);
+	id[3] = readl(reg + 0x10);
+	usb_fake_mac_from_die_id(id);
 
 	return 0;
 }
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
index 5ab6db9..16368cb 100644
--- a/board/ti/panda/panda.c
+++ b/board/ti/panda/panda.c
@@ -193,7 +193,7 @@ int misc_init_r(void)
 {
 	int phy_type;
 	u32 auxclk, altclksrc;
-	uint8_t device_mac[6];
+	u32 id[4];
 
 	/* EHCI is not supported on ES1.0 */
 	if (omap_revision() == OMAP4430_ES1_0)
@@ -247,20 +247,11 @@ int misc_init_r(void)
 
 	writel(altclksrc, &scrm->altclksrc);
 
-	if (!getenv("usbethaddr")) {
-		/*
-		 * create a fake MAC address from the processor ID code.
-		 * first byte is 0x02 to signify locally administered.
-		 */
-		device_mac[0] = 0x02;
-		device_mac[1] = readl(STD_FUSE_DIE_ID_3) & 0xff;
-		device_mac[2] = readl(STD_FUSE_DIE_ID_2) & 0xff;
-		device_mac[3] = readl(STD_FUSE_DIE_ID_1) & 0xff;
-		device_mac[4] = readl(STD_FUSE_DIE_ID_0) & 0xff;
-		device_mac[5] = (readl(STD_FUSE_DIE_ID_0) >> 8) & 0xff;
-
-		eth_setenv_enetaddr("usbethaddr", device_mac);
-	}
+	id[0] = readl(STD_FUSE_DIE_ID_0);
+	id[1] = readl(STD_FUSE_DIE_ID_1);
+	id[2] = readl(STD_FUSE_DIE_ID_2);
+	id[3] = readl(STD_FUSE_DIE_ID_3);
+	usb_fake_mac_from_die_id(id);
 
 	return 0;
 }
@@ -308,7 +299,7 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 	/* Now we can enable our port clocks */
 	utmi_clk = readl((void *)CM_L3INIT_HSUSBHOST_CLKCTRL);
 	utmi_clk |= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK;
-	sr32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, 0, 32, utmi_clk);
+	setbits_le32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, utmi_clk);
 
 	ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
 	if (ret < 0)
diff --git a/board/toradex/colibri_t20-common/colibri_t20-common.c b/board/toradex/colibri_t20-common/colibri_t20-common.c
index 823d0de..58a9916 100644
--- a/board/toradex/colibri_t20-common/colibri_t20-common.c
+++ b/board/toradex/colibri_t20-common/colibri_t20-common.c
@@ -18,12 +18,12 @@ void colibri_t20_common_pin_mux_usb(void)
 	/* module internal USB bus to connect ethernet chipset */
 	funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
 	/* ULPI reference clock output */
-	pinmux_set_func(PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
-	pinmux_tristate_disable(PINGRP_CDEV2);
+	pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
+	pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
 	/* PHY reset GPIO */
-	pinmux_tristate_disable(PINGRP_UAC);
+	pinmux_tristate_disable(PMUX_PINGRP_UAC);
 	/* VBus GPIO */
-	pinmux_tristate_disable(PINGRP_DTE);
+	pinmux_tristate_disable(PMUX_PINGRP_DTE);
 }
 #endif
 
diff --git a/board/toradex/colibri_t20_iris/colibri_t20_iris.c b/board/toradex/colibri_t20_iris/colibri_t20_iris.c
index f5f0475..49c74f3 100644
--- a/board/toradex/colibri_t20_iris/colibri_t20_iris.c
+++ b/board/toradex/colibri_t20_iris/colibri_t20_iris.c
@@ -19,7 +19,7 @@ void pin_mux_usb(void)
 	colibri_t20_common_pin_mux_usb();
 
 	/* USB 1 aka Tegra USB port 3 VBus*/
-	pinmux_tristate_disable(PINGRP_SPIG);
+	pinmux_tristate_disable(PMUX_PINGRP_SPIG);
 }
 #endif
 
@@ -31,6 +31,6 @@ void pin_mux_usb(void)
 void pin_mux_mmc(void)
 {
 	funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT);
-	pinmux_tristate_disable(PINGRP_GMB);
+	pinmux_tristate_disable(PMUX_PINGRP_GMB);
 }
 #endif