Merge branch 'u-boot' of /home/mkr/git/u-boot-tq-group into bugfix

4 files changed, 36 insertions, 21 deletions

diff --git a/board/amcc/sequoia/cmd_sequoia.c b/board/amcc/sequoia/cmd_sequoia.c
index f3803c0..6b9043a 100644
--- a/board/amcc/sequoia/cmd_sequoia.c
+++ b/board/amcc/sequoia/cmd_sequoia.c
@@ -25,6 +25,7 @@
 #include <common.h>
 #include <command.h>
 #include <i2c.h>
+#include <asm/io.h>
 
 /*
  * There are 2 versions of production Sequoia & Rainier platforms.
@@ -39,7 +40,7 @@
  * All Sequoias & Rainiers select from two possible EEPROMs in Boot
  * Config F. One for 33MHz PCI, one for 66MHz PCI. The following
  * values are for the 33MHz PCI configuration. Byte 5 (0 base) is
- * the only  value affected for a 66MHz PCI and simply needs a +0x10.
+ * the only value affected for a 33MHz PCI and simply needs a | 0x08.
  */
 
 #define NAND_COMPATIBLE	0x01
@@ -56,6 +57,7 @@ static char *config_labels[] = {
 	"CPU: 416 PLB: 166 OPB: 83 EBC: 55",
 	"CPU: 500 PLB: 166 OPB: 83 EBC: 55",
 	"CPU: 533 PLB: 133 OPB: 66 EBC: 66",
+	"CPU: 667 PLB: 133 OPB: 66 EBC: 66",
 	"CPU: 667 PLB: 166 OPB: 83 EBC: 55",
 	NULL
 };
@@ -97,6 +99,11 @@ static u8 boot_configs[][17] = {
 		0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
 	},
 	{
+		(NOR_COMPATIBLE),
+		0x87, 0x78, 0xa2, 0x56, 0x09, 0x57, 0xa0, 0x30, 0x40,
+		0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+	},
+	{
 		(NAND_COMPATIBLE | NOR_COMPATIBLE),
 		0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30, 0x40,
 		0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
@@ -200,8 +207,12 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	}
 
 	/* check CPLD register +5 for PCI 66MHz flag */
-	if (in8(CFG_BCSR_BASE + 5) & 0x01)
-		buf[5] += 0x10;
+	if ((in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN) == 0)
+		/*
+		 * PLB-to-PCI divisor = 3 for 33MHz sync PCI
+		 * instead of 2 for 66MHz systems
+		 */
+		buf[5] |= 0x08;
 
 	if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0)
 		printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR);
diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c
index f823117..4e47ab3 100644
--- a/board/amcc/sequoia/sequoia.c
+++ b/board/amcc/sequoia/sequoia.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2006
+ * (C) Copyright 2006-2007
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * (C) Copyright 2006
@@ -24,6 +24,7 @@
 
 #include <common.h>
 #include <asm/processor.h>
+#include <asm/io.h>
 #include <ppc440.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -362,8 +363,8 @@ int checkboard(void)
 	printf("Board: Rainier - AMCC PPC440GRx Evaluation Board");
 #endif
 
-	rev = in8(CFG_BCSR_BASE + 0);
-	val = in8(CFG_BCSR_BASE + 5) & 0x01;
+	rev = in_8((void *)(CFG_BCSR_BASE + 0));
+	val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN;
 	printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33);
 
 	if (s != NULL) {
diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c
index 912f09e..6ec922a 100644
--- a/board/amcc/yosemite/yosemite.c
+++ b/board/amcc/yosemite/yosemite.c
@@ -1,4 +1,6 @@
 /*
+ * (C) Copyright 2006-2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -22,6 +24,7 @@
 #include <common.h>
 #include <ppc4xx.h>
 #include <asm/processor.h>
+#include <asm/io.h>
 #include <spd_sdram.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -181,8 +184,8 @@ int checkboard(void)
 	printf("Board: Yellowstone - AMCC PPC440GR Evaluation Board");
 #endif
 
-	rev = *(u8 *)(CFG_CPLD + 0);
-	val = *(u8 *)(CFG_CPLD + 5) & 0x01;
+	rev = in_8((void *)(CFG_BCSR_BASE + 0));
+	val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN;
 	printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33);
 
 	if (s != NULL) {
diff --git a/board/freescale/common/pq-mds-pib.c b/board/freescale/common/pq-mds-pib.c
index d79f2eb..e4f96e8 100644
--- a/board/freescale/common/pq-mds-pib.c
+++ b/board/freescale/common/pq-mds-pib.c
@@ -79,19 +79,19 @@ int pib_init(void)
 
 	printf("QOC3 ATM card on PMC0\n");
 #elif defined(CONFIG_MPC832XEMDS)
-	val = 0;
-	i2c_write(0x26, 0x7, 1, &val, 1);
-	val = 0xf7;
-	i2c_write(0x26, 0x3, 1, &val, 1);
-
-	val = 0;
-	i2c_write(0x21, 0x6, 1, &val, 1);
-	i2c_write(0x21, 0x7, 1, &val, 1);
-
-	val = 0xdf;
-	i2c_write(0x21, 0x2, 1, &val, 1);
-	val = 0xef;
-	i2c_write(0x21, 0x3, 1, &val, 1);
+	val8 = 0;
+	i2c_write(0x26, 0x7, 1, &val8, 1);
+	val8 = 0xf7;
+	i2c_write(0x26, 0x3, 1, &val8, 1);
+
+	val8 = 0;
+	i2c_write(0x21, 0x6, 1, &val8, 1);
+	i2c_write(0x21, 0x7, 1, &val8, 1);
+
+	val8 = 0xdf;
+	i2c_write(0x21, 0x2, 1, &val8, 1);
+	val8 = 0xef;
+	i2c_write(0x21, 0x3, 1, &val8, 1);
 
 	eieio();