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| author | Nitin Garg <nitin.garg@freescale.com> | 2014-09-02 17:33:06 -0500 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2014-09-04 10:37:37 -0500 |
| commit | 69f56f7509a4116fa0f2b9be50db256f1e628d31 (patch) | |
| tree | 9a1cac64f6629fd88d7b96e69bf3edc24eaac129 /board | |
| parent | ac62726276687242ce08ebe90ee765efb41abf3b (diff) | |
| download | u-boot-imx-69f56f7509a4116fa0f2b9be50db256f1e628d31.zip u-boot-imx-69f56f7509a4116fa0f2b9be50db256f1e628d31.tar.gz u-boot-imx-69f56f7509a4116fa0f2b9be50db256f1e628d31.tar.bz2 | |
ENGR00328278-1: Fix i.MX6DQ/DL arm2 LPDDR2 boards mem size
Couple of issues in commit 21a2eb5f. The RAM size is wrong and
max number of DCD is 220.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/mx6qarm2/mx6qarm2.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c index 6f8c9b2..e1294bf 100644 --- a/board/freescale/mx6qarm2/mx6qarm2.c +++ b/board/freescale/mx6qarm2/mx6qarm2.c @@ -32,7 +32,12 @@ DECLARE_GLOBAL_DATA_PTR; int dram_init(void) { - gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); +#if defined(CONFIG_MX6DL) && !defined(CONFIG_MX6DL_LPDDR2) && \ + defined(CONFIG_DDR_32BIT) + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024)/2; +#else + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); +#endif return 0; } |