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authorShengzhou Liu <Shengzhou.Liu@freescale.com>2014-01-03 14:48:44 +0800
committerYork Sun <yorksun@freescale.com>2014-01-21 13:37:41 -0800
commit1576b558b93ed2fb77dcd8bc138e77fe139974e3 (patch)
treea4d0daf7c2efc7e1eaa2e1ad0aeffa0975795f8c /board
parent3f283f4bdc6364de6fe3e2da2e365865da7710c8 (diff)
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powerpc/t2080qds: some update for t2080qds
- add more serdes protocols support. - fix some serdes lanes route. - fix SGMII doesn't work and incorrect mdio display for XFI when serdes 0x6d. - correct boot location info for SD/SPI boot. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/t2080qds/eth_t2080qds.c12
-rw-r--r--board/freescale/t2080qds/t2080qds.c66
2 files changed, 69 insertions, 9 deletions
diff --git a/board/freescale/t2080qds/eth_t2080qds.c b/board/freescale/t2080qds/eth_t2080qds.c
index 3613f93..3e4ab8f 100644
--- a/board/freescale/t2080qds/eth_t2080qds.c
+++ b/board/freescale/t2080qds/eth_t2080qds.c
@@ -371,9 +371,11 @@ int board_eth_init(bd_t *bis)
break;
case 0x6c:
case 0x6d:
+ fm_info_set_phy_address(FM1_10GEC1, 4);
+ fm_info_set_phy_address(FM1_10GEC2, 5);
/* SGMII in Slot3 */
fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR);
- fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT2_PHY_ADDR);
+ fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT4_PHY_ADDR);
break;
case 0x71:
/* SGMII in Slot3 */
@@ -418,7 +420,6 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT2_PHY_ADDR);
break;
default:
- puts("Invalid SerDes1 protocol for T2080QDS\n");
break;
}
@@ -448,7 +449,12 @@ int board_eth_init(bd_t *bis)
fm_info_set_mdio(i, mii_dev_for_muxval(
mdio_mux[i]));
break;
- };
+ case 3:
+ mdio_mux[i] = EMI1_SLOT3;
+ fm_info_set_mdio(i, mii_dev_for_muxval(
+ mdio_mux[i]));
+ break;
+ }
break;
case PHY_INTERFACE_MODE_RGMII:
if (i == FM1_DTSEC3)
diff --git a/board/freescale/t2080qds/t2080qds.c b/board/freescale/t2080qds/t2080qds.c
index cac32fe..4fe8ccb 100644
--- a/board/freescale/t2080qds/t2080qds.c
+++ b/board/freescale/t2080qds/t2080qds.c
@@ -40,6 +40,11 @@ int checkboard(void)
printf("Sys ID: 0x%02x, Board Arch: V%d, ", QIXIS_READ(id), sw >> 4);
printf("Board Version: %c, boot from ", (sw & 0xf) + 'A' - 1);
+#ifdef CONFIG_SDCARD
+ puts("SD/MMC\n");
+#elif CONFIG_SPIFLASH
+ puts("SPI\n");
+#else
sw = QIXIS_READ(brdcfg[0]);
sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT;
@@ -51,6 +56,7 @@ int checkboard(void)
puts("NAND\n");
else
printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
+#endif
printf("FPGA: v%d (%s), build %d", (int)QIXIS_READ(scver),
qixis_read_tag(buf), (int)qixis_read_minor());
@@ -97,13 +103,25 @@ int brd_mux_lane_to_slot(void)
/* SerDes1 is not enabled */
break;
case 0x1c:
- case 0x95:
case 0xa2:
- case 0x94:
/* SD1(A:D) => SLOT3 SGMII
* SD1(G:H) => SLOT1 SGMII
*/
- QIXIS_WRITE(brdcfg[12], 0x58);
+ QIXIS_WRITE(brdcfg[12], 0x1a);
+ break;
+ case 0x94:
+ case 0x95:
+ /* SD1(A:B) => SLOT3 SGMII@1.25bps
+ * SD1(C:D) => SFP Module, SGMII@3.125bps
+ * SD1(E:H) => SLOT1 SGMII@1.25bps
+ */
+ case 0x96:
+ /* SD1(A:B) => SLOT3 SGMII@1.25bps
+ * SD1(C) => SFP Module, SGMII@3.125bps
+ * SD1(D) => SFP Module, SGMII@1.25bps
+ * SD1(E:H) => SLOT1 PCIe4 x4
+ */
+ QIXIS_WRITE(brdcfg[12], 0x3a);
break;
case 0x51:
/* SD1(A:D) => SLOT3 XAUI
@@ -134,6 +152,34 @@ int brd_mux_lane_to_slot(void)
*/
QIXIS_WRITE(brdcfg[12], 0xda);
break;
+ case 0x6e:
+ /* SD1(A:B) => SFP Module, XFI
+ * SD1(C:D) => SLOT3 SGMII
+ * SD1(E:F) => SLOT1 PCIe4 x2
+ * SD1(G:H) => SLOT2 SGMII
+ */
+ QIXIS_WRITE(brdcfg[12], 0xd9);
+ break;
+ case 0xda:
+ /* SD1(A:H) => SLOT3 PCIe3 x8
+ */
+ QIXIS_WRITE(brdcfg[12], 0x0);
+ break;
+ case 0xc8:
+ /* SD1(A) => SLOT3 PCIe3 x1
+ * SD1(B) => SFP Module, SGMII@1.25bps
+ * SD1(C:D) => SFP Module, SGMII@3.125bps
+ * SD1(E:F) => SLOT1 PCIe4 x2
+ * SD1(G:H) => SLOT2 SGMII
+ */
+ QIXIS_WRITE(brdcfg[12], 0x79);
+ break;
+ case 0xab:
+ /* SD1(A:D) => SLOT3 PCIe3 x4
+ * SD1(E:H) => SLOT1 PCIe4 x4
+ */
+ QIXIS_WRITE(brdcfg[12], 0x1a);
+ break;
default:
printf("WARNING: unsupported for SerDes1 Protocol %d\n",
srds_prtcl_s1);
@@ -147,7 +193,7 @@ int brd_mux_lane_to_slot(void)
case 0x01:
case 0x02:
/* SD2(A:H) => SLOT4 PCIe1 */
- QIXIS_WRITE(brdcfg[13], 0x20);
+ QIXIS_WRITE(brdcfg[13], 0x10);
break;
case 0x15:
case 0x16:
@@ -164,7 +210,7 @@ int brd_mux_lane_to_slot(void)
* SD2(E:F) => SLOT5 Aurora
* SD2(G:H) => SATA1,SATA2
*/
- QIXIS_WRITE(brdcfg[13], 0x70);
+ QIXIS_WRITE(brdcfg[13], 0x78);
break;
case 0x1f:
/*
@@ -180,7 +226,15 @@ int brd_mux_lane_to_slot(void)
* SD2(A:D) => SLOT4 SRIO2
* SD2(E:H) => SLOT5 SRIO1
*/
- QIXIS_WRITE(brdcfg[13], 0x50);
+ QIXIS_WRITE(brdcfg[13], 0xa0);
+ break;
+ case 0x36:
+ /*
+ * SD2(A:D) => SLOT4 SRIO2
+ * SD2(E:F) => Aurora
+ * SD2(G:H) => SATA1,SATA2
+ */
+ QIXIS_WRITE(brdcfg[13], 0x78);
break;
default:
printf("WARNING: unsupported for SerDes2 Protocol %d\n",