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authorFugang Duan <B38611@freescale.com>2014-02-26 18:51:15 +0800
committerYe.Li <B37916@freescale.com>2014-03-06 11:54:59 +0800
commite81e34a2a9a2bcd8c3d2e218a375ea8e00a6f280 (patch)
tree3407c629f208273ce74b008326ca5f293bdd2db1 /board
parent9327728496108b0e4a159256b829b17629a0da5e (diff)
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ENGR00300980 ARM:imx6sx-sdb:fec: fix phy autonegation cost long time issue
On imx6sx-sdb platform, when ethernet connect to TP-LINK TL-SF1008+ switch, phy do autonegation cost long time (about 5 seconds), and then fix to 10Mbps full duplex mode, which causes two problems: - Need user to wait long time before tftp load kernel. - 10Mbps mode lead load kernel time too long. The root cause is phy init is not right, the right flow: Enable phy power -> reset phy -> supply clock to phy. After the fix, imx6sx-sdb can work fine with the switch. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/mx6sxsabresd/mx6sxsabresd.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index a7e6f4f..7d12d9b 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -193,17 +193,6 @@ static void setup_iomux_fec(int fec_id)
imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
else
imx_iomux_v3_setup_multiple_pads(fec2_pads, ARRAY_SIZE(fec2_pads));
-
- imx_iomux_v3_setup_multiple_pads(phy_control_pads,
- ARRAY_SIZE(phy_control_pads));
-
- /* Enable the ENET power, active low */
- gpio_direction_output(IMX_GPIO_NR(2, 6) , 0);
-
- /* Reset AR8031 PHY */
- gpio_direction_output(IMX_GPIO_NR(2, 7) , 0);
- udelay(500);
- gpio_set_value(IMX_GPIO_NR(2, 7), 1);
}
#endif
@@ -437,6 +426,17 @@ static int setup_fec(int fec_id)
}
#endif
+ imx_iomux_v3_setup_multiple_pads(phy_control_pads,
+ ARRAY_SIZE(phy_control_pads));
+
+ /* Enable the ENET power, active low */
+ gpio_direction_output(IMX_GPIO_NR(2, 6) , 0);
+
+ /* Reset AR8031 PHY */
+ gpio_direction_output(IMX_GPIO_NR(2, 7) , 0);
+ udelay(500);
+ gpio_set_value(IMX_GPIO_NR(2, 7), 1);
+
#ifdef CONFIG_FEC_CLOCK_25M_REF
enable_fec_25m_clock();
#endif