diff options
author | Robin Gong <b38343@freescale.com> | 2013-08-27 14:27:52 +0800 |
---|---|---|
committer | Robin Gong <b38343@freescale.com> | 2013-09-02 10:10:20 +0800 |
commit | 14a0649a9611f01a6c8494c38b5d74e867baecc5 (patch) | |
tree | 50fc1f72d10649efc709df1ce1a2a132c98575f4 /board | |
parent | c3ea0d8a355a4a5b721e8f20a0e85a36d61f741e (diff) | |
download | u-boot-imx-14a0649a9611f01a6c8494c38b5d74e867baecc5.zip u-boot-imx-14a0649a9611f01a6c8494c38b5d74e867baecc5.tar.gz u-boot-imx-14a0649a9611f01a6c8494c38b5d74e867baecc5.tar.bz2 |
ENGR00276023-2: board: freescale: mx6q: add ldo bypass interface on boards
There are three types of board for ldo bypass feature:
1.The board support ldo bypass feature, because of pmic exist. Then implement
the full function in the board file. such as mx6qsabresd/mx6slevk
2.The board can't support ldo bypass feature, although pmic still be here. For
example: WDOG reset pin and RESET key are not connected with PWRON of pfuze on
Sabreauto board, hence at worst case chip can't boot again(reboot failed while
system run on 400Mhz, because ROM boot on 800Mhz and the external pmic voltage
still be kept @400Mhz). On these board we only implement 1.2G check and
increase VDDARM/VDDSOC automatically. Force to ldo-enable mode always.
3.There is no PMIC on the board, hence LDO bypass feature cannot be supported.
In this case, ldo_mode_set() is an empty function.
Signed-off-by: Robin Gong <b38343@freescale.com>
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/mx6qarm2/mx6qarm2.c | 8 | ||||
-rw-r--r-- | board/freescale/mx6qsabreauto/mx6qsabreauto.c | 34 | ||||
-rw-r--r-- | board/freescale/mx6qsabrelite/mx6qsabrelite.c | 10 | ||||
-rw-r--r-- | board/freescale/mx6qsabresd/mx6qsabresd.c | 64 | ||||
-rw-r--r-- | board/freescale/mx6slevk/mx6slevk.c | 36 |
5 files changed, 151 insertions, 1 deletions
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c index 526b36b..d427eff 100644 --- a/board/freescale/mx6qarm2/mx6qarm2.c +++ b/board/freescale/mx6qarm2/mx6qarm2.c @@ -249,3 +249,11 @@ int checkboard(void) return 0; } + +#ifdef CONFIG_LDO_BYPASS_CHECK +/* no external pmic, always ldo_enable */ +void ldo_mode_set(int ldo_bypass) +{ + return; +} +#endif diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 245b1a8..f7496c2 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -207,6 +207,40 @@ static int setup_pmic_voltages(void) return 0; } + +#ifdef CONFIG_LDO_BYPASS_CHECK +void ldo_mode_set(int ldo_bypass) +{ + unsigned char value; + /* increase VDDARM/VDDSOC to support 1.2G chip */ + if (check_1_2G()) { + ldo_bypass = 0; /* ldo_enable on 1.2G chip */ + printf("1.2G chip, increase VDDARM_IN/VDDSOC_IN\n"); + /* increase VDDARM to 1.425V */ + if (i2c_read(0x8, 0x20, 1, &value, 1)) { + printf("Read SW1AB error!\n"); + return; + } + value &= ~0x3f; + value |= 0x2d; + if (i2c_write(0x8, 0x20, 1, &value, 1)) { + printf("Set SW1AB error!\n"); + return; + } + /* increase VDDSOC to 1.425V */ + if (i2c_read(0x8, 0x2e, 1, &value, 1)) { + printf("Read SW1C error!\n"); + return; + } + value &= ~0x3f; + value |= 0x2d; + if (i2c_write(0x8, 0x2e, 1, &value, 1)) { + printf("Set SW1C error!\n"); + return; + } + } +} +#endif #endif static void setup_iomux_uart(void) diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 9f9cac8..de92aac 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -851,3 +851,11 @@ int misc_init_r(void) #endif return 0; } + +#ifdef CONFIG_LDO_BYPASS_CHECK +/* no external pmic, always ldo_enable */ +void ldo_mode_set(int ldo_bypass) +{ + return; +} +#endif diff --git a/board/freescale/mx6qsabresd/mx6qsabresd.c b/board/freescale/mx6qsabresd/mx6qsabresd.c index 26445d4..335e32c 100644 --- a/board/freescale/mx6qsabresd/mx6qsabresd.c +++ b/board/freescale/mx6qsabresd/mx6qsabresd.c @@ -24,6 +24,7 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/iomux.h> #include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> #include <asm/errno.h> #include <asm/gpio.h> #include <asm/imx-common/iomux-v3.h> @@ -185,6 +186,7 @@ static void setup_iomux_uart(void) static int setup_pmic_voltages(void) { unsigned char value, rev_id = 0 ; + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); if (!i2c_probe(0x8)) { if (i2c_read(0x8, 0, 1, &value, 1)) { @@ -273,6 +275,68 @@ static int setup_pmic_voltages(void) return 0; } + +#ifdef CONFIG_LDO_BYPASS_CHECK +void ldo_mode_set(int ldo_bypass) +{ + unsigned char value; + /* increase VDDARM/VDDSOC to support 1.2G chip */ + if (check_1_2G()) { + ldo_bypass = 0; /* ldo_enable on 1.2G chip */ + printf("1.2G chip, increase VDDARM_IN/VDDSOC_IN\n"); + /* increase VDDARM to 1.425V */ + if (i2c_read(0x8, 0x20, 1, &value, 1)) { + printf("Read SW1AB error!\n"); + return; + } + value &= ~0x3f; + value |= 0x2d; + if (i2c_write(0x8, 0x20, 1, &value, 1)) { + printf("Set SW1AB error!\n"); + return; + } + /* increase VDDSOC to 1.425V */ + if (i2c_read(0x8, 0x2e, 1, &value, 1)) { + printf("Read SW1C error!\n"); + return; + } + value &= ~0x3f; + value |= 0x2d; + if (i2c_write(0x8, 0x2e, 1, &value, 1)) { + printf("Set SW1C error!\n"); + return; + } + } + /* switch to ldo_bypass mode , boot on 800Mhz */ + if (ldo_bypass) { + /* decrease VDDARM to 1.175V */ + if (i2c_read(0x8, 0x20, 1, &value, 1)) { + printf("Read SW1AB error!\n"); + return; + } + value &= ~0x3f; + value |= 0x23; + if (i2c_write(0x8, 0x20, 1, &value, 1)) { + printf("Set SW1AB error!\n"); + return; + } + /* increase VDDSOC to 1.175V */ + if (i2c_read(0x8, 0x2e, 1, &value, 1)) { + printf("Read SW1C error!\n"); + return; + } + value &= ~0x3f; + value |= 0x23; + if (i2c_write(0x8, 0x2e, 1, &value, 1)) { + printf("Set SW1C error!\n"); + return; + } + + set_anatop_bypass(); + printf("switch to ldo_bypass mode!\n"); + } +} +#endif #endif diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index f45f335..c4fdd8b 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -181,6 +181,42 @@ static int setup_pmic_voltages(void) return 0; } + +#ifdef CONFIG_LDO_BYPASS_CHECK +void ldo_mode_set(int ldo_bypass) +{ + unsigned char value; + /* swith to ldo_bypass mode */ + if (ldo_bypass) { + /* decrease VDDARM to 1.15V */ + if (i2c_read(0x8, 0x20, 1, &value, 1)) { + printf("Read SW1AB error!\n"); + return; + } + value &= ~0x3f; + value |= 0x22; + if (i2c_write(0x8, 0x20, 1, &value, 1)) { + printf("Set SW1AB error!\n"); + return; + } + /* increase VDDSOC to 1.15V */ + if (i2c_read(0x8, 0x2e, 1, &value, 1)) { + printf("Read SW1C error!\n"); + return; + } + value &= ~0x3f; + value |= 0x22; + if (i2c_write(0x8, 0x2e, 1, &value, 1)) { + printf("Set SW1C error!\n"); + return; + } + + set_anatop_bypass(); + printf("switch to ldo_bypass mode!\n"); + } + +} +#endif #endif int board_early_init_f(void) |