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| author | Xinyu Chen <xinyu.chen@freescale.com> | 2011-07-20 17:34:03 +0800 |
|---|---|---|
| committer | Xinyu Chen <xinyu.chen@freescale.com> | 2011-07-20 17:34:03 +0800 |
| commit | cea9ea9324dcfddf99f61582fb919eb6abde38bc (patch) | |
| tree | f301416a4dd3a784a2c576b706977a6ab1ad2a93 /board | |
| parent | a958f00844adac27310327e05de8eb7e1f929b05 (diff) | |
| download | u-boot-imx-cea9ea9324dcfddf99f61582fb919eb6abde38bc.zip u-boot-imx-cea9ea9324dcfddf99f61582fb919eb6abde38bc.tar.gz u-boot-imx-cea9ea9324dcfddf99f61582fb919eb6abde38bc.tar.bz2 | |
ENGR00153394 mx50 rd3: make SDHC1 as default boot device for android
Drop NAND/SPI boot support.
Enable fastboot.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/mx50_rdp/mx50_rdp.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/freescale/mx50_rdp/mx50_rdp.c b/board/freescale/mx50_rdp/mx50_rdp.c index 8470af0..7687def 100644 --- a/board/freescale/mx50_rdp/mx50_rdp.c +++ b/board/freescale/mx50_rdp/mx50_rdp.c @@ -1274,12 +1274,15 @@ struct reco_envs supported_reco_envs[BOOT_DEV_NUM] = { .cmd = CONFIG_ANDROID_RECOVERY_BOOTCMD_MMC, .args = CONFIG_ANDROID_RECOVERY_BOOTARGS_MMC, }, +#ifdef CONFIG_CMD_UBI { .cmd = CONFIG_ANDROID_RECOVERY_BOOTCMD_NAND, .args = CONFIG_ANDROID_RECOVERY_BOOTARGS_NAND, }, +#endif }; +#ifdef CONFIG_CMD_UBI extern int ubifs_init(void); extern int ubifs_mount(char *vol_name); extern int ubifs_load(char *filename, u32 addr, u32 size); @@ -1357,6 +1360,7 @@ static int check_nand_recovery_cmd_file(char *mtd_part_name, return filelen; } +#endif int check_recovery_cmd_file(void) { @@ -1412,6 +1416,7 @@ int check_recovery_cmd_file(void) break; case NAND_BOOT: case SPI_NOR_BOOT: +#ifdef CONFIG_CMD_UBI env = getenv("mtdparts"); if (!env) setenv("mtdparts", MTDPARTS_DEFAULT); @@ -1428,6 +1433,7 @@ int check_recovery_cmd_file(void) CONFIG_ANDROID_UBIFS_PARTITION_NM, CONFIG_ANDROID_CACHE_PARTITION_NAND, CONFIG_ANDROID_RECOVERY_CMD_FILE); +#endif case UNKNOWN_BOOT: default: return 0; |