Merge with pollux.denx.org:/home/git/u-boot/.git

8 files changed, 197 insertions, 612 deletions

diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c
index 0d5ab71..d02add5 100644
--- a/board/amcc/bamboo/bamboo.c
+++ b/board/amcc/bamboo/bamboo.c
@@ -29,6 +29,7 @@
 
 void ext_bus_cntlr_init(void);
 void configure_ppc440ep_pins(void);
+int is_nand_selected(void);
 
 gpio_param_s gpio_tab[GPIO_GROUP_MAX][GPIO_MAX];
 #if 0
@@ -132,10 +133,10 @@ gpio_param_s gpio_tab[GPIO_GROUP_MAX][GPIO_MAX];
 	EBC0_BNCR_BW_8BIT
 
 #define EBC0_BNCR_SMALL_FLASH_CS4			\
-	EBC0_BNCR_BAS_ENCODE(0x87800000)    	| 	\
-	EBC0_BNCR_BS_8MB		    	|	\
+	EBC0_BNCR_BAS_ENCODE(0x87F00000)    	| 	\
+	EBC0_BNCR_BS_1MB		    	|	\
 	EBC0_BNCR_BU_RW			    	|	\
-	EBC0_BNCR_BW_16BIT
+	EBC0_BNCR_BW_8BIT
 
 /* Large Flash or SRAM */
 #define EBC0_BNAP_LARGE_FLASH_OR_SRAM			\
@@ -273,6 +274,87 @@ int board_early_init_f(void)
 	return 0;
 }
 
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#include <linux/mtd/nand.h>
+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+
+/*----------------------------------------------------------------------------+
+  | nand_reset.
+  |   Reset Nand flash
+  |   This routine will abort previous cmd
+  +----------------------------------------------------------------------------*/
+int nand_reset(ulong addr)
+{
+	int wait=0, stat=0;
+
+	out8(addr + NAND_CMD_REG, NAND0_CMD_RESET);
+	out8(addr + NAND_CMD_REG, NAND0_CMD_READ_STATUS);
+
+	while ((stat != 0xc0) && (wait != 0xffff)) {
+		stat = in8(addr + NAND_DATA_REG);
+		wait++;
+	}
+
+	if (stat == 0xc0) {
+		return 0;
+	} else {
+		printf("NAND Reset timeout.\n");
+		return -1;
+	}
+}
+
+void board_nand_set_device(int cs, ulong addr)
+{
+	/* Set NandFlash Core Configuration Register */
+	out32(addr + NAND_CCR_REG, 0x00001000 | (cs << 24));
+
+	switch (cs) {
+	case 1:
+		/* -------
+		 *  NAND0
+		 * -------
+		 * K9F1208U0A : 4 addr cyc, 1 col + 3 Row
+		 * Set NDF1CR - Enable External CS1 in NAND FLASH controller
+		 */
+		out32(addr + NAND_CR1_REG, 0x80002222);
+		break;
+
+	case 2:
+		/* -------
+		 *  NAND1
+		 * -------
+		 * K9K2G0B : 5 addr cyc, 2 col + 3 Row
+		 * Set NDF2CR : Enable External CS2 in NAND FLASH controller
+		 */
+		out32(addr + NAND_CR2_REG, 0xC0007777);
+		break;
+	}
+
+	/* Perform Reset Command */
+	if (nand_reset(addr) != 0)
+		return;
+}
+
+void nand_init(void)
+{
+	board_nand_set_device(1, CFG_NAND_ADDR);
+
+	nand_probe(CFG_NAND_ADDR);
+	if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
+		print_size(nand_dev_desc[0].totlen, "\n");
+	}
+
+#if 0 /* NAND1 not supported yet */
+	board_nand_set_device(2, CFG_NAND2_ADDR);
+
+	nand_probe(CFG_NAND2_ADDR);
+	if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
+		print_size(nand_dev_desc[0].totlen, "\n");
+	}
+#endif
+}
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+
 int checkboard(void)
 {
 	sys_info_t sysinfo;
@@ -585,7 +667,11 @@ int is_powerpc440ep_pass1(void)
   +----------------------------------------------------------------------------*/
 int is_nand_selected(void)
 {
-	return FALSE; /* test-only */
+#ifdef CONFIG_BAMBOO_NAND
+	return TRUE;
+#else
+	return FALSE;
+#endif
 }
 
 /*----------------------------------------------------------------------------+
@@ -829,12 +915,8 @@ void ext_bus_cntlr_init(void)
 			/* NAND Flash */
 			ebc0_cs1_bnap_value = EBC0_BNAP_NAND_FLASH;
 			ebc0_cs1_bncr_value = EBC0_BNCR_NAND_FLASH_CS1;
-			/*ebc0_cs2_bnap_value = EBC0_BNAP_NAND_FLASH;
-			  ebc0_cs2_bncr_value = EBC0_BNCR_NAND_FLASH_CS2;
-			  ebc0_cs3_bnap_value = EBC0_BNAP_NAND_FLASH;
-			  ebc0_cs3_bncr_value = EBC0_BNCR_NAND_FLASH_CS3;*/
-			ebc0_cs2_bnap_value = 0;
-			ebc0_cs2_bncr_value = 0;
+			ebc0_cs2_bnap_value = EBC0_BNAP_NAND_FLASH;
+			ebc0_cs2_bncr_value = EBC0_BNCR_NAND_FLASH_CS2;
 			ebc0_cs3_bnap_value = 0;
 			ebc0_cs3_bncr_value = 0;
 		} else {
@@ -985,7 +1067,7 @@ void ext_bus_cntlr_init(void)
   +----------------------------------------------------------------------------*/
 uart_config_nb_t get_uart_configuration(void)
 {
-	return (L4); /* test-only */
+	return (L4);
 }
 
 /*----------------------------------------------------------------------------+
@@ -1132,8 +1214,7 @@ void ndfc_selection_in_fpga(void)
 
 	fpga_selection_1_reg  = in8(FPGA_SELECTION_1_REG) &~FPGA_SEL_1_REG_NF_SELEC_MASK;
 	fpga_selection_1_reg |= FPGA_SEL_1_REG_NF0_SEL_BY_NFCS1;
-	/*fpga_selection_1_reg |= FPGA_SEL_1_REG_NF1_SEL_BY_NFCS2; */
-	/*fpga_selection_1_reg |= FPGA_SEL_1_REG_NF1_SEL_BY_NFCS3; */
+	fpga_selection_1_reg |= FPGA_SEL_1_REG_NF1_SEL_BY_NFCS2;
 	out8(FPGA_SELECTION_1_REG,fpga_selection_1_reg);
 }
 
@@ -1725,11 +1806,15 @@ void force_bup_core_selection(core_selection_t *core_select_P, config_validity_t
 	*(core_select_P+UIC_0_3)		= CORE_SELECTED;
 	*(core_select_P+UIC_4_9)		= CORE_SELECTED;
 
-	*(core_select_P+SCP_CORE)	     = CORE_SELECTED;
-	*(core_select_P+DMA_CHANNEL_CD)		   = CORE_SELECTED;
-	*(core_select_P+PACKET_REJ_FUNC_AVAIL)		  = CORE_SELECTED;
+	*(core_select_P+SCP_CORE)	        = CORE_SELECTED;
+	*(core_select_P+DMA_CHANNEL_CD)		= CORE_SELECTED;
+	*(core_select_P+PACKET_REJ_FUNC_AVAIL)	= CORE_SELECTED;
 	*(core_select_P+USB1_DEVICE)		= CORE_SELECTED;
 
+	if (is_nand_selected()) {
+		*(core_select_P+NAND_FLASH)	= CORE_SELECTED;
+	}
+
 	*config_val_P = CONFIG_IS_VALID;
 
 }
@@ -1901,9 +1986,8 @@ void configure_ppc440ep_pins(void)
 		      SDR0_CUST0_NDFC_ENABLE	|
 		      SDR0_CUST0_NDFC_BW_8_BIT	|
 		      SDR0_CUST0_NDFC_ARE_MASK	|
-		      SDR0_CUST0_CHIPSELGAT_EN1 );
-		/*SDR0_CUST0_CHIPSELGAT_EN2 ); */
-		/*SDR0_CUST0_CHIPSELGAT_EN3 ); */
+		      SDR0_CUST0_CHIPSELGAT_EN1 |
+		      SDR0_CUST0_CHIPSELGAT_EN2);
 
 		ndfc_selection_in_fpga();
 	}
diff --git a/board/amcc/bamboo/flash.c b/board/amcc/bamboo/flash.c
index 97a4b98..a30ab7a 100644
--- a/board/amcc/bamboo/flash.c
+++ b/board/amcc/bamboo/flash.c
@@ -50,15 +50,16 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH chips        */
 /*
  * Mark big flash bank (16 bit instead of 8 bit access) in address with bit 0
  */
-static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = {
+static unsigned long flash_addr_table[][CFG_MAX_FLASH_BANKS] = {
 	{0x87800001, 0xFFF00000, 0xFFF80000}, /* 0:boot from small flash */
 	{0x00000000, 0x00000000, 0x00000000}, /* 1:boot from pci 66      */
 	{0x00000000, 0x00000000, 0x00000000}, /* 2:boot from nand flash  */
-	{0x87800000, 0x87880000, 0xFF800001}, /* 3:boot from big flash 33*/
-	{0x87800000, 0x87880000, 0xFF800001}, /* 4:boot from big flash 66*/
+	{0x87F00000, 0x87F80000, 0xFFC00001}, /* 3:boot from big flash 33*/
+	{0x87F00000, 0x87F80000, 0xFFC00001}, /* 4:boot from big flash 66*/
 	{0x00000000, 0x00000000, 0x00000000}, /* 5:boot from             */
 	{0x00000000, 0x00000000, 0x00000000}, /* 6:boot from pci 66      */
 	{0x00000000, 0x00000000, 0x00000000}, /* 7:boot from             */
+	{0x87C00001, 0xFFF00000, 0xFFF80000}, /* 0:boot from small flash */
 };
 
 /*
@@ -117,6 +118,10 @@ unsigned long flash_init(void)
 			index = 2;
 			break;
 		}
+	} else if (index == 0) {
+		if (in8(FPGA_SETTING_REG) & FPGA_SET_REG_OP_CODE_FLASH_ABOVE) {
+			index = 8; /* sram below op code flash -> new index 8 */
+		}
 	}
 
 	DEBUGF("\n");
diff --git a/board/amcc/bamboo/init.S b/board/amcc/bamboo/init.S
index 9070293..7820107 100644
--- a/board/amcc/bamboo/init.S
+++ b/board/amcc/bamboo/init.S
@@ -86,14 +86,20 @@
 
 tlbtab:
     tlbtab_start
-	/*
-		0xf0000000 must be first, before relocation SA_I must be off to use the
-	    dcache as stack. It is patched after relocation to enable SA_I
-	*/
-    tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
-    tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
-    tlbentry( CFG_PCI_BASE, SZ_256M, 0xE0000000, 0, AC_R|AC_W|SA_G|SA_I )
-    tlbentry( CFG_NVRAM_BASE_ADDR, SZ_256M, 0x80000000, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
+
+    /*
+     * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
+     * speed up boot process. It is patched after relocation to enable SA_I
+     */
+    tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
+
+    /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
+    tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
+
+    tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
+    tlbentry( CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I )
+    tlbentry( CFG_NVRAM_BASE_ADDR, SZ_256M, CFG_NVRAM_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
+    tlbentry( CFG_NAND_ADDR, SZ_256M, CFG_NAND_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
 
     /* PCI */
     tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I )
@@ -102,6 +108,6 @@ tlbtab:
     tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I )
 
     /* USB 2.0 Device */
-    tlbentry( CFG_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_R|AC_W|SA_G|SA_I )
+    tlbentry( CFG_USB_DEVICE, SZ_1K, CFG_USB_DEVICE, 0, AC_R|AC_W|SA_G|SA_I )
 
     tlbtab_end
diff --git a/board/amcc/yosemite/Makefile b/board/amcc/yosemite/Makefile
index 5654f91..47116d3 100644
--- a/board/amcc/yosemite/Makefile
+++ b/board/amcc/yosemite/Makefile
@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
 LIB	= lib$(BOARD).a
 
 OBJS	= $(BOARD).o
-OBJS   += flash.o
 SOBJS	= init.o
 
 $(LIB):	$(OBJS) $(SOBJS)
diff --git a/board/amcc/yosemite/flash.c b/board/amcc/yosemite/flash.c
deleted file mode 100644
index cd6a2e6..0000000
--- a/board/amcc/yosemite/flash.c
+++ /dev/null
@@ -1,571 +0,0 @@
-/*
- * (C) Copyright 2002-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
- * Add support for Am29F016D and dynamic switch setting.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-/*
- * Ported to XPedite1000, 1/2 mb boot flash only
- * Travis B. Sawyer, <travis.sawyer@sandburst.com>
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-#undef DEBUG
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif				/* DEBUG */
-
-#define BOOT_SMALL_FLASH	32	/* 00100000 */
-#define FLASH_ONBD_N		2	/* 00000010 */
-#define FLASH_SRAM_SEL		1	/* 00000001 */
-
-#define BOOT_SMALL_FLASH_VAL	4
-#define FLASH_ONBD_N_VAL	2
-#define FLASH_SRAM_SEL_VAL	1
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH chips   */
-
-unsigned long flash_addr_table[512][CFG_MAX_FLASH_BANKS] = {
-	{0xfe000000}
-
-};
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-static int write_word(flash_info_t * info, ulong dest, ulong data);
-
-#define ADDR0		0xaaaa
-#define ADDR1		0x5554
-#define FLASH_WORD_SIZE unsigned short
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init(void)
-{
-	unsigned long total_b = 0;
-	unsigned long size_b[CFG_MAX_FLASH_BANKS];
-	unsigned short index = 0;
-	int i;
-
-	DEBUGF("\n");
-	DEBUGF("FLASH: Index: %d\n", index);
-
-	/* Init: no FLASHes known */
-	for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
-		flash_info[i].flash_id = FLASH_UNKNOWN;
-		flash_info[i].sector_count = -1;
-		flash_info[i].size = 0;
-
-		/* check whether the address is 0 */
-		if (flash_addr_table[index][i] == 0) {
-			continue;
-		}
-
-		/* call flash_get_size() to initialize sector address */
-		size_b[i] = flash_get_size((vu_long *)
-					   flash_addr_table[index][i],
-					   &flash_info[i]);
-		flash_info[i].size = size_b[i];
-		if (flash_info[i].flash_id == FLASH_UNKNOWN) {
-			printf
-			    ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
-			     i, size_b[i], size_b[i] << 20);
-			flash_info[i].sector_count = -1;
-			flash_info[i].size = 0;
-		}
-
-		total_b += flash_info[i].size;
-	}
-
-	/* FLASH protect Monitor */
-	flash_protect(FLAG_PROTECT_SET,
-		      CFG_MONITOR_BASE, 0xFFFFFFFF, &flash_info[0]);
-
-	return total_b;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t * info)
-{
-	int i;
-	int k;
-	int size;
-	int erased;
-	volatile unsigned long *flash;
-
-	if (info->flash_id == FLASH_UNKNOWN) {
-		printf("missing or unknown FLASH type\n");
-		return;
-	}
-
-	switch (info->flash_id & FLASH_VENDMASK) {
-	case FLASH_MAN_AMD:
-		printf("AMD ");
-		break;
-	case FLASH_MAN_FUJ:
-		printf("FUJITSU ");
-		break;
-	case FLASH_MAN_SST:
-		printf("SST ");
-		break;
-	default:
-		printf("Unknown Vendor ");
-		break;
-	}
-
-	switch (info->flash_id & FLASH_TYPEMASK) {
-	case FLASH_AMD016:
-		printf("AM29F016D (16 Mbit, uniform sector size)\n");
-		break;
-	case FLASH_AM040:
-		printf("AM29F040 (512 Kbit, uniform sector size)\n");
-		break;
-	case FLASH_AM400B:
-		printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
-		break;
-	case FLASH_AM400T:
-		printf("AM29LV400T (4 Mbit, top boot sector)\n");
-		break;
-	case FLASH_AM800B:
-		printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
-		break;
-	case FLASH_AM800T:
-		printf("AM29LV800T (8 Mbit, top boot sector)\n");
-		break;
-	case FLASH_AM160B:
-		printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
-		break;
-	case FLASH_AM160T:
-		printf("AM29LV160T (16 Mbit, top boot sector)\n");
-		break;
-	case FLASH_AM320B:
-		printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
-		break;
-	case FLASH_AM320T:
-		printf("AM29LV320T (32 Mbit, top boot sector)\n");
-		break;
-	case FLASH_SST800A:
-		printf("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
-		break;
-	case FLASH_SST160A:
-		printf("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
-		break;
-	default:
-		printf("Unknown Chip Type\n");
-		break;
-	}
-
-	printf("  Size: %ld KB in %d Sectors\n",
-	       info->size >> 10, info->sector_count);
-
-	printf("  Sector Start Addresses:");
-	for (i = 0; i < info->sector_count; ++i) {
-		/*
-		 * Check if whole sector is erased
-		 */
-		if (i != (info->sector_count - 1))
-			size = info->start[i + 1] - info->start[i];
-		else
-			size = info->start[0] + info->size - info->start[i];
-		erased = 1;
-		flash = (volatile unsigned long *)info->start[i];
-		size = size >> 2;	/* divide by 4 for longword access */
-		for (k = 0; k < size; k++) {
-			if (*flash++ != 0xffffffff) {
-				erased = 0;
-				break;
-			}
-		}
-
-		if ((i % 5) == 0)
-			printf("\n   ");
-		printf(" %08lX%s%s",
-		       info->start[i],
-		       erased ? " E" : "  ", info->protect[i] ? "RO " : "   ");
-	}
-	printf("\n");
-	return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info)
-{
-	short i;
-	FLASH_WORD_SIZE value;
-	ulong base = (ulong) addr;
-	volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr;
-
-	DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
-
-	/* Write auto select command: read Manufacturer ID */
-	udelay(10000);
-	*(FLASH_WORD_SIZE *) ((int)addr + ADDR0) = (FLASH_WORD_SIZE) 0x00AA;
-	udelay(1000);
-	*(FLASH_WORD_SIZE *) ((int)addr + ADDR1) = (FLASH_WORD_SIZE) 0x0055;
-	udelay(1000);
-	*(FLASH_WORD_SIZE *) ((int)addr + ADDR0) = (FLASH_WORD_SIZE) 0x0090;
-	udelay(1000);
-
-	value = addr2[0];
-
-	DEBUGF("FLASH MANUFACT: %x\n", value);
-
-	switch (value) {
-	case (FLASH_WORD_SIZE) AMD_MANUFACT:
-		info->flash_id = FLASH_MAN_AMD;
-		break;
-	case (FLASH_WORD_SIZE) FUJ_MANUFACT:
-		info->flash_id = FLASH_MAN_FUJ;
-		break;
-	case (FLASH_WORD_SIZE) SST_MANUFACT:
-		info->flash_id = FLASH_MAN_SST;
-		break;
-	case (FLASH_WORD_SIZE) STM_MANUFACT:
-		info->flash_id = FLASH_MAN_STM;
-		break;
-	default:
-		info->flash_id = FLASH_UNKNOWN;
-		info->sector_count = 0;
-		info->size = 0;
-		return (0);	/* no or unknown flash  */
-	}
-
-#ifdef CONFIG_ADCIOP
-	value = addr2[0];	/* device ID            */
-	debug("\ndev_code=%x\n", value);
-#else
-	value = addr2[1];	/* device ID            */
-#endif
-
-	DEBUGF("\nFLASH DEVICEID: %x\n", value);
-
-	info->flash_id = 0;
-	info->sector_count = CFG_MAX_FLASH_SECT;
-	info->size = 0x02000000;
-
-	/* set up sector start address table */
-	for (i = 0; i < info->sector_count; i++) {
-		info->start[i] = (int)base + (i * 0x00020000);
-		info->protect[i] = 0;
-	}
-
-	*(FLASH_WORD_SIZE *) ((int)addr) = (FLASH_WORD_SIZE) 0x00F0;	/* reset bank */
-
-	return (info->size);
-}
-
-int wait_for_DQ7(flash_info_t * info, int sect)
-{
-	ulong start, now, last;
-	volatile FLASH_WORD_SIZE *addr =
-	    (FLASH_WORD_SIZE *) (info->start[sect]);
-
-	start = get_timer(0);
-	last = start;
-	while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
-	       (FLASH_WORD_SIZE) 0x00800080) {
-		if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
-			printf("Timeout\n");
-			return -1;
-		}
-		/* show that we're waiting */
-		if ((now - last) > 1000) {	/* every second */
-			putc('.');
-			last = now;
-		}
-	}
-	return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase(flash_info_t * info, int s_first, int s_last)
-{
-	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
-	volatile FLASH_WORD_SIZE *addr2;
-	int flag, prot, sect, l_sect;
-
-	if ((s_first < 0) || (s_first > s_last)) {
-		if (info->flash_id == FLASH_UNKNOWN) {
-			printf("- missing\n");
-		} else {
-			printf("- no sectors to erase\n");
-		}
-		return 1;
-	}
-
-	if (info->flash_id == FLASH_UNKNOWN) {
-		printf("Can't erase unknown flash type - aborted\n");
-		return 1;
-	}
-
-	prot = 0;
-	for (sect = s_first; sect <= s_last; ++sect) {
-		if (info->protect[sect]) {
-			prot++;
-		}
-	}
-
-	if (prot) {
-		printf("- Warning: %d protected sectors will not be erased!\n",
-		       prot);
-	} else {
-		printf("\n");
-	}
-
-	l_sect = -1;
-
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts();
-
-	/* Start erase on unprotected sectors */
-	for (sect = s_first; sect <= s_last; sect++) {
-		if (info->protect[sect] == 0) {	/* not protected */
-			addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
-			printf("Erasing sector %p\n", addr2);
-			*(FLASH_WORD_SIZE *) ((int)addr + ADDR0) =
-			    (FLASH_WORD_SIZE) 0x00AA;
-			asm("sync");
-			asm("isync");
-			*(FLASH_WORD_SIZE *) ((int)addr + ADDR1) =
-			    (FLASH_WORD_SIZE) 0x0055;
-			asm("sync");
-			asm("isync");
-			*(FLASH_WORD_SIZE *) ((int)addr + ADDR0) =
-			    (FLASH_WORD_SIZE) 0x0080;
-			asm("sync");
-			asm("isync");
-			*(FLASH_WORD_SIZE *) ((int)addr + ADDR0) =
-			    (FLASH_WORD_SIZE) 0x00AA;
-			asm("sync");
-			asm("isync");
-			*(FLASH_WORD_SIZE *) ((int)addr + ADDR1) =
-			    (FLASH_WORD_SIZE) 0x0055;
-			asm("sync");
-			asm("isync");
-			addr2[0] = (FLASH_WORD_SIZE) 0x00300030;	/* sector erase */
-			asm("sync");
-			asm("isync");
-
-			l_sect = sect;
-			/*
-			 * Wait for each sector to complete, it's more
-			 * reliable.  According to AMD Spec, you must
-			 * issue all erase commands within a specified
-			 * timeout.  This has been seen to fail, especially
-			 * if printf()s are included (for debug)!!
-			 */
-			wait_for_DQ7(info, sect);
-		}
-	}
-
-	/* re-enable interrupts if necessary */
-	if (flag)
-		enable_interrupts();
-
-	/* wait at least 80us - let's wait 1 ms */
-	udelay(1000);
-
-#if 0
-	/*
-	 * We wait for the last triggered sector
-	 */
-	if (l_sect < 0)
-		goto DONE;
-	wait_for_DQ7(info, l_sect);
-
-      DONE:
-#endif
-	/* reset to read mode */
-	addr = (FLASH_WORD_SIZE *) info->start[0];
-	addr[0] = (FLASH_WORD_SIZE) 0x00F000F0;	/* reset bank */
-
-	printf(" done\n");
-	return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
-	ulong cp, wp, data;
-	int i, l, rc;
-	ulong status_value = 0;
-
-	wp = (addr & ~3);	/* get lower word aligned address */
-
-	/*
-	 * handle unaligned start bytes
-	 */
-	if ((l = addr - wp) != 0) {
-		data = 0;
-		for (i = 0, cp = wp; i < l; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *) cp);
-		}
-		for (; i < 4 && cnt > 0; ++i) {
-			data = (data << 8) | *src++;
-			--cnt;
-			++cp;
-		}
-		for (; cnt == 0 && i < 4; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *) cp);
-		}
-
-		if ((rc = write_word(info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp += 4;
-	}
-
-	/*
-	 * handle word aligned part
-	 */
-	while (cnt >= 4) {
-
-		/*print status if needed */
-		if ((wp >= (status_value + 0x20000))
-		    && (status_value < 0xFFFE0000)) {
-			status_value = wp;
-			printf("writing to sector 0x%X\n", status_value);
-		}
-
-		data = 0;
-		for (i = 0; i < 4; ++i) {
-			data = (data << 8) | *src++;
-		}
-		if ((rc = write_word(info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp += 4;
-		cnt -= 4;
-	}
-
-	if (cnt == 0) {
-		return (0);
-	}
-
-	/*
-	 * handle unaligned tail bytes
-	 */
-	data = 0;
-	for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
-		data = (data << 8) | *src++;
-		--cnt;
-	}
-	for (; i < 4; ++i, ++cp) {
-		data = (data << 8) | (*(uchar *) cp);
-	}
-
-	return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word(flash_info_t * info, ulong dest, ulong data)
-{
-	vu_long *addr2 = (vu_long *) (info->start[0]);
-	volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
-	volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
-	ulong start;
-	int i;
-
-	/* Check if Flash is (sufficiently) erased */
-	if ((*((volatile FLASH_WORD_SIZE *)dest) &
-	     (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
-		return (2);
-	}
-
-	for (i = 0; i < 4 / sizeof(FLASH_WORD_SIZE); i++) {
-		int flag;
-
-		/* Disable interrupts which might cause a timeout here */
-		flag = disable_interrupts();
-
-		*(FLASH_WORD_SIZE *) ((int)addr2 + ADDR0) =
-		    (FLASH_WORD_SIZE) 0x00AA;
-		asm("sync");
-		asm("isync");
-		*(FLASH_WORD_SIZE *) ((int)addr2 + ADDR1) =
-		    (FLASH_WORD_SIZE) 0x0055;
-		asm("sync");
-		asm("isync");
-		*(FLASH_WORD_SIZE *) ((int)addr2 + ADDR0) =
-		    (FLASH_WORD_SIZE) 0x00A0;
-		asm("sync");
-		asm("isync");
-
-		dest2[i] = data2[i];
-
-		/* re-enable interrupts if necessary */
-		if (flag)
-			enable_interrupts();
-
-		/* data polling for D7 */
-		start = get_timer(0);
-		while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
-		       (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
-
-			if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
-				return (1);
-			}
-		}
-	}
-
-	return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/amcc/yosemite/init.S b/board/amcc/yosemite/init.S
index 7ba43c7..425ad08 100644
--- a/board/amcc/yosemite/init.S
+++ b/board/amcc/yosemite/init.S
@@ -86,14 +86,19 @@
 
 tlbtab:
     tlbtab_start
-	/*
-		0xf0000000 must be first, before relocation SA_I must be off to use the
-	    dcache as stack. It is patched after relocation to enable SA_I
-	*/
-    tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
-    tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
-    tlbentry( CFG_PCI_BASE, SZ_256M, 0xE0000000, 0, AC_R|AC_W|SA_G|SA_I )
-    tlbentry( CFG_NVRAM_BASE_ADDR, SZ_16K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
+
+    /*
+     * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
+     * speed up boot process. It is patched after relocation to enable SA_I
+     */
+    tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
+
+    /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
+    tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
+
+    tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
+    tlbentry( CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I )
+    tlbentry( CFG_NVRAM_BASE_ADDR, SZ_256M, CFG_NVRAM_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
 
     /* PCI */
     tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I )
diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c
index 6c8a883..b50e99a 100644
--- a/board/amcc/yosemite/yosemite.c
+++ b/board/amcc/yosemite/yosemite.c
@@ -20,9 +20,12 @@
  */
 
 #include <common.h>
+#include <ppc4xx.h>
 #include <asm/processor.h>
 #include <spd_sdram.h>
 
+extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
 int board_early_init_f(void)
 {
 	register uint reg;
@@ -35,7 +38,7 @@ int board_early_init_f(void)
 	mtdcr(ebccfgd, reg | 0x04000000);	/* Set ATC */
 
 	mtebc(pb0ap, 0x03017300);	/* FLASH/SRAM */
-	mtebc(pb0cr, 0xfe0ba000);	/* BAS=0xfe0 32MB r/w 16-bit */
+	mtebc(pb0cr, 0xfc0da000);	/* BAS=0xfc0 64MB r/w 16-bit */
 
 	mtebc(pb1ap, 0x00000000);
 	mtebc(pb1cr, 0x00000000);
@@ -122,6 +125,54 @@ int board_early_init_f(void)
 	return 0;
 }
 
+int misc_init_r (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	uint pbcr;
+	int size_val = 0;
+
+	/* Re-do sizing to get full correct info */
+	mtdcr(ebccfga, pb0cr);
+	pbcr = mfdcr(ebccfgd);
+	switch (gd->bd->bi_flashsize) {
+	case 1 << 20:
+		size_val = 0;
+		break;
+	case 2 << 20:
+		size_val = 1;
+		break;
+	case 4 << 20:
+		size_val = 2;
+		break;
+	case 8 << 20:
+		size_val = 3;
+		break;
+	case 16 << 20:
+		size_val = 4;
+		break;
+	case 32 << 20:
+		size_val = 5;
+		break;
+	case 64 << 20:
+		size_val = 6;
+		break;
+	case 128 << 20:
+		size_val = 7;
+		break;
+	}
+	pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
+	mtdcr(ebccfga, pb0cr);
+	mtdcr(ebccfgd, pbcr);
+
+	/* Monitor protection ON by default */
+	(void)flash_protect(FLAG_PROTECT_SET,
+			    -CFG_MONITOR_LEN,
+			    0xffffffff,
+			    &flash_info[0]);
+
+	return 0;
+}
+
 int checkboard(void)
 {
 	sys_info_t sysinfo;
@@ -135,6 +186,8 @@ int checkboard(void)
 	printf("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000);
 	printf("\tPER: %lu MHz\n", sysinfo.freqEPB / 1000000);
 	printf("\tPCI: %lu MHz\n", sysinfo.freqPCI / 1000000);
+
+
 	return (0);
 }
 
diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c
index 43d89b0..90275ec 100644
--- a/board/tqm5200/tqm5200.c
+++ b/board/tqm5200/tqm5200.c
@@ -250,6 +250,10 @@ long int initdram (int board_type)
 
 int checkboard (void)
 {
+#if defined (CONFIG_AEVFIFO)
+	puts ("Board: AEVFIFO\n");
+	return 0;
+#endif
 #if defined (CONFIG_TQM5200_AA)
 	puts ("Board: TQM5200-AA (TQ-Components GmbH)\n");
 #elif defined (CONFIG_TQM5200_AB)