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authorwdenk <wdenk>2002-11-04 16:02:40 +0000
committerwdenk <wdenk>2002-11-04 16:02:40 +0000
commite95b61cfb0c7203964c1a3f163e16a65f04d87ec (patch)
tree84c79b69e42e1d551c737a06c683d7cd4d5e87b3 /board
parent699b13a6064e642280caffaa83c10b359a6c1114 (diff)
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Patch by Guillaume Alexandre,, 04 Nov 2002:
Improve PCI access on 32-bits Compact PCI bus Adjust VFD initialization on TRAB Cleanup RRvision video code
Diffstat (limited to 'board')
-rw-r--r--board/pcippc2/pcippc2.c21
-rw-r--r--board/pcippc2/pcippc2.h2
-rw-r--r--board/pcippc2/pcippc2_fpga.h1
-rw-r--r--board/trab/trab.c18
4 files changed, 34 insertions, 8 deletions
diff --git a/board/pcippc2/pcippc2.c b/board/pcippc2/pcippc2.c
index e1b065b..80ca402 100644
--- a/board/pcippc2/pcippc2.c
+++ b/board/pcippc2/pcippc2.c
@@ -117,6 +117,8 @@ int misc_init_r (void)
{
pcippc2_fpga_init ();
+ pcippc2_cpci3264_init ();
+
#if defined(CONFIG_WATCHDOG)
pcippc2_wdt_init ();
#endif
@@ -147,6 +149,25 @@ void doc_init (void)
doc_probe (pcippc2_fpga1_phys + HW_FPGA1_DOC);
}
+void pcippc2_cpci3264_init (void)
+{
+ pci_dev_t bdf = pci_find_device(FPGA_VENDOR_ID, FPGA_DEVICE_ID, 0);
+
+ if (bdf == -1)
+ {
+ puts("Unable to find FPGA !\n");
+ hang();
+ }
+
+ if((in32(pcippc2_fpga0_phys + HW_FPGA0_BOARD) & 0x01000000) == 0x01000000)
+ /* 32-bits Compact PCI bus - LSB bit */
+ {
+ iobarrier_rw();
+ out32(BRIDGE(CPCI, PCIDG), 0x40000000); /* 32-bits bridge, Pipeline */
+ iobarrier_rw();
+ }
+}
+
#if defined(CONFIG_WATCHDOG)
void pcippc2_wdt_init (void)
diff --git a/board/pcippc2/pcippc2.h b/board/pcippc2/pcippc2.h
index 6e9e2ff..3820bbe 100644
--- a/board/pcippc2/pcippc2.h
+++ b/board/pcippc2/pcippc2.h
@@ -40,6 +40,8 @@ extern u32 pcippc2_sdram_size (void);
extern void pcippc2_fpga_init (void);
+extern void pcippc2_cpci3264_init (void);
+
extern void cpc710_pci_init (void);
extern void cpc710_pci_enable_timeout (void);
diff --git a/board/pcippc2/pcippc2_fpga.h b/board/pcippc2/pcippc2_fpga.h
index b6206a4..850c331 100644
--- a/board/pcippc2/pcippc2_fpga.h
+++ b/board/pcippc2/pcippc2_fpga.h
@@ -28,6 +28,7 @@
#define FPGA_DEVICE_ID 0x000d
#define HW_FPGA0_INT 0x0000
+#define HW_FPGA0_BOARD 0x0060
#define HW_FPGA0_UART1 0x0080
#define HW_FPGA0_UART2 0x0100
#define HW_FPGA0_RTC 0x2000
diff --git a/board/trab/trab.c b/board/trab/trab.c
index b4ab329..6a758b2 100644
--- a/board/trab/trab.c
+++ b/board/trab/trab.c
@@ -42,13 +42,13 @@ extern int do_mdm_init; /* defined in common/main.c */
* is that timers are not available yet, so we use a manually timed
* loop.
*/
-#define KBD_MDELAY 1000
-static void mdelay_no_timer (int msec)
+#define KBD_MDELAY 5000
+static void udelay_no_timer (int usec)
{
DECLARE_GLOBAL_DATA_PTR;
int i;
- int delay = msec * 3;
+ int delay = usec * 3;
for (i = 0; i < delay; i ++) gd->bd->bi_arch_number = 145;
}
@@ -102,12 +102,12 @@ int board_init ()
gd->bd->bi_boot_params = 0x0c000100;
#ifdef CONFIG_MODEM_SUPPORT
- /* This stuff is needed to get interrupts on stop-position
- * contact events.
+ /* This stuff is needed by the CPLD to read keyboard data.
* (Copied from the LCD initialization routine.)
*/
- if (rLCDCON1 == 0)
- {
+ if (rLCDCON1 == 0) {
+ extern void init_grid_ctrl(void);
+
rPCCON = (rPCCON & 0xFFFFFF00)| 0x000000AA;
rPDCON = (rPDCON & 0xFFFFFF03)| 0x000000A8;
#if 0
@@ -118,9 +118,11 @@ int board_init ()
rLCDCON4 = 0x00000001;
rLCDCON5 = 0x00000440;
rLCDCON1 = 0x00000B75;
+
+ init_grid_ctrl();
}
- mdelay_no_timer (KBD_MDELAY);
+ udelay_no_timer (KBD_MDELAY);
if (key_pressed()) {
disable_putc(); /* modem doesn't understand banner etc */