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| author | Wolfgang Denk <wd@denx.de> | 2007-10-24 11:05:28 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2007-10-24 11:05:28 +0200 |
| commit | 53acfb29831858c61d64fc6aefd98de447814141 (patch) | |
| tree | ddce2d52bbbdf157b4eb05f807c47a105ee1b01e /board | |
| parent | b31f64343ead9482cd439b1adbe4c34026a641b1 (diff) | |
| parent | d3afa1ee19345a31fd1eaad3e98b97d13ca47315 (diff) | |
| download | u-boot-imx-53acfb29831858c61d64fc6aefd98de447814141.zip u-boot-imx-53acfb29831858c61d64fc6aefd98de447814141.tar.gz u-boot-imx-53acfb29831858c61d64fc6aefd98de447814141.tar.bz2 | |
Merge branch 'motionpro_ng' of /home/tur/git/u-boot
Diffstat (limited to 'board')
| -rw-r--r-- | board/motionpro/motionpro.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c index f83998e..68257b8 100644 --- a/board/motionpro/motionpro.c +++ b/board/motionpro/motionpro.c @@ -138,6 +138,12 @@ long int initdram(int board_type) #ifndef CFG_RAMBOOT ulong test1, test2; + /* According to AN3221 (MPC5200B SDRAM Initialization and + * Configuration), the SDelay register must be written a value of + * 0x00000004 as the first step of the SDRAM contorller configuration. + */ + *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04; + /* configure SDRAM start/end for detection */ *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */ *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */ |